2 * \file trc_cmp_cfg_etmv4.h
5 * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
10 * Redistribution and use in source and binary forms, with or without modification,
11 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright notice,
17 * this list of conditions and the following disclaimer in the documentation
18 * and/or other materials provided with the distribution.
20 * 3. Neither the name of the copyright holder nor the names of its contributors
21 * may be used to endorse or promote products derived from this software without
22 * specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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36 #ifndef ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
37 #define ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
39 #include "trc_pkt_types_etmv4.h"
40 #include "common/trc_cs_config.h"
43 /** @addtogroup ocsd_protocol_cfg
46 /** @name ETMv4 configuration
51 * @brief Interpreter class for etm v4 config structure.
53 * Provides quick value interpretation methods for the ETMv4 config register values.
54 * Primarily inlined for efficient code.
56 class EtmV4Config : public CSConfig // public ocsd_etmv4_cfg
59 EtmV4Config(); /**< Default constructor */
60 EtmV4Config(const ocsd_etmv4_cfg *cfg_regs);
61 ~EtmV4Config() {}; /**< Default destructor */
63 // operations to convert to and from C-API structure
65 //! copy assignment operator for base structure into class.
66 EtmV4Config & operator=(const ocsd_etmv4_cfg *p_cfg);
68 //! cast operator returning struct const reference
69 operator const ocsd_etmv4_cfg &() const { return m_cfg; };
70 //! cast operator returning struct const pointer
71 operator const ocsd_etmv4_cfg *() const { return &m_cfg; };
73 const ocsd_core_profile_t &coreProfile() const { return m_cfg.core_prof; };
74 const ocsd_arch_version_t &archVersion() const { return m_cfg.arch_ver; };
77 const bool LSasInstP0() const;
78 const bool hasDataTrace() const;
79 const bool hasBranchBroadcast() const;
80 const bool hasCondTrace() const;
81 const bool hasCycleCountI() const;
82 const bool hasRetStack() const;
83 const uint8_t numEvents() const;
85 typedef enum _condType {
90 const condType hasCondType() const;
92 typedef enum _QSuppType {
99 const QSuppType getQSuppType();
100 const bool hasQElem();
101 const bool hasQFilter();
103 const bool hasTrcExcpData() const;
104 const uint32_t TimeStampSize() const;
106 const bool commitOpt1() const;
109 const uint8_t MajVersion() const;
110 const uint8_t MinVersion() const;
113 const uint32_t iaSizeMax() const;
114 const uint32_t cidSize() const;
115 const uint32_t vmidSize();
116 const uint32_t daSize() const;
117 const uint32_t dvSize() const;
118 const uint32_t ccSize() const;
119 const bool vmidOpt() const;
122 const uint32_t MaxSpecDepth() const;
123 const uint32_t P0_Key_Max() const;
124 const uint32_t P1_Key_Max() const;
125 const uint32_t P1_Spcl_Key_Max() const;
126 const uint32_t CondKeyMax() const;
127 const uint32_t CondSpecKeyMax() const;
128 const uint32_t CondKeyMaxIncr() const;
131 virtual const uint8_t getTraceID() const; //!< CoreSight Trace ID for this device.
134 const bool enabledDVTrace() const;
135 const bool enabledDATrace() const;
136 const bool enabledDataTrace() const;
145 const bool enabledLSP0Trace() const;
146 const LSP0_t LSP0Type() const;
148 const bool enabledBrBroad() const;
149 const bool enabledCCI() const;
150 const bool enabledCID() const;
151 const bool enabledVMID() const;
161 const CondITrace_t enabledCondITrace();
163 const bool enabledTS() const;
164 const bool enabledRetStack() const;
166 const bool enabledQE() const;
175 QSuppType m_QSuppType;
180 bool m_condTraceCalc;
181 CondITrace_t m_CondTrace;
183 ocsd_etmv4_cfg m_cfg;
187 inline const bool EtmV4Config::LSasInstP0() const
189 return (bool)((m_cfg.reg_idr0 & 0x6) == 0x6);
192 inline const bool EtmV4Config::hasDataTrace() const
194 return (bool)((m_cfg.reg_idr0 & 0x18) == 0x18);
197 inline const bool EtmV4Config::hasBranchBroadcast() const
199 return (bool)((m_cfg.reg_idr0 & 0x20) == 0x20);
202 inline const bool EtmV4Config::hasCondTrace() const
204 return (bool)((m_cfg.reg_idr0 & 0x40) == 0x40);
207 inline const bool EtmV4Config::hasCycleCountI() const
209 return (bool)((m_cfg.reg_idr0 & 0x80) == 0x80);
212 inline const bool EtmV4Config::hasRetStack() const
214 return (bool)((m_cfg.reg_idr0 & 0x200) == 0x200);
217 inline const uint8_t EtmV4Config::numEvents() const
219 return ((m_cfg.reg_idr0 >> 10) & 0x3) + 1;
222 inline const EtmV4Config::condType EtmV4Config::hasCondType() const
224 return ((m_cfg.reg_idr0 & 0x3000) == 0x1000) ? EtmV4Config::COND_HAS_ASPR : EtmV4Config::COND_PASS_FAIL;
227 inline const EtmV4Config::QSuppType EtmV4Config::getQSuppType()
229 if(!m_QSuppCalc) CalcQSupp();
233 inline const bool EtmV4Config::hasQElem()
235 if(!m_QSuppCalc) CalcQSupp();
236 return (bool)(m_QSuppType != Q_NONE);
239 inline const bool EtmV4Config::hasQFilter()
241 if(!m_QSuppCalc) CalcQSupp();
242 return m_QSuppFilter;
245 inline const bool EtmV4Config::hasTrcExcpData() const
247 return (bool)((m_cfg.reg_idr0 & 0x20000) == 0x20000);
250 inline const uint32_t EtmV4Config::TimeStampSize() const
252 uint32_t tsSizeF = (m_cfg.reg_idr0 >> 24) & 0x1F;
260 inline const bool EtmV4Config::commitOpt1() const
262 return (bool)((m_cfg.reg_idr0 & 0x20000000) == 0x20000000) && hasCycleCountI();
266 inline const uint8_t EtmV4Config::MajVersion() const
268 return (uint8_t)((m_cfg.reg_idr1 >> 8) & 0xF);
271 inline const uint8_t EtmV4Config::MinVersion() const
273 return (uint8_t)((m_cfg.reg_idr1 >> 4) & 0xF);
278 inline const uint32_t EtmV4Config::iaSizeMax() const
280 return ((m_cfg.reg_idr2 & 0x1F) == 0x8) ? 64 : 32;
283 inline const uint32_t EtmV4Config::cidSize() const
285 return (((m_cfg.reg_idr2 >> 5) & 0x1F) == 0x4) ? 32 : 0;
288 inline const uint32_t EtmV4Config::vmidSize()
297 inline const uint32_t EtmV4Config::daSize() const
299 uint32_t daSizeF = ((m_cfg.reg_idr2 >> 15) & 0x1F);
301 return (((m_cfg.reg_idr2 >> 15) & 0x1F) == 0x8) ? 64 : 32;
305 inline const uint32_t EtmV4Config::dvSize() const
307 uint32_t dvSizeF = ((m_cfg.reg_idr2 >> 20) & 0x1F);
309 return (((m_cfg.reg_idr2 >> 20) & 0x1F) == 0x8) ? 64 : 32;
313 inline const uint32_t EtmV4Config::ccSize() const
315 return ((m_cfg.reg_idr2 >> 25) & 0xF) + 12;
318 inline const bool EtmV4Config::vmidOpt() const
320 return (bool)((m_cfg.reg_idr2 & 0x20000000) == 0x20000000) && (MinVersion() > 0);
325 inline const uint32_t EtmV4Config::MaxSpecDepth() const
327 return m_cfg.reg_idr8;
330 inline const uint32_t EtmV4Config::P0_Key_Max() const
332 return (m_cfg.reg_idr9 == 0) ? 1 : m_cfg.reg_idr9;
335 inline const uint32_t EtmV4Config::P1_Key_Max() const
337 return m_cfg.reg_idr10;
340 inline const uint32_t EtmV4Config::P1_Spcl_Key_Max() const
342 return m_cfg.reg_idr11;
345 inline const uint32_t EtmV4Config::CondKeyMax() const
347 return m_cfg.reg_idr12;
350 inline const uint32_t EtmV4Config::CondSpecKeyMax() const
352 return m_cfg.reg_idr13;
355 inline const uint32_t EtmV4Config::CondKeyMaxIncr() const
357 return m_cfg.reg_idr12 - m_cfg.reg_idr13;
360 inline const uint8_t EtmV4Config::getTraceID() const
362 return (uint8_t)(m_cfg.reg_traceidr & 0x7F);
366 inline const bool EtmV4Config::enabledDVTrace() const
368 return hasDataTrace() && enabledLSP0Trace() && ((m_cfg.reg_configr & (0x1 << 17)) != 0);
371 inline const bool EtmV4Config::enabledDATrace() const
373 return hasDataTrace() && enabledLSP0Trace() && ((m_cfg.reg_configr & (0x1 << 16)) != 0);
376 inline const bool EtmV4Config::enabledDataTrace() const
378 return enabledDATrace() || enabledDVTrace();
381 inline const bool EtmV4Config::enabledLSP0Trace() const
383 return ((m_cfg.reg_configr & 0x6) != 0);
386 inline const EtmV4Config::LSP0_t EtmV4Config::LSP0Type() const
388 return (LSP0_t)((m_cfg.reg_configr & 0x6) >> 1);
391 inline const bool EtmV4Config::enabledBrBroad() const
393 return ((m_cfg.reg_configr & (0x1 << 3)) != 0);
396 inline const bool EtmV4Config::enabledCCI() const
398 return ((m_cfg.reg_configr & (0x1 << 4)) != 0);
401 inline const bool EtmV4Config::enabledCID() const
403 return ((m_cfg.reg_configr & (0x1 << 6)) != 0);
406 inline const bool EtmV4Config::enabledVMID() const
408 return ((m_cfg.reg_configr & (0x1 << 7)) != 0);
411 inline const EtmV4Config::CondITrace_t EtmV4Config::enabledCondITrace()
415 switch((m_cfg.reg_configr >> 8) & 0x7)
418 case 0: m_CondTrace = COND_TR_DIS; break;
419 case 1: m_CondTrace = COND_TR_LD; break;
420 case 2: m_CondTrace = COND_TR_ST; break;
421 case 3: m_CondTrace = COND_TR_LDST; break;
422 case 7: m_CondTrace = COND_TR_ALL; break;
424 m_condTraceCalc = true;
429 inline const bool EtmV4Config::enabledTS() const
431 return ((m_cfg.reg_configr & (0x1 << 11)) != 0);
434 inline const bool EtmV4Config::enabledRetStack() const
436 return ((m_cfg.reg_configr & (0x1 << 12)) != 0);
439 inline const bool EtmV4Config::enabledQE() const
441 return ((m_cfg.reg_configr & (0x3 << 13)) != 0);
447 #endif // ARM_TRC_CMP_CFG_ETMV4_H_INCLUDED
449 /* End of File trc_cmp_cfg_etmv4.h */