2 * \file trc_pkt_types_etmv4.h
5 * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
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11 * are permitted provided that the following conditions are met:
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14 * this list of conditions and the following disclaimer.
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21 * may be used to endorse or promote products derived from this software without
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24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
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36 #ifndef ARM_TRC_PKT_TYPES_ETMV4_H_INCLUDED
37 #define ARM_TRC_PKT_TYPES_ETMV4_H_INCLUDED
39 #include "opencsd/trc_pkt_types.h"
41 /** @addtogroup trc_pkts
44 /** @name ETMv4 Packet Types
47 /** I stream packets. */
48 typedef enum _ocsd_etmv4_i_pkt_type
50 /* state of decode markers */
51 ETM4_PKT_I_NOTSYNC = 0x200, /*!< no sync found yet. */
52 ETM4_PKT_I_INCOMPLETE_EOT, /*!< flushing incomplete/empty packet at end of trace.*/
53 ETM4_PKT_I_NO_ERR_TYPE, /*!< error type not set for packet. */
55 /* markers for unknown/bad packets */
56 ETM4_PKT_I_BAD_SEQUENCE = 0x300, /*!< invalid sequence for packet type. */
57 ETM4_PKT_I_BAD_TRACEMODE, /*!< invalid packet type for this trace mode. */
58 ETM4_PKT_I_RESERVED, /*!< packet type reserved. */
60 /* I stream packet types. */
61 /* extension header. */
62 ETM4_PKT_I_EXTENSION = 0x00, /*!< b00000000 */
64 /* address amd context */
65 ETM4_PKT_I_ADDR_CTXT_L_32IS0 = 0x82, /*!< b10000010 */
66 ETM4_PKT_I_ADDR_CTXT_L_32IS1, /*!< b10000011 */
67 /* unused encoding b10000100 */
68 ETM4_PKT_I_ADDR_CTXT_L_64IS0 = 0x85, /*!< b10000101 */
69 ETM4_PKT_I_ADDR_CTXT_L_64IS1, /*!< b10000110 */
70 /* unused encoding b10000111 */
71 ETM4_PKT_I_CTXT = 0x80, /*!< b1000000x */
72 ETM4_PKT_I_ADDR_MATCH = 0x90, /*!< b10010000 to b10010010 */
73 ETM4_PKT_I_ADDR_L_32IS0 = 0x9A, /*!< b10011010 */
74 ETM4_PKT_I_ADDR_L_32IS1, /*!< b10011011 */
75 /* unused encoding b10011100 */
76 ETM4_PKT_I_ADDR_L_64IS0 = 0x9D, /*!< b10011101 */
77 ETM4_PKT_I_ADDR_L_64IS1, /*!< b10011110 */
78 /* unused encoding b10011111 */
79 ETM4_PKT_I_ADDR_S_IS0 = 0x95, /*!< b10010101 */
80 ETM4_PKT_I_ADDR_S_IS1, /*!< b10010110 */
81 /* unused encoding b10010111
82 unused encoding b10011000
83 unused encoding b10011001 */
86 ETM4_PKT_I_Q = 0xA0, /*!< b1010xxxx */
89 ETM4_PKT_I_ATOM_F1 = 0xF6, /*!< b1111011x */
90 ETM4_PKT_I_ATOM_F2 = 0xD8, /*!< b110110xx */
91 ETM4_PKT_I_ATOM_F3 = 0xF8, //!< b11111xxx
92 ETM4_PKT_I_ATOM_F4 = 0xDC, //!< b110111xx
93 ETM4_PKT_I_ATOM_F5 = 0xD5, //!< b11010101 - b11010111, b11110101
94 ETM4_PKT_I_ATOM_F6 = 0xC0, //!< b11000000 - b11010100, b11100000 - b11110100
96 /* conditional instruction tracing */
97 ETM4_PKT_I_COND_FLUSH = 0x43, //!< b01000011
98 ETM4_PKT_I_COND_I_F1 = 0x6C, //!< b01101100
99 ETM4_PKT_I_COND_I_F2 = 0x40, //!< b01000000 - b01000010
100 ETM4_PKT_I_COND_I_F3 = 0x6D, //!< b01101101
101 ETM4_PKT_I_COND_RES_F1 = 0x68, //!< b0110111x, b011010xx
102 ETM4_PKT_I_COND_RES_F2 = 0x48, //!< b0100100x, b01001010, b0100110x, b01001110
103 ETM4_PKT_I_COND_RES_F3 = 0x50, //!< b0101xxxx
104 ETM4_PKT_I_COND_RES_F4 = 0x44, //!< b0100010x, b01000110
106 /* cycle count packets */
107 ETM4_PKT_I_CCNT_F1 = 0x0E, //!< b0000111x
108 ETM4_PKT_I_CCNT_F2 = 0x0C, //!< b0000110x
109 ETM4_PKT_I_CCNT_F3 = 0x10, //!< b0001xxxx
110 // data synchronisation markers
111 ETM4_PKT_I_NUM_DS_MKR = 0x20, //!< b00100xxx
112 ETM4_PKT_I_UNNUM_DS_MKR = 0x28, //!< b00101000 - b00101100
114 ETM4_PKT_I_EVENT = 0x70, //!< b0111xxxx
116 ETM4_PKT_I_EXCEPT = 0x06, //!< b00000110
117 ETM4_PKT_I_EXCEPT_RTN = 0x07, //!< b00000111
119 ETM4_PKT_I_TIMESTAMP = 0x02, //!< b0000001x
121 ETM4_PKT_I_CANCEL_F1 = 0x2E, //!< b0010111x
122 ETM4_PKT_I_CANCEL_F2 = 0x34, //!< b001101xx
123 ETM4_PKT_I_CANCEL_F3 = 0x38, //!< b00111xxx
124 ETM4_PKT_I_COMMIT = 0x2D, //!< b00101101
125 ETM4_PKT_I_MISPREDICT = 0x30, //!< b001100xx
127 ETM4_PKT_I_TRACE_INFO = 0x01, //!< b00000001
128 ETM4_PKT_I_TRACE_ON = 0x04, //!< b00000100
129 // extension packets - follow 0x00 header
130 ETM4_PKT_I_ASYNC = 0x100, //!< b00000000
131 ETM4_PKT_I_DISCARD = 0x103, //!< b00000011
132 ETM4_PKT_I_OVERFLOW = 0x105 //!< b00000101
134 } ocsd_etmv4_i_pkt_type;
136 typedef union _etmv4_trace_info_t {
137 uint32_t val; //!< trace info full value.
139 uint32_t cc_enabled:1; //!< 1 if cycle count enabled
140 uint32_t cond_enabled:3; //!< conditional trace enabeld type
141 uint32_t p0_load:1; //!< 1 if tracing with P0 load elements (for data trace)
142 uint32_t p0_store:1; //1< 1 if tracing with P0 store elements (for data trace)
143 } bits; //!< bitfields for trace info value.
144 } etmv4_trace_info_t;
146 typedef struct _etmv4_context_t {
148 uint32_t EL:2; //!< exception level.
149 uint32_t SF:1; //!< sixty four bit
150 uint32_t NS:1; //!< none secure
151 uint32_t updated:1; //!< updated this context packet (otherwise same as last time)
152 uint32_t updated_c:1; //!< updated CtxtID
153 uint32_t updated_v:1; //!< updated VMID
155 uint32_t ctxtID; //!< Current ctxtID
156 uint32_t VMID; //!< current VMID
159 /** a broadcast address value. */
160 typedef struct _etmv4_addr_val_t {
161 ocsd_vaddr_t val; //!< Address value.
162 uint8_t isa; //!< instruction set.
165 typedef struct _ocsd_etmv4_i_pkt
167 ocsd_etmv4_i_pkt_type type; /**< Trace packet type derived from header byte */
169 //** intra-packet data - valid across packets.
171 ocsd_pkt_vaddr v_addr; //!< most recently broadcast address packet
172 uint8_t v_addr_ISA; //!< ISA for the address packet. (0 = IS0 / 1 = IS1)
174 etmv4_context_t context; //!< current context for PE
177 uint64_t timestamp; //!< current timestamp value
178 uint8_t bits_changed; //!< bits updated in this timestamp packet.
181 uint32_t cc_threshold; //!< cycle count threshold - from trace info.
183 // single packet data - only valid for specific packet types on packet instance.
184 ocsd_pkt_atom atom; //!< atom elements - number of atoms indicates validity of packet
185 uint32_t cycle_count; //!< cycle count
187 uint32_t curr_spec_depth; //!< current speculation depth
188 uint32_t p0_key; //!< current P0 key value for data packet synchronisation
190 uint32_t commit_elements; //<! commit elements indicated by this packet - valid dependent on the packet type.
191 uint32_t cancel_elements; //<! cancel elements indicated by this packet - valid dependent on the packet type.
193 etmv4_trace_info_t trace_info; //!< trace info structure - programmed configuration of trace capture.
196 uint32_t exceptionType:10; //!< exception number
197 uint32_t addr_interp:2; //!< address value interpretation
198 uint32_t m_fault_pending:1; //!< M class fault pending.
199 uint32_t m_type:1; //!< 1 if M class exception.
203 uint8_t addr_exact_match_idx; //!< address match index in this packet.
204 uint8_t dsm_val; //!< Data Sync Marker number, or unnumbered atom count - packet type determines.
205 uint8_t event_val; //!< Event value on event packet.
211 uint32_t cond_key_set:1;
212 uint32_t f3_final_elem:1;
213 uint32_t f2_cond_incr:1;
218 uint32_t cond_r_key_0;
219 uint32_t cond_r_key_1;
225 uint32_t key_res_0_set:1;
226 uint32_t key_res_1_set:1;
227 uint32_t f2_key_incr:2;
228 uint32_t f2f4_token:2;
229 uint32_t f3_tokens:12;
236 uint32_t addr_present:1;
237 uint32_t addr_match:1;
238 uint32_t count_present:1;
243 //! valid bits for packet elements (addresses have their own valid bits).
247 uint32_t context_valid:1;
249 uint32_t spec_depth_valid:1;
250 uint32_t p0_key_valid:1;
251 uint32_t cond_c_key_valid:1;
252 uint32_t cond_r_key_valid:1;
253 uint32_t trace_info_valid:1;
254 uint32_t cc_thresh_valid:1;
256 uint32_t commit_elem_valid:1;
260 // original header type when packet type changed to error on decode error.
261 ocsd_etmv4_i_pkt_type err_type;
267 typedef enum _ocsd_etmv4_d_pkt_type
269 // markers for unknown/bad packets
270 ETM4_PKT_D_NOTSYNC = 0x200, //!< no sync found yet
271 ETM4_PKT_D_BAD_SEQUENCE, //!< invalid sequence for packet type
272 ETM4_PKT_D_BAD_TRACEMODE, //!< invalid packet type for this trace mode.
273 ETM4_PKT_D_RESERVED, //!< packet type reserved.
274 ETM4_PKT_D_INCOMPLETE_EOT, //!< flushing incomplete packet at end of trace.
275 ETM4_PKT_D_NO_HEADER, //!< waiting for a header byte
276 ETM4_PKT_D_NO_ERR_TYPE, //!< error packet has no header based type. Use with unknown/res packet types.
279 ETM4_PKT_DNUM_DS_MKR = 0x111, // ext packet, b0001xxx1
281 ETM4_PKT_D_EXTENSION = 0x00, //!< b00000000
283 ETM4_PKT_DUNNUM_DS_MKR = 0x01, //!< b00000001
285 ETM4_PKT_DEVENT = 0x04, //!< b00000100
287 ETM4_PKT_DTIMESTAMP = 0x02, //!< b00000010
289 ETM4_PKT_DADDR_P1_F1 = 0x70, //!< b0111xxxx
290 ETM4_PKT_DADDR_P1_F2 = 0x80, //!< b10xxxxxx
291 ETM4_PKT_DADDR_P1_F3 = 0x14, //!< b000101xx
292 ETM4_PKT_DADDR_P1_F4 = 0x60, //!< b0110xxxx
293 ETM4_PKT_DADDR_P1_F5 = 0xF8, //!< b11111xxx
294 ETM4_PKT_DADDR_P1_F6 = 0xF6, //!< b1111011x
295 ETM4_PKT_DADDR_P1_F7 = 0xF5, //!< b11110101
297 ETM4_PKT_DVAL_P2_F1 = 0x20, //!< b0010xxxx
298 ETM4_PKT_DVAL_P2_F2 = 0x30, //!< b00110xxx
299 ETM4_PKT_DVAL_P2_F3 = 0x40, //!< b010xxxxx
300 ETM4_PKT_DVAL_P2_F4 = 0x10, //!< b000100xx
301 ETM4_PKT_DVAL_P2_F5 = 0x18, //!< b00011xxx
302 ETM4_PKT_DVAL_P2_F6 = 0x38, //!< b00111xxx
304 ETM4_PKT_DSUPPRESSION = 0x03, //!< b00000011
305 // synchronisation- extension packets - follow 0x00 header
306 ETM4_PKT_DTRACE_INFO = 0x101, //!< b00000001
308 // extension packets - follow 0x00 header
309 ETM4_PKT_D_ASYNC = 0x100, //!< b00000000
310 ETM4_PKT_D_DISCARD = 0x103, //!< b00000011
311 ETM4_PKT_D_OVERFLOW = 0x105 //!< b00000101
313 } ocsd_etmv4_d_pkt_type;
316 typedef struct _ocsd_etmv4_d_pkt
318 ocsd_etmv4_d_pkt_type type;
320 ocsd_pkt_vaddr d_addr;
322 uint64_t pkt_val; /**< Packet value -> data value, timestamp value, event value */
324 ocsd_etmv4_d_pkt_type err_type;
328 typedef struct _ocsd_etmv4_cfg
330 uint32_t reg_idr0; /**< ID0 register */
331 uint32_t reg_idr1; /**< ID1 register */
332 uint32_t reg_idr2; /**< ID2 register */
339 uint32_t reg_configr; /**< Config Register */
340 uint32_t reg_traceidr; /**< Trace Stream ID register */
341 ocsd_arch_version_t arch_ver; /**< Architecture version */
342 ocsd_core_profile_t core_prof; /**< Core Profile */
347 #endif // ARM_TRC_PKT_TYPES_ETMV4_H_INCLUDED
349 /* End of File trc_pkt_types_etmv4.h */