2 * \file trc_i_decode.cpp
5 * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
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35 #include "opencsd/ocsd_if_types.h"
36 #include "i_dec/trc_i_decode.h"
37 #include "i_dec/trc_idec_arminst.h"
39 ocsd_err_t TrcIDecode::DecodeInstruction(ocsd_instr_info *instr_info)
41 ocsd_err_t err = OCSD_OK;
42 clear_instr_subtype();
43 SetArchVersion(instr_info);
45 switch(instr_info->isa)
48 err = DecodeA32(instr_info);
52 err = DecodeT32(instr_info);
55 case ocsd_isa_aarch64:
56 err = DecodeA64(instr_info);
60 case ocsd_isa_jazelle:
63 err = OCSD_ERR_UNSUPPORTED_ISA;
66 instr_info->sub_type = get_instr_subtype();
70 void TrcIDecode::SetArchVersion(ocsd_instr_info *instr_info)
72 uint16_t arch = 0x0700;
74 switch (instr_info->pe_type.arch)
76 case ARCH_V8: arch = 0x0800; break;
77 case ARCH_V8r3: arch = 0x0803; break;
82 set_arch_version(arch);
86 ocsd_err_t TrcIDecode::DecodeA32(ocsd_instr_info *instr_info)
88 uint32_t branchAddr = 0;
89 arm_barrier_t barrier;
91 instr_info->instr_size = 4; // instruction size A32
92 instr_info->type = OCSD_INSTR_OTHER; // default type
93 instr_info->next_isa = instr_info->isa; // assume same ISA
94 instr_info->is_link = 0;
96 if(inst_ARM_is_indirect_branch(instr_info->opcode))
98 instr_info->type = OCSD_INSTR_BR_INDIRECT;
99 instr_info->is_link = inst_ARM_is_branch_and_link(instr_info->opcode);
101 else if(inst_ARM_is_direct_branch(instr_info->opcode))
103 inst_ARM_branch_destination((uint32_t)instr_info->instr_addr,instr_info->opcode,&branchAddr);
104 instr_info->type = OCSD_INSTR_BR;
105 if (branchAddr & 0x1)
107 instr_info->next_isa = ocsd_isa_thumb2;
110 instr_info->branch_addr = (ocsd_vaddr_t)branchAddr;
111 instr_info->is_link = inst_ARM_is_branch_and_link(instr_info->opcode);
113 else if((barrier = inst_ARM_barrier(instr_info->opcode)) != ARM_BARRIER_NONE)
117 case ARM_BARRIER_ISB:
118 instr_info->type = OCSD_INSTR_ISB;
121 case ARM_BARRIER_DSB:
122 case ARM_BARRIER_DMB:
123 if(instr_info->dsb_dmb_waypoints)
124 instr_info->type = OCSD_INSTR_DSB_DMB;
128 else if (instr_info->wfi_wfe_branch)
130 if (inst_ARM_wfiwfe(instr_info->opcode))
132 instr_info->type = OCSD_INSTR_WFI_WFE;
135 instr_info->is_conditional = inst_ARM_is_conditional(instr_info->opcode);
140 ocsd_err_t TrcIDecode::DecodeA64(ocsd_instr_info *instr_info)
142 uint64_t branchAddr = 0;
143 arm_barrier_t barrier;
145 instr_info->instr_size = 4; // default address update
146 instr_info->type = OCSD_INSTR_OTHER; // default type
147 instr_info->next_isa = instr_info->isa; // assume same ISA
148 instr_info->is_link = 0;
150 if(inst_A64_is_indirect_branch_link(instr_info->opcode, &instr_info->is_link))
152 instr_info->type = OCSD_INSTR_BR_INDIRECT;
153 // instr_info->is_link = inst_A64_is_branch_and_link(instr_info->opcode);
155 else if(inst_A64_is_direct_branch_link(instr_info->opcode, &instr_info->is_link))
157 inst_A64_branch_destination(instr_info->instr_addr,instr_info->opcode,&branchAddr);
158 instr_info->type = OCSD_INSTR_BR;
159 instr_info->branch_addr = (ocsd_vaddr_t)branchAddr;
160 // instr_info->is_link = inst_A64_is_branch_and_link(instr_info->opcode);
162 else if((barrier = inst_A64_barrier(instr_info->opcode)) != ARM_BARRIER_NONE)
166 case ARM_BARRIER_ISB:
167 instr_info->type = OCSD_INSTR_ISB;
170 case ARM_BARRIER_DSB:
171 case ARM_BARRIER_DMB:
172 if(instr_info->dsb_dmb_waypoints)
173 instr_info->type = OCSD_INSTR_DSB_DMB;
177 else if (instr_info->wfi_wfe_branch)
179 if (inst_A64_wfiwfe(instr_info->opcode))
181 instr_info->type = OCSD_INSTR_WFI_WFE;
185 instr_info->is_conditional = inst_A64_is_conditional(instr_info->opcode);
190 ocsd_err_t TrcIDecode::DecodeT32(ocsd_instr_info *instr_info)
192 uint32_t branchAddr = 0;
193 arm_barrier_t barrier;
195 // need to align the 32 bit opcode as 2 16 bit, with LS 16 as in top 16 bit of
196 // 32 bit word - T2 routines assume 16 bit in top 16 bit of 32 bit opcode.
197 uint32_t op_temp = (instr_info->opcode >> 16) & 0xFFFF;
198 op_temp |= ((instr_info->opcode & 0xFFFF) << 16);
199 instr_info->opcode = op_temp;
202 instr_info->instr_size = is_wide_thumb((uint16_t)(instr_info->opcode >> 16)) ? 4 : 2;
203 instr_info->type = OCSD_INSTR_OTHER; // default type
204 instr_info->next_isa = instr_info->isa; // assume same ISA
205 instr_info->is_link = 0;
206 instr_info->is_conditional = 0;
209 if(inst_Thumb_is_direct_branch_link(instr_info->opcode,&instr_info->is_link, &instr_info->is_conditional))
211 inst_Thumb_branch_destination((uint32_t)instr_info->instr_addr,instr_info->opcode,&branchAddr);
212 instr_info->type = OCSD_INSTR_BR;
213 instr_info->branch_addr = (ocsd_vaddr_t)(branchAddr & ~0x1);
214 if((branchAddr & 0x1) == 0)
215 instr_info->next_isa = ocsd_isa_arm;
217 else if (inst_Thumb_is_indirect_branch_link(instr_info->opcode, &instr_info->is_link))
219 instr_info->type = OCSD_INSTR_BR_INDIRECT;
221 else if((barrier = inst_Thumb_barrier(instr_info->opcode)) != ARM_BARRIER_NONE)
225 case ARM_BARRIER_ISB:
226 instr_info->type = OCSD_INSTR_ISB;
229 case ARM_BARRIER_DSB:
230 case ARM_BARRIER_DMB:
231 if(instr_info->dsb_dmb_waypoints)
232 instr_info->type = OCSD_INSTR_DSB_DMB;
236 else if (instr_info->wfi_wfe_branch)
238 if (inst_Thumb_wfiwfe(instr_info->opcode))
240 instr_info->type = OCSD_INSTR_WFI_WFE;
243 instr_info->is_conditional = inst_Thumb_is_conditional(instr_info->opcode);
244 instr_info->thumb_it_conditions = inst_Thumb_is_IT(instr_info->opcode);
250 /* End of File trc_i_decode.cpp */