2 * \file trc_mem_acc_cache.cpp
3 * \brief OpenCSD : Memory accessor cache.
5 * \copyright Copyright (c) 2018, ARM Limited. All Rights Reserved.
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10 * are permitted provided that the following conditions are met:
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38 #include "mem_acc/trc_mem_acc_cache.h"
39 #include "mem_acc/trc_mem_acc_base.h"
40 #include "interfaces/trc_error_log_i.h"
42 #ifdef LOG_CACHE_STATS
43 #define INC_HITS_RL(idx) m_hits++; m_hit_rl[m_mru_idx]++;
44 #define INC_MISS() m_misses++;
45 #define INC_PAGES() m_pages++;
46 #define SET_MAX_RL(idx) \
48 if (m_hit_rl_max[idx] < m_hit_rl[idx]) \
49 m_hit_rl_max[idx] = m_hit_rl[idx]; \
52 #define INC_RL(idx) m_hit_rl[m_mru_idx]++;
54 #define INC_HITS_RL(idx)
57 #define SET_MAX_RL(idx)
61 // uncomment to log cache ops
62 //#define LOG_CACHE_OPS
64 ocsd_err_t TrcMemAccCache::readBytesFromCache(TrcMemAccessorBase *p_accessor, const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint8_t trcID, uint32_t *numBytes, uint8_t *byteBuffer)
66 uint32_t bytesRead = 0, reqBytes = *numBytes;
67 ocsd_err_t err = OCSD_OK;
70 std::ostringstream oss;
75 if (blockInCache(address, reqBytes))
78 memcpy(byteBuffer, &m_mru[m_mru_idx].data[address - m_mru[m_mru_idx].st_addr], reqBytes);
80 oss << "TrcMemAccCache:: hit [page: " << std::dec << m_mru_idx << "[addr:0x" << std::hex << address << ", bytes: " << std::dec << reqBytes << "]\n";
83 INC_HITS_RL(m_mru_idx);
89 oss << "TrcMemAccCache:: miss [addr:0x" << std::hex << address << ", bytes: " << std::dec << reqBytes << "]\n";
92 /* need a new cache page - check the underlying accessor for the data */
93 m_mru_idx = m_mru_next_new;
94 m_mru[m_mru_idx].valid_len = p_accessor->readBytes(address, mem_space, trcID, MEM_ACC_CACHE_PAGE_SIZE, &m_mru[m_mru_idx].data[0]);
96 /* check return length valid - v bad if return length more than request */
97 if (m_mru[m_mru_idx].valid_len > MEM_ACC_CACHE_PAGE_SIZE)
99 m_mru[m_mru_idx].valid_len = 0; // set to nothing returned.
100 err = OCSD_ERR_MEM_ACC_BAD_LEN;
103 if (m_mru[m_mru_idx].valid_len > 0)
105 // got some data - so save the
106 m_mru[m_mru_idx].st_addr = address;
108 // log the run length hit counts
109 SET_MAX_RL(m_mru_idx);
113 oss << "TrcMemAccCache:: load [page: " << std::dec << m_mru_idx << "[addr:0x" << std::hex << address << ", bytes: " << std::dec << m_mru[m_mru_idx].valid_len << "]\n";
118 // increment the next new page counter.
120 if (m_mru_next_new == MEM_ACC_CACHE_MRU_SIZE)
123 if (blockInPage(address, reqBytes)) /* check we got the data we needed */
125 bytesRead = reqBytes;
126 memcpy(byteBuffer, &m_mru[m_mru_idx].data[address - m_mru[m_mru_idx].st_addr], reqBytes);
133 oss << "TrcMemAccCache:: miss-after-load [page: " << std::dec << m_mru_idx << "[addr:0x" << std::hex << address << ", bytes: " << std::dec << m_mru[m_mru_idx].valid_len << "]\n";
141 *numBytes = bytesRead;
145 void TrcMemAccCache::logMsg(const std::string &szMsg)
148 m_err_log->LogMessage(ITraceErrorLog::HANDLE_GEN_INFO, OCSD_ERR_SEV_INFO, szMsg);
151 void TrcMemAccCache::setErrorLog(ITraceErrorLog *log)
156 void TrcMemAccCache::logAndClearCounts()
158 #ifdef LOG_CACHE_STATS
159 std::ostringstream oss;
161 oss << "TrcMemAccCache:: cache performance: hits(" << std::dec << m_hits << "), miss(" << m_misses << "), pages(" << m_pages << ")\n";
163 for (int i = 0; i < MEM_ACC_CACHE_MRU_SIZE; i++)
165 if (m_hit_rl_max[i] < m_hit_rl[i])
166 m_hit_rl_max[i] = m_hit_rl[i];
168 oss << "Run length max page " << std::dec << i << ": " << m_hit_rl_max[i] << "\n";
171 m_hits = m_misses = m_pages = 0;
176 /* End of File trc_mem_acc_cache.cpp */