2 # Copyright 2014-2019 The OpenSSL Project Authors. All Rights Reserved.
4 # Licensed under the OpenSSL license (the "License"). You may not use
5 # this file except in compliance with the License. You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
10 # ====================================================================
11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
12 # project. The module is, however, dual licensed under OpenSSL and
13 # CRYPTOGAMS licenses depending on where you obtain it. For further
14 # details see http://www.openssl.org/~appro/cryptogams/.
15 # ====================================================================
17 # This module implements support for ARMv8 AES instructions. The
18 # module is endian-agnostic in sense that it supports both big- and
19 # little-endian cases. As does it support both 32- and 64-bit modes
20 # of operation. Latter is achieved by limiting amount of utilized
21 # registers to 16, which implies additional NEON load and integer
22 # instructions. This has no effect on mighty Apple A7, where results
23 # are literally equal to the theoretical estimates based on AES
24 # instruction latencies and issue rates. On Cortex-A53, an in-order
25 # execution core, this costs up to 10-15%, which is partially
26 # compensated by implementing dedicated code path for 128-bit
27 # CBC encrypt case. On Cortex-A57 parallelizable mode performance
28 # seems to be limited by sheer amount of NEON instructions...
30 # Performance in cycles per byte processed with 128-bit key:
33 # Apple A7 2.39 1.20 1.20
34 # Cortex-A53 1.32 1.29 1.46
35 # Cortex-A57(*) 1.95 0.85 0.93
36 # Denver 1.96 0.86 0.80
37 # Mongoose 1.33 1.20 1.20
40 # (*) original 3.64/1.34/1.32 results were for r0p0 revision
41 # and are still same even for updated module;
46 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
47 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
48 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
49 die "can't locate arm-xlate.pl";
51 open OUT,"| \"$^X\" $xlate $flavour $output";
59 #if __ARM_MAX_ARCH__>=7
62 # $code.=".arch armv8-a+crypto\n" if ($flavour =~ /64/);
63 $code.=<<___ if ($flavour !~ /64/);
64 .arch armv7-a // don't confuse not-so-latest binutils with argv8 :-)
70 # Assembler mnemonics are an eclectic mix of 32- and 64-bit syntax,
71 # NEON is mostly 32-bit mnemonics, integer - mostly 64. Goal is to
72 # maintain both 32- and 64-bit codes within single module and
73 # transliterate common code to either flavour with regex vodoo.
76 my ($inp,$bits,$out,$ptr,$rounds)=("x0","w1","x2","x3","w12");
77 my ($zero,$rcon,$mask,$in0,$in1,$tmp,$key)=
78 $flavour=~/64/? map("q$_",(0..6)) : map("q$_",(0..3,8..10));
84 .long 0x01,0x01,0x01,0x01
85 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d // rotate-n-splat
86 .long 0x1b,0x1b,0x1b,0x1b
88 .globl ${prefix}_set_encrypt_key
89 .type ${prefix}_set_encrypt_key,%function
91 ${prefix}_set_encrypt_key:
94 $code.=<<___ if ($flavour =~ /64/);
95 stp x29,x30,[sp,#-16]!
115 veor $zero,$zero,$zero
116 vld1.8 {$in0},[$inp],#16
117 mov $bits,#8 // reuse $bits
118 vld1.32 {$rcon,$mask},[$ptr],#32
126 vtbl.8 $key,{$in0},$mask
127 vext.8 $tmp,$zero,$in0,#12
128 vst1.32 {$in0},[$out],#16
133 vext.8 $tmp,$zero,$tmp,#12
135 vext.8 $tmp,$zero,$tmp,#12
138 vshl.u8 $rcon,$rcon,#1
142 vld1.32 {$rcon},[$ptr]
144 vtbl.8 $key,{$in0},$mask
145 vext.8 $tmp,$zero,$in0,#12
146 vst1.32 {$in0},[$out],#16
150 vext.8 $tmp,$zero,$tmp,#12
152 vext.8 $tmp,$zero,$tmp,#12
155 vshl.u8 $rcon,$rcon,#1
158 vtbl.8 $key,{$in0},$mask
159 vext.8 $tmp,$zero,$in0,#12
160 vst1.32 {$in0},[$out],#16
164 vext.8 $tmp,$zero,$tmp,#12
166 vext.8 $tmp,$zero,$tmp,#12
170 vst1.32 {$in0},[$out]
178 vld1.8 {$in1},[$inp],#8
179 vmov.i8 $key,#8 // borrow $key
180 vst1.32 {$in0},[$out],#16
181 vsub.i8 $mask,$mask,$key // adjust the mask
184 vtbl.8 $key,{$in1},$mask
185 vext.8 $tmp,$zero,$in0,#12
186 vst1.32 {$in1},[$out],#8
191 vext.8 $tmp,$zero,$tmp,#12
193 vext.8 $tmp,$zero,$tmp,#12
196 vdup.32 $tmp,${in0}[3]
199 vext.8 $in1,$zero,$in1,#12
200 vshl.u8 $rcon,$rcon,#1
204 vst1.32 {$in0},[$out],#16
216 vst1.32 {$in0},[$out],#16
219 vtbl.8 $key,{$in1},$mask
220 vext.8 $tmp,$zero,$in0,#12
221 vst1.32 {$in1},[$out],#16
226 vext.8 $tmp,$zero,$tmp,#12
228 vext.8 $tmp,$zero,$tmp,#12
231 vshl.u8 $rcon,$rcon,#1
233 vst1.32 {$in0},[$out],#16
236 vdup.32 $key,${in0}[3] // just splat
237 vext.8 $tmp,$zero,$in1,#12
241 vext.8 $tmp,$zero,$tmp,#12
243 vext.8 $tmp,$zero,$tmp,#12
254 mov x0,$ptr // return value
255 `"ldr x29,[sp],#16" if ($flavour =~ /64/)`
257 .size ${prefix}_set_encrypt_key,.-${prefix}_set_encrypt_key
259 .globl ${prefix}_set_decrypt_key
260 .type ${prefix}_set_decrypt_key,%function
262 ${prefix}_set_decrypt_key:
264 $code.=<<___ if ($flavour =~ /64/);
265 .inst 0xd503233f // paciasp
266 stp x29,x30,[sp,#-16]!
269 $code.=<<___ if ($flavour !~ /64/);
278 sub $out,$out,#240 // restore original $out
280 add $inp,$out,x12,lsl#4 // end of key schedule
282 vld1.32 {v0.16b},[$out]
283 vld1.32 {v1.16b},[$inp]
284 vst1.32 {v0.16b},[$inp],x4
285 vst1.32 {v1.16b},[$out],#16
288 vld1.32 {v0.16b},[$out]
289 vld1.32 {v1.16b},[$inp]
292 vst1.32 {v0.16b},[$inp],x4
293 vst1.32 {v1.16b},[$out],#16
297 vld1.32 {v0.16b},[$out]
299 vst1.32 {v0.16b},[$inp]
301 eor x0,x0,x0 // return value
304 $code.=<<___ if ($flavour !~ /64/);
307 $code.=<<___ if ($flavour =~ /64/);
309 .inst 0xd50323bf // autiasp
313 .size ${prefix}_set_decrypt_key,.-${prefix}_set_decrypt_key
319 my ($e,$mc) = $dir eq "en" ? ("e","mc") : ("d","imc");
320 my ($inp,$out,$key)=map("x$_",(0..2));
322 my ($rndkey0,$rndkey1,$inout)=map("q$_",(0..3));
325 .globl ${prefix}_${dir}crypt
326 .type ${prefix}_${dir}crypt,%function
328 ${prefix}_${dir}crypt:
329 ldr $rounds,[$key,#240]
330 vld1.32 {$rndkey0},[$key],#16
331 vld1.8 {$inout},[$inp]
332 sub $rounds,$rounds,#2
333 vld1.32 {$rndkey1},[$key],#16
336 aes$e $inout,$rndkey0
338 vld1.32 {$rndkey0},[$key],#16
339 subs $rounds,$rounds,#2
340 aes$e $inout,$rndkey1
342 vld1.32 {$rndkey1},[$key],#16
345 aes$e $inout,$rndkey0
347 vld1.32 {$rndkey0},[$key]
348 aes$e $inout,$rndkey1
349 veor $inout,$inout,$rndkey0
351 vst1.8 {$inout},[$out]
353 .size ${prefix}_${dir}crypt,.-${prefix}_${dir}crypt
360 my ($inp,$out,$len,$key,$ivp)=map("x$_",(0..4)); my $enc="w5";
361 my ($rounds,$cnt,$key_,$step,$step1)=($enc,"w6","x7","x8","x12");
362 my ($dat0,$dat1,$in0,$in1,$tmp0,$tmp1,$ivec,$rndlast)=map("q$_",(0..7));
364 my ($dat,$tmp,$rndzero_n_last)=($dat0,$tmp0,$tmp1);
365 my ($key4,$key5,$key6,$key7)=("x6","x12","x14",$key);
367 ### q8-q15 preloaded key schedule
370 .globl ${prefix}_cbc_encrypt
371 .type ${prefix}_cbc_encrypt,%function
373 ${prefix}_cbc_encrypt:
375 $code.=<<___ if ($flavour =~ /64/);
376 stp x29,x30,[sp,#-16]!
379 $code.=<<___ if ($flavour !~ /64/);
382 vstmdb sp!,{d8-d15} @ ABI specification says so
383 ldmia ip,{r4-r5} @ load remaining args
391 cmp $enc,#0 // en- or decrypting?
392 ldr $rounds,[$key,#240]
394 vld1.8 {$ivec},[$ivp]
395 vld1.8 {$dat},[$inp],$step
397 vld1.32 {q8-q9},[$key] // load key schedule...
398 sub $rounds,$rounds,#6
399 add $key_,$key,x5,lsl#4 // pointer to last 7 round keys
400 sub $rounds,$rounds,#2
401 vld1.32 {q10-q11},[$key_],#32
402 vld1.32 {q12-q13},[$key_],#32
403 vld1.32 {q14-q15},[$key_],#32
404 vld1.32 {$rndlast},[$key_]
412 veor $rndzero_n_last,q8,$rndlast
415 vld1.32 {$in0-$in1},[$key_]
429 vst1.8 {$ivec},[$out],#16
461 vld1.8 {q8},[$inp],$step
464 veor q8,q8,$rndzero_n_last
467 vld1.32 {q9},[$key_] // re-pre-load rndkey[1]
471 veor $ivec,$dat,$rndlast
474 vst1.8 {$ivec},[$out],#16
479 vld1.32 {$in0-$in1},[$key_]
486 vst1.8 {$ivec},[$out],#16
500 vld1.8 {q8},[$inp],$step
507 veor q8,q8,$rndzero_n_last
509 veor $ivec,$dat,$rndlast
510 b.hs .Loop_cbc_enc128
512 vst1.8 {$ivec},[$out],#16
516 my ($dat2,$in2,$tmp2)=map("q$_",(10,11,9));
520 vld1.8 {$dat2},[$inp],#16
521 subs $len,$len,#32 // bias
525 vorr $in2,$dat2,$dat2
528 vorr $dat1,$dat2,$dat2
529 vld1.8 {$dat2},[$inp],#16
531 vorr $in1,$dat1,$dat1
532 vorr $in2,$dat2,$dat2
541 vld1.32 {q8},[$key_],#16
549 vld1.32 {q9},[$key_],#16
558 veor $tmp0,$ivec,$rndlast
560 veor $tmp1,$in0,$rndlast
561 mov.lo x6,$len // x6, $cnt, is zero at this point
568 veor $tmp2,$in1,$rndlast
569 add $inp,$inp,x6 // $inp is adjusted in such way that
570 // at exit from the loop $dat1-$dat2
571 // are loaded with last "words"
580 vld1.8 {$in0},[$inp],#16
587 vld1.8 {$in1},[$inp],#16
594 vld1.8 {$in2},[$inp],#16
598 vld1.32 {q8},[$key_],#16 // re-pre-load rndkey[0]
600 veor $tmp0,$tmp0,$dat0
601 veor $tmp1,$tmp1,$dat1
602 veor $dat2,$dat2,$tmp2
603 vld1.32 {q9},[$key_],#16 // re-pre-load rndkey[1]
604 vst1.8 {$tmp0},[$out],#16
606 vst1.8 {$tmp1},[$out],#16
608 vst1.8 {$dat2},[$out],#16
621 vld1.32 {q8},[$key_],#16
627 vld1.32 {q9},[$key_],#16
647 veor $tmp1,$ivec,$rndlast
652 veor $tmp2,$in1,$rndlast
656 veor $tmp1,$tmp1,$dat1
657 veor $tmp2,$tmp2,$dat2
659 vst1.8 {$tmp1},[$out],#16
660 vst1.8 {$tmp2},[$out],#16
664 veor $tmp1,$tmp1,$dat2
666 vst1.8 {$tmp1},[$out],#16
669 vst1.8 {$ivec},[$ivp]
673 $code.=<<___ if ($flavour !~ /64/);
677 $code.=<<___ if ($flavour =~ /64/);
682 .size ${prefix}_cbc_encrypt,.-${prefix}_cbc_encrypt
686 my ($inp,$out,$len,$key,$ivp)=map("x$_",(0..4));
687 my ($rounds,$cnt,$key_)=("w5","w6","x7");
688 my ($ctr,$tctr0,$tctr1,$tctr2)=map("w$_",(8..10,12));
689 my $step="x12"; # aliases with $tctr2
691 my ($dat0,$dat1,$in0,$in1,$tmp0,$tmp1,$ivec,$rndlast)=map("q$_",(0..7));
692 my ($dat2,$in2,$tmp2)=map("q$_",(10,11,9));
694 my ($dat,$tmp)=($dat0,$tmp0);
696 ### q8-q15 preloaded key schedule
699 .globl ${prefix}_ctr32_encrypt_blocks
700 .type ${prefix}_ctr32_encrypt_blocks,%function
702 ${prefix}_ctr32_encrypt_blocks:
704 $code.=<<___ if ($flavour =~ /64/);
705 stp x29,x30,[sp,#-16]!
708 $code.=<<___ if ($flavour !~ /64/);
710 stmdb sp!,{r4-r10,lr}
711 vstmdb sp!,{d8-d15} @ ABI specification says so
712 ldr r4, [ip] @ load remaining arg
715 ldr $rounds,[$key,#240]
717 ldr $ctr, [$ivp, #12]
718 vld1.32 {$dat0},[$ivp]
720 vld1.32 {q8-q9},[$key] // load key schedule...
721 sub $rounds,$rounds,#4
724 add $key_,$key,x5,lsl#4 // pointer to last 5 round keys
725 sub $rounds,$rounds,#2
726 vld1.32 {q12-q13},[$key_],#32
727 vld1.32 {q14-q15},[$key_],#32
728 vld1.32 {$rndlast},[$key_]
735 vorr $dat1,$dat0,$dat0
737 vorr $dat2,$dat0,$dat0
739 vorr $ivec,$dat0,$dat0
741 vmov.32 ${dat1}[3],$tctr1
744 sub $len,$len,#3 // bias
745 vmov.32 ${dat2}[3],$tctr2
756 vld1.32 {q8},[$key_],#16
764 vld1.32 {q9},[$key_],#16
771 vld1.8 {$in0},[$inp],#16
772 vorr $dat0,$ivec,$ivec
775 vld1.8 {$in1},[$inp],#16
776 vorr $dat1,$ivec,$ivec
781 vld1.8 {$in2},[$inp],#16
785 vorr $dat2,$ivec,$ivec
791 veor $in0,$in0,$rndlast
795 veor $in1,$in1,$rndlast
801 veor $in2,$in2,$rndlast
805 vmov.32 ${dat0}[3], $tctr0
811 vmov.32 ${dat1}[3], $tctr1
815 vmov.32 ${dat2}[3], $tctr2
822 vld1.32 {q8},[$key_],#16 // re-pre-load rndkey[0]
823 vst1.8 {$in0},[$out],#16
826 vst1.8 {$in1},[$out],#16
828 vld1.32 {q9},[$key_],#16 // re-pre-load rndkey[1]
829 vst1.8 {$in2},[$out],#16
843 vld1.32 {q8},[$key_],#16
849 vld1.32 {q9},[$key_],#16
860 vld1.8 {$in0},[$inp],$step
870 veor $in0,$in0,$rndlast
875 veor $in1,$in1,$rndlast
882 vst1.8 {$in0},[$out],#16
888 $code.=<<___ if ($flavour !~ /64/);
890 ldmia sp!,{r4-r10,pc}
892 $code.=<<___ if ($flavour =~ /64/);
897 .size ${prefix}_ctr32_encrypt_blocks,.-${prefix}_ctr32_encrypt_blocks
903 ########################################
904 if ($flavour =~ /64/) { ######## 64-bit code
906 "aesd" => 0x4e285800, "aese" => 0x4e284800,
907 "aesimc"=> 0x4e287800, "aesmc" => 0x4e286800 );
910 my ($mnemonic,$arg)=@_;
912 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)/o &&
913 sprintf ".inst\t0x%08x\t//%s %s",
914 $opcode{$mnemonic}|$1|($2<<5),
918 foreach(split("\n",$code)) {
919 s/\`([^\`]*)\`/eval($1)/geo;
921 s/\bq([0-9]+)\b/"v".($1<8?$1:$1+8).".16b"/geo; # old->new registers
922 s/@\s/\/\//o; # old->new style commentary
924 #s/[v]?(aes\w+)\s+([qv].*)/unaes($1,$2)/geo or
925 s/cclr\s+([wx])([^,]+),\s*([a-z]+)/csel $1$2,$1zr,$1$2,$3/o or
926 s/mov\.([a-z]+)\s+([wx][0-9]+),\s*([wx][0-9]+)/csel $2,$3,$2,$1/o or
927 s/vmov\.i8/movi/o or # fix up legacy mnemonics
929 s/vrev32\.8/rev32/o or
932 s/^(\s+)v/$1/o or # strip off v prefix
935 # fix up remaining legacy suffixes
937 m/\],#8/o and s/\.16b/\.8b/go;
938 s/\.[ui]?32//o and s/\.16b/\.4s/go;
939 s/\.[ui]?64//o and s/\.16b/\.2d/go;
940 s/\.[42]([sd])\[([0-3])\]/\.$1\[$2\]/o;
944 } else { ######## 32-bit code
946 "aesd" => 0xf3b00340, "aese" => 0xf3b00300,
947 "aesimc"=> 0xf3b003c0, "aesmc" => 0xf3b00380 );
950 my ($mnemonic,$arg)=@_;
952 if ($arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)/o) {
953 my $word = $opcode{$mnemonic}|(($1&7)<<13)|(($1&8)<<19)
954 |(($2&7)<<1) |(($2&8)<<2);
955 # since ARMv7 instructions are always encoded little-endian.
956 # correct solution is to use .inst directive, but older
957 # assemblers don't implement it:-(
958 sprintf ".byte\t0x%02x,0x%02x,0x%02x,0x%02x\t@ %s %s",
959 $word&0xff,($word>>8)&0xff,
960 ($word>>16)&0xff,($word>>24)&0xff,
968 $arg =~ m/q([0-9]+),\s*\{q([0-9]+)\},\s*q([0-9]+)/o &&
969 sprintf "vtbl.8 d%d,{q%d},d%d\n\t".
970 "vtbl.8 d%d,{q%d},d%d", 2*$1,$2,2*$3, 2*$1+1,$2,2*$3+1;
976 $arg =~ m/q([0-9]+),\s*q([0-9]+)\[([0-3])\]/o &&
977 sprintf "vdup.32 q%d,d%d[%d]",$1,2*$2+($3>>1),$3&1;
983 $arg =~ m/q([0-9]+)\[([0-3])\],(.*)/o &&
984 sprintf "vmov.32 d%d[%d],%s",2*$1+($2>>1),$2&1,$3;
987 foreach(split("\n",$code)) {
988 s/\`([^\`]*)\`/eval($1)/geo;
990 s/\b[wx]([0-9]+)\b/r$1/go; # new->old registers
991 s/\bv([0-9])\.[12468]+[bsd]\b/q$1/go; # new->old registers
992 s/\/\/\s?/@ /o; # new->old style commentary
994 # fix up remaining new-style suffixes
995 s/\{q([0-9]+)\},\s*\[(.+)\],#8/sprintf "{d%d},[$2]!",2*$1/eo or
998 s/[v]?(aes\w+)\s+([qv].*)/unaes($1,$2)/geo or
999 s/cclr\s+([^,]+),\s*([a-z]+)/mov$2 $1,#0/o or
1000 s/vtbl\.8\s+(.*)/unvtbl($1)/geo or
1001 s/vdup\.32\s+(.*)/unvdup32($1)/geo or
1002 s/vmov\.32\s+(.*)/unvmov32($1)/geo or
1003 s/^(\s+)b\./$1b/o or
1004 s/^(\s+)mov\./$1mov/o or
1005 s/^(\s+)ret/$1bx\tlr/o;