1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/ValueTracking.h"
19 #include "llvm/Function.h"
20 #include "llvm/GlobalAlias.h"
21 #include "llvm/GlobalVariable.h"
22 #include "llvm/Intrinsics.h"
23 #include "llvm/DerivedTypes.h"
24 #include "llvm/Assembly/Writer.h"
25 #include "llvm/CallingConv.h"
26 #include "llvm/CodeGen/MachineBasicBlock.h"
27 #include "llvm/CodeGen/MachineConstantPool.h"
28 #include "llvm/CodeGen/MachineFrameInfo.h"
29 #include "llvm/CodeGen/MachineModuleInfo.h"
30 #include "llvm/CodeGen/PseudoSourceValue.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetFrameInfo.h"
34 #include "llvm/Target/TargetLowering.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/System/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f32: return &APFloat::IEEEsingle;
66 case MVT::f64: return &APFloat::IEEEdouble;
67 case MVT::f80: return &APFloat::x87DoubleExtended;
68 case MVT::f128: return &APFloat::IEEEquad;
69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
73 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
75 //===----------------------------------------------------------------------===//
76 // ConstantFPSDNode Class
77 //===----------------------------------------------------------------------===//
79 /// isExactlyValue - We don't rely on operator== working on double values, as
80 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
81 /// As such, this method can be used to do an exact bit-for-bit comparison of
82 /// two floating point values.
83 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
84 return getValueAPF().bitwiseIsEqual(V);
87 bool ConstantFPSDNode::isValueValidForType(EVT VT,
89 assert(VT.isFloatingPoint() && "Can only convert between FP types");
91 // PPC long double cannot be converted to any other type.
92 if (VT == MVT::ppcf128 ||
93 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
96 // convert modifies in place, so make a copy.
97 APFloat Val2 = APFloat(Val);
99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
104 //===----------------------------------------------------------------------===//
106 //===----------------------------------------------------------------------===//
108 /// isBuildVectorAllOnes - Return true if the specified node is a
109 /// BUILD_VECTOR where all of the elements are ~0 or undef.
110 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
111 // Look through a bit convert.
112 if (N->getOpcode() == ISD::BIT_CONVERT)
113 N = N->getOperand(0).getNode();
115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
117 unsigned i = 0, e = N->getNumOperands();
119 // Skip over all of the undef values.
120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
123 // Do not accept an all-undef vector.
124 if (i == e) return false;
126 // Do not accept build_vectors that aren't all constants or which have non-~0
128 SDValue NotZero = N->getOperand(i);
129 if (isa<ConstantSDNode>(NotZero)) {
130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
132 } else if (isa<ConstantFPSDNode>(NotZero)) {
133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
134 bitcastToAPInt().isAllOnesValue())
139 // Okay, we have at least one ~0 value, check to see if the rest match or are
141 for (++i; i != e; ++i)
142 if (N->getOperand(i) != NotZero &&
143 N->getOperand(i).getOpcode() != ISD::UNDEF)
149 /// isBuildVectorAllZeros - Return true if the specified node is a
150 /// BUILD_VECTOR where all of the elements are 0 or undef.
151 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
152 // Look through a bit convert.
153 if (N->getOpcode() == ISD::BIT_CONVERT)
154 N = N->getOperand(0).getNode();
156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
158 unsigned i = 0, e = N->getNumOperands();
160 // Skip over all of the undef values.
161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
164 // Do not accept an all-undef vector.
165 if (i == e) return false;
167 // Do not accept build_vectors that aren't all constants or which have non-0
169 SDValue Zero = N->getOperand(i);
170 if (isa<ConstantSDNode>(Zero)) {
171 if (!cast<ConstantSDNode>(Zero)->isNullValue())
173 } else if (isa<ConstantFPSDNode>(Zero)) {
174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
179 // Okay, we have at least one 0 value, check to see if the rest match or are
181 for (++i; i != e; ++i)
182 if (N->getOperand(i) != Zero &&
183 N->getOperand(i).getOpcode() != ISD::UNDEF)
188 /// isScalarToVector - Return true if the specified node is a
189 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
190 /// element is not an undef.
191 bool ISD::isScalarToVector(const SDNode *N) {
192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
195 if (N->getOpcode() != ISD::BUILD_VECTOR)
197 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
199 unsigned NumElems = N->getNumOperands();
200 for (unsigned i = 1; i < NumElems; ++i) {
201 SDValue V = N->getOperand(i);
202 if (V.getOpcode() != ISD::UNDEF)
208 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
209 /// when given the operation for (X op Y).
210 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
211 // To perform this operation, we just need to swap the L and G bits of the
213 unsigned OldL = (Operation >> 2) & 1;
214 unsigned OldG = (Operation >> 1) & 1;
215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
216 (OldL << 1) | // New G bit
217 (OldG << 2)); // New L bit.
220 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
221 /// 'op' is a valid SetCC operation.
222 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
223 unsigned Operation = Op;
225 Operation ^= 7; // Flip L, G, E bits, but not U.
227 Operation ^= 15; // Flip all of the condition bits.
229 if (Operation > ISD::SETTRUE2)
230 Operation &= ~8; // Don't let N and U bits get set.
232 return ISD::CondCode(Operation);
236 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
237 /// signed operation and 2 if the result is an unsigned comparison. Return zero
238 /// if the operation does not depend on the sign of the input (setne and seteq).
239 static int isSignedOp(ISD::CondCode Opcode) {
241 default: llvm_unreachable("Illegal integer setcc operation!");
243 case ISD::SETNE: return 0;
247 case ISD::SETGE: return 1;
251 case ISD::SETUGE: return 2;
255 /// getSetCCOrOperation - Return the result of a logical OR between different
256 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
257 /// returns SETCC_INVALID if it is not possible to represent the resultant
259 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
262 // Cannot fold a signed integer setcc with an unsigned integer setcc.
263 return ISD::SETCC_INVALID;
265 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
267 // If the N and U bits get set then the resultant comparison DOES suddenly
268 // care about orderedness, and is true when ordered.
269 if (Op > ISD::SETTRUE2)
270 Op &= ~16; // Clear the U bit if the N bit is set.
272 // Canonicalize illegal integer setcc's.
273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
276 return ISD::CondCode(Op);
279 /// getSetCCAndOperation - Return the result of a logical AND between different
280 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
281 /// function returns zero if it is not possible to represent the resultant
283 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
286 // Cannot fold a signed setcc with an unsigned setcc.
287 return ISD::SETCC_INVALID;
289 // Combine all of the condition bits.
290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
292 // Canonicalize illegal integer setcc's.
296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
297 case ISD::SETOEQ: // SETEQ & SETU[LG]E
298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
307 const TargetMachine &SelectionDAG::getTarget() const {
308 return MF->getTarget();
311 //===----------------------------------------------------------------------===//
312 // SDNode Profile Support
313 //===----------------------------------------------------------------------===//
315 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
317 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
321 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
322 /// solely with their pointer.
323 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
324 ID.AddPointer(VTList.VTs);
327 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
329 static void AddNodeIDOperands(FoldingSetNodeID &ID,
330 const SDValue *Ops, unsigned NumOps) {
331 for (; NumOps; --NumOps, ++Ops) {
332 ID.AddPointer(Ops->getNode());
333 ID.AddInteger(Ops->getResNo());
337 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
339 static void AddNodeIDOperands(FoldingSetNodeID &ID,
340 const SDUse *Ops, unsigned NumOps) {
341 for (; NumOps; --NumOps, ++Ops) {
342 ID.AddPointer(Ops->getNode());
343 ID.AddInteger(Ops->getResNo());
347 static void AddNodeIDNode(FoldingSetNodeID &ID,
348 unsigned short OpC, SDVTList VTList,
349 const SDValue *OpList, unsigned N) {
350 AddNodeIDOpcode(ID, OpC);
351 AddNodeIDValueTypes(ID, VTList);
352 AddNodeIDOperands(ID, OpList, N);
355 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
357 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
358 switch (N->getOpcode()) {
359 case ISD::TargetExternalSymbol:
360 case ISD::ExternalSymbol:
361 llvm_unreachable("Should only be used on nodes with operands");
362 default: break; // Normal nodes don't need extra info.
363 case ISD::TargetConstant:
365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
367 case ISD::TargetConstantFP:
368 case ISD::ConstantFP: {
369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
372 case ISD::TargetGlobalAddress:
373 case ISD::GlobalAddress:
374 case ISD::TargetGlobalTLSAddress:
375 case ISD::GlobalTLSAddress: {
376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
377 ID.AddPointer(GA->getGlobal());
378 ID.AddInteger(GA->getOffset());
379 ID.AddInteger(GA->getTargetFlags());
382 case ISD::BasicBlock:
383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
392 case ISD::FrameIndex:
393 case ISD::TargetFrameIndex:
394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
397 case ISD::TargetJumpTable:
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
401 case ISD::ConstantPool:
402 case ISD::TargetConstantPool: {
403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
404 ID.AddInteger(CP->getAlignment());
405 ID.AddInteger(CP->getOffset());
406 if (CP->isMachineConstantPoolEntry())
407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
409 ID.AddPointer(CP->getConstVal());
410 ID.AddInteger(CP->getTargetFlags());
414 const LoadSDNode *LD = cast<LoadSDNode>(N);
415 ID.AddInteger(LD->getMemoryVT().getRawBits());
416 ID.AddInteger(LD->getRawSubclassData());
420 const StoreSDNode *ST = cast<StoreSDNode>(N);
421 ID.AddInteger(ST->getMemoryVT().getRawBits());
422 ID.AddInteger(ST->getRawSubclassData());
425 case ISD::ATOMIC_CMP_SWAP:
426 case ISD::ATOMIC_SWAP:
427 case ISD::ATOMIC_LOAD_ADD:
428 case ISD::ATOMIC_LOAD_SUB:
429 case ISD::ATOMIC_LOAD_AND:
430 case ISD::ATOMIC_LOAD_OR:
431 case ISD::ATOMIC_LOAD_XOR:
432 case ISD::ATOMIC_LOAD_NAND:
433 case ISD::ATOMIC_LOAD_MIN:
434 case ISD::ATOMIC_LOAD_MAX:
435 case ISD::ATOMIC_LOAD_UMIN:
436 case ISD::ATOMIC_LOAD_UMAX: {
437 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
438 ID.AddInteger(AT->getMemoryVT().getRawBits());
439 ID.AddInteger(AT->getRawSubclassData());
442 case ISD::VECTOR_SHUFFLE: {
443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
446 ID.AddInteger(SVN->getMaskElt(i));
449 case ISD::TargetBlockAddress:
450 case ISD::BlockAddress: {
451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
455 } // end switch (N->getOpcode())
458 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
460 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
461 AddNodeIDOpcode(ID, N->getOpcode());
462 // Add the return value info.
463 AddNodeIDValueTypes(ID, N->getVTList());
464 // Add the operand info.
465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
467 // Handle SDNode leafs with special info.
468 AddNodeIDCustom(ID, N);
471 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
472 /// the CSE map that carries volatility, temporalness, indexing mode, and
473 /// extension/truncation information.
475 static inline unsigned
476 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
477 bool isNonTemporal) {
478 assert((ConvType & 3) == ConvType &&
479 "ConvType may not require more than 2 bits!");
480 assert((AM & 7) == AM &&
481 "AM may not require more than 3 bits!");
485 (isNonTemporal << 6);
488 //===----------------------------------------------------------------------===//
489 // SelectionDAG Class
490 //===----------------------------------------------------------------------===//
492 /// doNotCSE - Return true if CSE should not be performed for this node.
493 static bool doNotCSE(SDNode *N) {
494 if (N->getValueType(0) == MVT::Flag)
495 return true; // Never CSE anything that produces a flag.
497 switch (N->getOpcode()) {
499 case ISD::HANDLENODE:
501 return true; // Never CSE these nodes.
504 // Check that remaining values produced are not flags.
505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
506 if (N->getValueType(i) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
512 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
514 void SelectionDAG::RemoveDeadNodes() {
515 // Create a dummy node (which is not added to allnodes), that adds a reference
516 // to the root node, preventing it from being deleted.
517 HandleSDNode Dummy(getRoot());
519 SmallVector<SDNode*, 128> DeadNodes;
521 // Add all obviously-dead nodes to the DeadNodes worklist.
522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
524 DeadNodes.push_back(I);
526 RemoveDeadNodes(DeadNodes);
528 // If the root changed (e.g. it was a dead load, update the root).
529 setRoot(Dummy.getValue());
532 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
533 /// given list, and any nodes that become unreachable as a result.
534 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
535 DAGUpdateListener *UpdateListener) {
537 // Process the worklist, deleting the nodes and adding their uses to the
539 while (!DeadNodes.empty()) {
540 SDNode *N = DeadNodes.pop_back_val();
543 UpdateListener->NodeDeleted(N, 0);
545 // Take the node out of the appropriate CSE map.
546 RemoveNodeFromCSEMaps(N);
548 // Next, brutally remove the operand list. This is safe to do, as there are
549 // no cycles in the graph.
550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
552 SDNode *Operand = Use.getNode();
555 // Now that we removed this operand, see if there are no uses of it left.
556 if (Operand->use_empty())
557 DeadNodes.push_back(Operand);
564 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
565 SmallVector<SDNode*, 16> DeadNodes(1, N);
566 RemoveDeadNodes(DeadNodes, UpdateListener);
569 void SelectionDAG::DeleteNode(SDNode *N) {
570 // First take this out of the appropriate CSE map.
571 RemoveNodeFromCSEMaps(N);
573 // Finally, remove uses due to operands of this node, remove from the
574 // AllNodes list, and delete the node.
575 DeleteNodeNotInCSEMaps(N);
578 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
579 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
580 assert(N->use_empty() && "Cannot delete a node that is not dead!");
582 // Drop all of the operands and decrement used node's use counts.
588 void SelectionDAG::DeallocateNode(SDNode *N) {
589 if (N->OperandsNeedDelete)
590 delete[] N->OperandList;
592 // Set the opcode to DELETED_NODE to help catch bugs when node
593 // memory is reallocated.
594 N->NodeType = ISD::DELETED_NODE;
596 NodeAllocator.Deallocate(AllNodes.remove(N));
598 // Remove the ordering of this node.
601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
604 DbgVals[i]->setIsInvalidated();
607 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
608 /// correspond to it. This is useful when we're about to delete or repurpose
609 /// the node. We don't want future request for structurally identical nodes
610 /// to return N anymore.
611 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
613 switch (N->getOpcode()) {
614 case ISD::EntryToken:
615 llvm_unreachable("EntryToken should not be in CSEMaps!");
617 case ISD::HANDLENODE: return false; // noop.
619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
620 "Cond code doesn't exist!");
621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
624 case ISD::ExternalSymbol:
625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
627 case ISD::TargetExternalSymbol: {
628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
629 Erased = TargetExternalSymbols.erase(
630 std::pair<std::string,unsigned char>(ESN->getSymbol(),
631 ESN->getTargetFlags()));
634 case ISD::VALUETYPE: {
635 EVT VT = cast<VTSDNode>(N)->getVT();
636 if (VT.isExtended()) {
637 Erased = ExtendedValueTypeNodes.erase(VT);
639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
645 // Remove it from the CSE Map.
646 Erased = CSEMap.RemoveNode(N);
650 // Verify that the node was actually in one of the CSE maps, unless it has a
651 // flag result (which cannot be CSE'd) or is one of the special cases that are
652 // not subject to CSE.
653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
654 !N->isMachineOpcode() && !doNotCSE(N)) {
657 llvm_unreachable("Node is not in map!");
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670 DAGUpdateListener *UpdateListener) {
671 // For node types that aren't CSE'd, just act as if no identical node
674 SDNode *Existing = CSEMap.GetOrInsertNode(N);
676 // If there was already an existing matching node, use ReplaceAllUsesWith
677 // to replace the dead one with the existing one. This can cause
678 // recursive merging of other unrelated nodes down the line.
679 ReplaceAllUsesWith(N, Existing, UpdateListener);
681 // N is now dead. Inform the listener if it exists and delete it.
683 UpdateListener->NodeDeleted(N, Existing);
684 DeleteNodeNotInCSEMaps(N);
689 // If the node doesn't already exist, we updated it. Inform a listener if
692 UpdateListener->NodeUpdated(N);
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified. If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take. If a
698 /// node already exists with these operands, the slot will be non-null.
699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
704 SDValue Ops[] = { Op };
706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707 AddNodeIDCustom(ID, N);
708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717 SDValue Op1, SDValue Op2,
722 SDValue Ops[] = { Op1, Op2 };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified. If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take. If a
734 /// node already exists with these operands, the slot will be non-null.
735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736 const SDValue *Ops,unsigned NumOps,
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
748 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
749 void SelectionDAG::VerifyNode(SDNode *N) {
750 switch (N->getOpcode()) {
753 case ISD::BUILD_PAIR: {
754 EVT VT = N->getValueType(0);
755 assert(N->getNumValues() == 1 && "Too many results!");
756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
757 "Wrong return type!");
758 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
760 "Mismatched operand types!");
761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
762 "Wrong operand type!");
763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
764 "Wrong return type size");
767 case ISD::BUILD_VECTOR: {
768 assert(N->getNumValues() == 1 && "Too many results!");
769 assert(N->getValueType(0).isVector() && "Wrong return type!");
770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
771 "Wrong number of operands!");
772 EVT EltVT = N->getValueType(0).getVectorElementType();
773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
774 assert((I->getValueType() == EltVT ||
775 (EltVT.isInteger() && I->getValueType().isInteger() &&
776 EltVT.bitsLE(I->getValueType()))) &&
777 "Wrong operand type!");
783 /// getEVTAlignment - Compute the default alignment value for the
786 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
787 const Type *Ty = VT == MVT::iPTR ?
788 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
789 VT.getTypeForEVT(*getContext());
791 return TLI.getTargetData()->getABITypeAlignment(Ty);
794 // EntryNode could meaningfully have debug info if we can find it...
795 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
796 : TLI(tli), FLI(fli), DW(0),
797 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
798 getVTList(MVT::Other)),
799 Root(getEntryNode()), Ordering(0) {
800 AllNodes.push_back(&EntryNode);
801 Ordering = new SDNodeOrdering();
802 DbgInfo = new SDDbgInfo();
805 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
810 Context = &mf.getFunction()->getContext();
813 SelectionDAG::~SelectionDAG() {
820 void SelectionDAG::allnodes_clear() {
821 assert(&*AllNodes.begin() == &EntryNode);
822 AllNodes.remove(AllNodes.begin());
823 while (!AllNodes.empty())
824 DeallocateNode(AllNodes.begin());
827 void SelectionDAG::clear() {
829 OperandAllocator.Reset();
832 ExtendedValueTypeNodes.clear();
833 ExternalSymbols.clear();
834 TargetExternalSymbols.clear();
835 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
836 static_cast<CondCodeSDNode*>(0));
837 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
838 static_cast<SDNode*>(0));
840 EntryNode.UseList = 0;
841 AllNodes.push_back(&EntryNode);
842 Root = getEntryNode();
844 Ordering = new SDNodeOrdering();
847 DbgInfo = new SDDbgInfo();
850 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
851 return VT.bitsGT(Op.getValueType()) ?
852 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
853 getNode(ISD::TRUNCATE, DL, VT, Op);
856 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
857 return VT.bitsGT(Op.getValueType()) ?
858 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
859 getNode(ISD::TRUNCATE, DL, VT, Op);
862 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
863 assert(!VT.isVector() &&
864 "getZeroExtendInReg should use the vector element type instead of "
866 if (Op.getValueType() == VT) return Op;
867 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
868 APInt Imm = APInt::getLowBitsSet(BitWidth,
870 return getNode(ISD::AND, DL, Op.getValueType(), Op,
871 getConstant(Imm, Op.getValueType()));
874 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
876 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
877 EVT EltVT = VT.getScalarType();
879 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
880 return getNode(ISD::XOR, DL, VT, Val, NegOne);
883 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
884 EVT EltVT = VT.getScalarType();
885 assert((EltVT.getSizeInBits() >= 64 ||
886 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
887 "getConstant with a uint64_t value that doesn't fit in the type!");
888 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
891 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
892 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
895 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
896 assert(VT.isInteger() && "Cannot create FP integer constant!");
898 EVT EltVT = VT.getScalarType();
899 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
900 "APInt size does not match type size!");
902 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
904 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
908 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
910 return SDValue(N, 0);
913 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
914 CSEMap.InsertNode(N, IP);
915 AllNodes.push_back(N);
918 SDValue Result(N, 0);
920 SmallVector<SDValue, 8> Ops;
921 Ops.assign(VT.getVectorNumElements(), Result);
922 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
923 VT, &Ops[0], Ops.size());
928 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
929 return getConstant(Val, TLI.getPointerTy(), isTarget);
933 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
934 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
937 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
938 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
940 EVT EltVT = VT.getScalarType();
942 // Do the map lookup using the actual bit pattern for the floating point
943 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
944 // we don't have issues with SNANs.
945 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
947 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
951 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
953 return SDValue(N, 0);
956 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
957 CSEMap.InsertNode(N, IP);
958 AllNodes.push_back(N);
961 SDValue Result(N, 0);
963 SmallVector<SDValue, 8> Ops;
964 Ops.assign(VT.getVectorNumElements(), Result);
965 // FIXME DebugLoc info might be appropriate here
966 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
967 VT, &Ops[0], Ops.size());
972 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
973 EVT EltVT = VT.getScalarType();
975 return getConstantFP(APFloat((float)Val), VT, isTarget);
977 return getConstantFP(APFloat(Val), VT, isTarget);
980 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
981 EVT VT, int64_t Offset,
983 unsigned char TargetFlags) {
984 assert((TargetFlags == 0 || isTargetGA) &&
985 "Cannot set target flags on target-independent globals");
987 // Truncate (with sign-extension) the offset value to the pointer size.
988 EVT PTy = TLI.getPointerTy();
989 unsigned BitWidth = PTy.getSizeInBits();
991 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
993 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
995 // If GV is an alias then use the aliasee for determining thread-localness.
996 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
997 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1001 if (GVar && GVar->isThreadLocal())
1002 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1004 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1006 FoldingSetNodeID ID;
1007 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1009 ID.AddInteger(Offset);
1010 ID.AddInteger(TargetFlags);
1012 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1013 return SDValue(E, 0);
1015 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT,
1016 Offset, TargetFlags);
1017 CSEMap.InsertNode(N, IP);
1018 AllNodes.push_back(N);
1019 return SDValue(N, 0);
1022 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1023 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1024 FoldingSetNodeID ID;
1025 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1028 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1029 return SDValue(E, 0);
1031 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1032 CSEMap.InsertNode(N, IP);
1033 AllNodes.push_back(N);
1034 return SDValue(N, 0);
1037 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1038 unsigned char TargetFlags) {
1039 assert((TargetFlags == 0 || isTarget) &&
1040 "Cannot set target flags on target-independent jump tables");
1041 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1042 FoldingSetNodeID ID;
1043 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1045 ID.AddInteger(TargetFlags);
1047 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1048 return SDValue(E, 0);
1050 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1052 CSEMap.InsertNode(N, IP);
1053 AllNodes.push_back(N);
1054 return SDValue(N, 0);
1057 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1058 unsigned Alignment, int Offset,
1060 unsigned char TargetFlags) {
1061 assert((TargetFlags == 0 || isTarget) &&
1062 "Cannot set target flags on target-independent globals");
1064 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1065 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1066 FoldingSetNodeID ID;
1067 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1068 ID.AddInteger(Alignment);
1069 ID.AddInteger(Offset);
1071 ID.AddInteger(TargetFlags);
1073 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1074 return SDValue(E, 0);
1076 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1077 Alignment, TargetFlags);
1078 CSEMap.InsertNode(N, IP);
1079 AllNodes.push_back(N);
1080 return SDValue(N, 0);
1084 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1085 unsigned Alignment, int Offset,
1087 unsigned char TargetFlags) {
1088 assert((TargetFlags == 0 || isTarget) &&
1089 "Cannot set target flags on target-independent globals");
1091 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1092 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1093 FoldingSetNodeID ID;
1094 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1095 ID.AddInteger(Alignment);
1096 ID.AddInteger(Offset);
1097 C->AddSelectionDAGCSEId(ID);
1098 ID.AddInteger(TargetFlags);
1100 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1101 return SDValue(E, 0);
1103 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1104 Alignment, TargetFlags);
1105 CSEMap.InsertNode(N, IP);
1106 AllNodes.push_back(N);
1107 return SDValue(N, 0);
1110 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1111 FoldingSetNodeID ID;
1112 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1115 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1116 return SDValue(E, 0);
1118 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1119 CSEMap.InsertNode(N, IP);
1120 AllNodes.push_back(N);
1121 return SDValue(N, 0);
1124 SDValue SelectionDAG::getValueType(EVT VT) {
1125 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1126 ValueTypeNodes.size())
1127 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1129 SDNode *&N = VT.isExtended() ?
1130 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1132 if (N) return SDValue(N, 0);
1133 N = new (NodeAllocator) VTSDNode(VT);
1134 AllNodes.push_back(N);
1135 return SDValue(N, 0);
1138 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1139 SDNode *&N = ExternalSymbols[Sym];
1140 if (N) return SDValue(N, 0);
1141 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1142 AllNodes.push_back(N);
1143 return SDValue(N, 0);
1146 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1147 unsigned char TargetFlags) {
1149 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1151 if (N) return SDValue(N, 0);
1152 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1153 AllNodes.push_back(N);
1154 return SDValue(N, 0);
1157 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1158 if ((unsigned)Cond >= CondCodeNodes.size())
1159 CondCodeNodes.resize(Cond+1);
1161 if (CondCodeNodes[Cond] == 0) {
1162 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1163 CondCodeNodes[Cond] = N;
1164 AllNodes.push_back(N);
1167 return SDValue(CondCodeNodes[Cond], 0);
1170 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1171 // the shuffle mask M that point at N1 to point at N2, and indices that point
1172 // N2 to point at N1.
1173 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1175 int NElts = M.size();
1176 for (int i = 0; i != NElts; ++i) {
1184 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1185 SDValue N2, const int *Mask) {
1186 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1187 assert(VT.isVector() && N1.getValueType().isVector() &&
1188 "Vector Shuffle VTs must be a vectors");
1189 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1190 && "Vector Shuffle VTs must have same element type");
1192 // Canonicalize shuffle undef, undef -> undef
1193 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1194 return getUNDEF(VT);
1196 // Validate that all indices in Mask are within the range of the elements
1197 // input to the shuffle.
1198 unsigned NElts = VT.getVectorNumElements();
1199 SmallVector<int, 8> MaskVec;
1200 for (unsigned i = 0; i != NElts; ++i) {
1201 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1202 MaskVec.push_back(Mask[i]);
1205 // Canonicalize shuffle v, v -> v, undef
1208 for (unsigned i = 0; i != NElts; ++i)
1209 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1212 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1213 if (N1.getOpcode() == ISD::UNDEF)
1214 commuteShuffle(N1, N2, MaskVec);
1216 // Canonicalize all index into lhs, -> shuffle lhs, undef
1217 // Canonicalize all index into rhs, -> shuffle rhs, undef
1218 bool AllLHS = true, AllRHS = true;
1219 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1220 for (unsigned i = 0; i != NElts; ++i) {
1221 if (MaskVec[i] >= (int)NElts) {
1226 } else if (MaskVec[i] >= 0) {
1230 if (AllLHS && AllRHS)
1231 return getUNDEF(VT);
1232 if (AllLHS && !N2Undef)
1236 commuteShuffle(N1, N2, MaskVec);
1239 // If Identity shuffle, or all shuffle in to undef, return that node.
1240 bool AllUndef = true;
1241 bool Identity = true;
1242 for (unsigned i = 0; i != NElts; ++i) {
1243 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1244 if (MaskVec[i] >= 0) AllUndef = false;
1246 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1249 return getUNDEF(VT);
1251 FoldingSetNodeID ID;
1252 SDValue Ops[2] = { N1, N2 };
1253 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1254 for (unsigned i = 0; i != NElts; ++i)
1255 ID.AddInteger(MaskVec[i]);
1258 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1259 return SDValue(E, 0);
1261 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1262 // SDNode doesn't have access to it. This memory will be "leaked" when
1263 // the node is deallocated, but recovered when the NodeAllocator is released.
1264 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1265 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1267 ShuffleVectorSDNode *N =
1268 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1269 CSEMap.InsertNode(N, IP);
1270 AllNodes.push_back(N);
1271 return SDValue(N, 0);
1274 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1275 SDValue Val, SDValue DTy,
1276 SDValue STy, SDValue Rnd, SDValue Sat,
1277 ISD::CvtCode Code) {
1278 // If the src and dest types are the same and the conversion is between
1279 // integer types of the same sign or two floats, no conversion is necessary.
1281 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1284 FoldingSetNodeID ID;
1285 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1286 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1288 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1289 return SDValue(E, 0);
1291 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1293 CSEMap.InsertNode(N, IP);
1294 AllNodes.push_back(N);
1295 return SDValue(N, 0);
1298 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1299 FoldingSetNodeID ID;
1300 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1301 ID.AddInteger(RegNo);
1303 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1304 return SDValue(E, 0);
1306 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1307 CSEMap.InsertNode(N, IP);
1308 AllNodes.push_back(N);
1309 return SDValue(N, 0);
1312 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1313 FoldingSetNodeID ID;
1314 SDValue Ops[] = { Root };
1315 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1316 ID.AddPointer(Label);
1318 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1319 return SDValue(E, 0);
1321 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1322 CSEMap.InsertNode(N, IP);
1323 AllNodes.push_back(N);
1324 return SDValue(N, 0);
1328 SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT,
1330 unsigned char TargetFlags) {
1331 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1333 FoldingSetNodeID ID;
1334 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1336 ID.AddInteger(TargetFlags);
1338 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1339 return SDValue(E, 0);
1341 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1342 CSEMap.InsertNode(N, IP);
1343 AllNodes.push_back(N);
1344 return SDValue(N, 0);
1347 SDValue SelectionDAG::getSrcValue(const Value *V) {
1348 assert((!V || V->getType()->isPointerTy()) &&
1349 "SrcValue is not a pointer?");
1351 FoldingSetNodeID ID;
1352 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1357 return SDValue(E, 0);
1359 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1360 CSEMap.InsertNode(N, IP);
1361 AllNodes.push_back(N);
1362 return SDValue(N, 0);
1365 /// getShiftAmountOperand - Return the specified value casted to
1366 /// the target's desired shift amount type.
1367 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1368 EVT OpTy = Op.getValueType();
1369 MVT ShTy = TLI.getShiftAmountTy();
1370 if (OpTy == ShTy || OpTy.isVector()) return Op;
1372 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1373 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1376 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1377 /// specified value type.
1378 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1379 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1380 unsigned ByteSize = VT.getStoreSize();
1381 const Type *Ty = VT.getTypeForEVT(*getContext());
1382 unsigned StackAlign =
1383 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1385 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1386 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1389 /// CreateStackTemporary - Create a stack temporary suitable for holding
1390 /// either of the specified value types.
1391 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1392 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1393 VT2.getStoreSizeInBits())/8;
1394 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1395 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1396 const TargetData *TD = TLI.getTargetData();
1397 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1398 TD->getPrefTypeAlignment(Ty2));
1400 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1401 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1402 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1405 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1406 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1407 // These setcc operations always fold.
1411 case ISD::SETFALSE2: return getConstant(0, VT);
1413 case ISD::SETTRUE2: return getConstant(1, VT);
1425 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1429 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1430 const APInt &C2 = N2C->getAPIntValue();
1431 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1432 const APInt &C1 = N1C->getAPIntValue();
1435 default: llvm_unreachable("Unknown integer setcc!");
1436 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1437 case ISD::SETNE: return getConstant(C1 != C2, VT);
1438 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1439 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1440 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1441 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1442 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1443 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1444 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1445 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1449 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1450 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1451 // No compile time operations on this type yet.
1452 if (N1C->getValueType(0) == MVT::ppcf128)
1455 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1458 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1459 return getUNDEF(VT);
1461 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1462 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1463 return getUNDEF(VT);
1465 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1466 R==APFloat::cmpLessThan, VT);
1467 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1468 return getUNDEF(VT);
1470 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1471 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1472 return getUNDEF(VT);
1474 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1475 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1476 return getUNDEF(VT);
1478 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1479 R==APFloat::cmpEqual, VT);
1480 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1481 return getUNDEF(VT);
1483 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1484 R==APFloat::cmpEqual, VT);
1485 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1486 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1487 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1488 R==APFloat::cmpEqual, VT);
1489 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1490 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1491 R==APFloat::cmpLessThan, VT);
1492 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1493 R==APFloat::cmpUnordered, VT);
1494 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1495 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1498 // Ensure that the constant occurs on the RHS.
1499 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1503 // Could not fold it.
1507 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1508 /// use this predicate to simplify operations downstream.
1509 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1510 // This predicate is not safe for vector operations.
1511 if (Op.getValueType().isVector())
1514 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1515 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1518 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1519 /// this predicate to simplify operations downstream. Mask is known to be zero
1520 /// for bits that V cannot have.
1521 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1522 unsigned Depth) const {
1523 APInt KnownZero, KnownOne;
1524 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1525 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1526 return (KnownZero & Mask) == Mask;
1529 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1530 /// known to be either zero or one and return them in the KnownZero/KnownOne
1531 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1533 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1534 APInt &KnownZero, APInt &KnownOne,
1535 unsigned Depth) const {
1536 unsigned BitWidth = Mask.getBitWidth();
1537 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1538 "Mask size mismatches value type size!");
1540 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1541 if (Depth == 6 || Mask == 0)
1542 return; // Limit search depth.
1544 APInt KnownZero2, KnownOne2;
1546 switch (Op.getOpcode()) {
1548 // We know all of the bits for a constant!
1549 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1550 KnownZero = ~KnownOne & Mask;
1553 // If either the LHS or the RHS are Zero, the result is zero.
1554 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1555 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1556 KnownZero2, KnownOne2, Depth+1);
1557 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1558 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1560 // Output known-1 bits are only known if set in both the LHS & RHS.
1561 KnownOne &= KnownOne2;
1562 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1563 KnownZero |= KnownZero2;
1566 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1567 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1568 KnownZero2, KnownOne2, Depth+1);
1569 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1570 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1572 // Output known-0 bits are only known if clear in both the LHS & RHS.
1573 KnownZero &= KnownZero2;
1574 // Output known-1 are known to be set if set in either the LHS | RHS.
1575 KnownOne |= KnownOne2;
1578 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1579 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1580 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1581 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1583 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1584 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1585 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1586 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1587 KnownZero = KnownZeroOut;
1591 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1592 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1593 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1594 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1595 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1597 // If low bits are zero in either operand, output low known-0 bits.
1598 // Also compute a conserative estimate for high known-0 bits.
1599 // More trickiness is possible, but this is sufficient for the
1600 // interesting case of alignment computation.
1602 unsigned TrailZ = KnownZero.countTrailingOnes() +
1603 KnownZero2.countTrailingOnes();
1604 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1605 KnownZero2.countLeadingOnes(),
1606 BitWidth) - BitWidth;
1608 TrailZ = std::min(TrailZ, BitWidth);
1609 LeadZ = std::min(LeadZ, BitWidth);
1610 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1611 APInt::getHighBitsSet(BitWidth, LeadZ);
1616 // For the purposes of computing leading zeros we can conservatively
1617 // treat a udiv as a logical right shift by the power of 2 known to
1618 // be less than the denominator.
1619 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1620 ComputeMaskedBits(Op.getOperand(0),
1621 AllOnes, KnownZero2, KnownOne2, Depth+1);
1622 unsigned LeadZ = KnownZero2.countLeadingOnes();
1626 ComputeMaskedBits(Op.getOperand(1),
1627 AllOnes, KnownZero2, KnownOne2, Depth+1);
1628 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1629 if (RHSUnknownLeadingOnes != BitWidth)
1630 LeadZ = std::min(BitWidth,
1631 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1633 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1637 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1638 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1639 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1640 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1642 // Only known if known in both the LHS and RHS.
1643 KnownOne &= KnownOne2;
1644 KnownZero &= KnownZero2;
1646 case ISD::SELECT_CC:
1647 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1648 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1649 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1650 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1652 // Only known if known in both the LHS and RHS.
1653 KnownOne &= KnownOne2;
1654 KnownZero &= KnownZero2;
1662 if (Op.getResNo() != 1)
1664 // The boolean result conforms to getBooleanContents. Fall through.
1666 // If we know the result of a setcc has the top bits zero, use this info.
1667 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1669 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1672 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1673 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1674 unsigned ShAmt = SA->getZExtValue();
1676 // If the shift count is an invalid immediate, don't do anything.
1677 if (ShAmt >= BitWidth)
1680 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1681 KnownZero, KnownOne, Depth+1);
1682 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1683 KnownZero <<= ShAmt;
1685 // low bits known zero.
1686 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1690 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1691 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1692 unsigned ShAmt = SA->getZExtValue();
1694 // If the shift count is an invalid immediate, don't do anything.
1695 if (ShAmt >= BitWidth)
1698 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1699 KnownZero, KnownOne, Depth+1);
1700 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1701 KnownZero = KnownZero.lshr(ShAmt);
1702 KnownOne = KnownOne.lshr(ShAmt);
1704 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1705 KnownZero |= HighBits; // High bits known zero.
1709 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1710 unsigned ShAmt = SA->getZExtValue();
1712 // If the shift count is an invalid immediate, don't do anything.
1713 if (ShAmt >= BitWidth)
1716 APInt InDemandedMask = (Mask << ShAmt);
1717 // If any of the demanded bits are produced by the sign extension, we also
1718 // demand the input sign bit.
1719 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1720 if (HighBits.getBoolValue())
1721 InDemandedMask |= APInt::getSignBit(BitWidth);
1723 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1725 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1726 KnownZero = KnownZero.lshr(ShAmt);
1727 KnownOne = KnownOne.lshr(ShAmt);
1729 // Handle the sign bits.
1730 APInt SignBit = APInt::getSignBit(BitWidth);
1731 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1733 if (KnownZero.intersects(SignBit)) {
1734 KnownZero |= HighBits; // New bits are known zero.
1735 } else if (KnownOne.intersects(SignBit)) {
1736 KnownOne |= HighBits; // New bits are known one.
1740 case ISD::SIGN_EXTEND_INREG: {
1741 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1742 unsigned EBits = EVT.getScalarType().getSizeInBits();
1744 // Sign extension. Compute the demanded bits in the result that are not
1745 // present in the input.
1746 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1748 APInt InSignBit = APInt::getSignBit(EBits);
1749 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1751 // If the sign extended bits are demanded, we know that the sign
1753 InSignBit.zext(BitWidth);
1754 if (NewBits.getBoolValue())
1755 InputDemandedBits |= InSignBit;
1757 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1758 KnownZero, KnownOne, Depth+1);
1759 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1761 // If the sign bit of the input is known set or clear, then we know the
1762 // top bits of the result.
1763 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1764 KnownZero |= NewBits;
1765 KnownOne &= ~NewBits;
1766 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1767 KnownOne |= NewBits;
1768 KnownZero &= ~NewBits;
1769 } else { // Input sign bit unknown
1770 KnownZero &= ~NewBits;
1771 KnownOne &= ~NewBits;
1778 unsigned LowBits = Log2_32(BitWidth)+1;
1779 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1784 if (ISD::isZEXTLoad(Op.getNode())) {
1785 LoadSDNode *LD = cast<LoadSDNode>(Op);
1786 EVT VT = LD->getMemoryVT();
1787 unsigned MemBits = VT.getScalarType().getSizeInBits();
1788 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1792 case ISD::ZERO_EXTEND: {
1793 EVT InVT = Op.getOperand(0).getValueType();
1794 unsigned InBits = InVT.getScalarType().getSizeInBits();
1795 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1796 APInt InMask = Mask;
1797 InMask.trunc(InBits);
1798 KnownZero.trunc(InBits);
1799 KnownOne.trunc(InBits);
1800 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1801 KnownZero.zext(BitWidth);
1802 KnownOne.zext(BitWidth);
1803 KnownZero |= NewBits;
1806 case ISD::SIGN_EXTEND: {
1807 EVT InVT = Op.getOperand(0).getValueType();
1808 unsigned InBits = InVT.getScalarType().getSizeInBits();
1809 APInt InSignBit = APInt::getSignBit(InBits);
1810 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1811 APInt InMask = Mask;
1812 InMask.trunc(InBits);
1814 // If any of the sign extended bits are demanded, we know that the sign
1815 // bit is demanded. Temporarily set this bit in the mask for our callee.
1816 if (NewBits.getBoolValue())
1817 InMask |= InSignBit;
1819 KnownZero.trunc(InBits);
1820 KnownOne.trunc(InBits);
1821 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1823 // Note if the sign bit is known to be zero or one.
1824 bool SignBitKnownZero = KnownZero.isNegative();
1825 bool SignBitKnownOne = KnownOne.isNegative();
1826 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1827 "Sign bit can't be known to be both zero and one!");
1829 // If the sign bit wasn't actually demanded by our caller, we don't
1830 // want it set in the KnownZero and KnownOne result values. Reset the
1831 // mask and reapply it to the result values.
1833 InMask.trunc(InBits);
1834 KnownZero &= InMask;
1837 KnownZero.zext(BitWidth);
1838 KnownOne.zext(BitWidth);
1840 // If the sign bit is known zero or one, the top bits match.
1841 if (SignBitKnownZero)
1842 KnownZero |= NewBits;
1843 else if (SignBitKnownOne)
1844 KnownOne |= NewBits;
1847 case ISD::ANY_EXTEND: {
1848 EVT InVT = Op.getOperand(0).getValueType();
1849 unsigned InBits = InVT.getScalarType().getSizeInBits();
1850 APInt InMask = Mask;
1851 InMask.trunc(InBits);
1852 KnownZero.trunc(InBits);
1853 KnownOne.trunc(InBits);
1854 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1855 KnownZero.zext(BitWidth);
1856 KnownOne.zext(BitWidth);
1859 case ISD::TRUNCATE: {
1860 EVT InVT = Op.getOperand(0).getValueType();
1861 unsigned InBits = InVT.getScalarType().getSizeInBits();
1862 APInt InMask = Mask;
1863 InMask.zext(InBits);
1864 KnownZero.zext(InBits);
1865 KnownOne.zext(InBits);
1866 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1867 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1868 KnownZero.trunc(BitWidth);
1869 KnownOne.trunc(BitWidth);
1872 case ISD::AssertZext: {
1873 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1874 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1875 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1877 KnownZero |= (~InMask) & Mask;
1881 // All bits are zero except the low bit.
1882 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1886 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1887 // We know that the top bits of C-X are clear if X contains less bits
1888 // than C (i.e. no wrap-around can happen). For example, 20-X is
1889 // positive if we can prove that X is >= 0 and < 16.
1890 if (CLHS->getAPIntValue().isNonNegative()) {
1891 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1892 // NLZ can't be BitWidth with no sign bit
1893 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1894 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1897 // If all of the MaskV bits are known to be zero, then we know the
1898 // output top bits are zero, because we now know that the output is
1900 if ((KnownZero2 & MaskV) == MaskV) {
1901 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1902 // Top bits known zero.
1903 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1910 // Output known-0 bits are known if clear or set in both the low clear bits
1911 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1912 // low 3 bits clear.
1913 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1914 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1915 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1916 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1918 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1919 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1920 KnownZeroOut = std::min(KnownZeroOut,
1921 KnownZero2.countTrailingOnes());
1923 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1927 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1928 const APInt &RA = Rem->getAPIntValue().abs();
1929 if (RA.isPowerOf2()) {
1930 APInt LowBits = RA - 1;
1931 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1932 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1934 // The low bits of the first operand are unchanged by the srem.
1935 KnownZero = KnownZero2 & LowBits;
1936 KnownOne = KnownOne2 & LowBits;
1938 // If the first operand is non-negative or has all low bits zero, then
1939 // the upper bits are all zero.
1940 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1941 KnownZero |= ~LowBits;
1943 // If the first operand is negative and not all low bits are zero, then
1944 // the upper bits are all one.
1945 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1946 KnownOne |= ~LowBits;
1951 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1956 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1957 const APInt &RA = Rem->getAPIntValue();
1958 if (RA.isPowerOf2()) {
1959 APInt LowBits = (RA - 1);
1960 APInt Mask2 = LowBits & Mask;
1961 KnownZero |= ~LowBits & Mask;
1962 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1963 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1968 // Since the result is less than or equal to either operand, any leading
1969 // zero bits in either operand must also exist in the result.
1970 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1971 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1973 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1976 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1977 KnownZero2.countLeadingOnes());
1979 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1983 // Allow the target to implement this method for its nodes.
1984 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1985 case ISD::INTRINSIC_WO_CHAIN:
1986 case ISD::INTRINSIC_W_CHAIN:
1987 case ISD::INTRINSIC_VOID:
1988 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1995 /// ComputeNumSignBits - Return the number of times the sign bit of the
1996 /// register is replicated into the other bits. We know that at least 1 bit
1997 /// is always equal to the sign bit (itself), but other cases can give us
1998 /// information. For example, immediately after an "SRA X, 2", we know that
1999 /// the top 3 bits are all equal to each other, so we return 3.
2000 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2001 EVT VT = Op.getValueType();
2002 assert(VT.isInteger() && "Invalid VT!");
2003 unsigned VTBits = VT.getScalarType().getSizeInBits();
2005 unsigned FirstAnswer = 1;
2008 return 1; // Limit search depth.
2010 switch (Op.getOpcode()) {
2012 case ISD::AssertSext:
2013 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2014 return VTBits-Tmp+1;
2015 case ISD::AssertZext:
2016 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2019 case ISD::Constant: {
2020 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2021 // If negative, return # leading ones.
2022 if (Val.isNegative())
2023 return Val.countLeadingOnes();
2025 // Return # leading zeros.
2026 return Val.countLeadingZeros();
2029 case ISD::SIGN_EXTEND:
2030 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2031 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2033 case ISD::SIGN_EXTEND_INREG:
2034 // Max of the input and what this extends.
2036 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2039 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2040 return std::max(Tmp, Tmp2);
2043 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2044 // SRA X, C -> adds C sign bits.
2045 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2046 Tmp += C->getZExtValue();
2047 if (Tmp > VTBits) Tmp = VTBits;
2051 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2052 // shl destroys sign bits.
2053 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2054 if (C->getZExtValue() >= VTBits || // Bad shift.
2055 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2056 return Tmp - C->getZExtValue();
2061 case ISD::XOR: // NOT is handled here.
2062 // Logical binary ops preserve the number of sign bits at the worst.
2063 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2065 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2066 FirstAnswer = std::min(Tmp, Tmp2);
2067 // We computed what we know about the sign bits as our first
2068 // answer. Now proceed to the generic code that uses
2069 // ComputeMaskedBits, and pick whichever answer is better.
2074 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2075 if (Tmp == 1) return 1; // Early out.
2076 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2077 return std::min(Tmp, Tmp2);
2085 if (Op.getResNo() != 1)
2087 // The boolean result conforms to getBooleanContents. Fall through.
2089 // If setcc returns 0/-1, all bits are sign bits.
2090 if (TLI.getBooleanContents() ==
2091 TargetLowering::ZeroOrNegativeOneBooleanContent)
2096 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2097 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2099 // Handle rotate right by N like a rotate left by 32-N.
2100 if (Op.getOpcode() == ISD::ROTR)
2101 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2103 // If we aren't rotating out all of the known-in sign bits, return the
2104 // number that are left. This handles rotl(sext(x), 1) for example.
2105 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2106 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2110 // Add can have at most one carry bit. Thus we know that the output
2111 // is, at worst, one more bit than the inputs.
2112 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2113 if (Tmp == 1) return 1; // Early out.
2115 // Special case decrementing a value (ADD X, -1):
2116 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2117 if (CRHS->isAllOnesValue()) {
2118 APInt KnownZero, KnownOne;
2119 APInt Mask = APInt::getAllOnesValue(VTBits);
2120 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2122 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2124 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2127 // If we are subtracting one from a positive number, there is no carry
2128 // out of the result.
2129 if (KnownZero.isNegative())
2133 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2134 if (Tmp2 == 1) return 1;
2135 return std::min(Tmp, Tmp2)-1;
2139 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2140 if (Tmp2 == 1) return 1;
2143 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2144 if (CLHS->isNullValue()) {
2145 APInt KnownZero, KnownOne;
2146 APInt Mask = APInt::getAllOnesValue(VTBits);
2147 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2148 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2150 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2153 // If the input is known to be positive (the sign bit is known clear),
2154 // the output of the NEG has the same number of sign bits as the input.
2155 if (KnownZero.isNegative())
2158 // Otherwise, we treat this like a SUB.
2161 // Sub can have at most one carry bit. Thus we know that the output
2162 // is, at worst, one more bit than the inputs.
2163 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2164 if (Tmp == 1) return 1; // Early out.
2165 return std::min(Tmp, Tmp2)-1;
2168 // FIXME: it's tricky to do anything useful for this, but it is an important
2169 // case for targets like X86.
2173 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2174 if (Op.getOpcode() == ISD::LOAD) {
2175 LoadSDNode *LD = cast<LoadSDNode>(Op);
2176 unsigned ExtType = LD->getExtensionType();
2179 case ISD::SEXTLOAD: // '17' bits known
2180 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2181 return VTBits-Tmp+1;
2182 case ISD::ZEXTLOAD: // '16' bits known
2183 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2188 // Allow the target to implement this method for its nodes.
2189 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2190 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2191 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2192 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2193 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2194 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2197 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2198 // use this information.
2199 APInt KnownZero, KnownOne;
2200 APInt Mask = APInt::getAllOnesValue(VTBits);
2201 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2203 if (KnownZero.isNegative()) { // sign bit is 0
2205 } else if (KnownOne.isNegative()) { // sign bit is 1;
2212 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2213 // the number of identical bits in the top of the input value.
2215 Mask <<= Mask.getBitWidth()-VTBits;
2216 // Return # leading zeros. We use 'min' here in case Val was zero before
2217 // shifting. We don't want to return '64' as for an i32 "0".
2218 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2221 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2222 // If we're told that NaNs won't happen, assume they won't.
2223 if (FiniteOnlyFPMath())
2226 // If the value is a constant, we can obviously see if it is a NaN or not.
2227 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2228 return !C->getValueAPF().isNaN();
2230 // TODO: Recognize more cases here.
2235 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2236 // If the value is a constant, we can obviously see if it is a zero or not.
2237 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2238 return !C->isZero();
2240 // TODO: Recognize more cases here.
2245 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2246 // Check the obvious case.
2247 if (A == B) return true;
2249 // For for negative and positive zero.
2250 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2251 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2252 if (CA->isZero() && CB->isZero()) return true;
2254 // Otherwise they may not be equal.
2258 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2259 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2260 if (!GA) return false;
2261 if (GA->getOffset() != 0) return false;
2262 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2263 if (!GV) return false;
2264 MachineModuleInfo *MMI = getMachineModuleInfo();
2265 return MMI && MMI->hasDebugInfo();
2269 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2270 /// element of the result of the vector shuffle.
2271 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2273 EVT VT = N->getValueType(0);
2274 DebugLoc dl = N->getDebugLoc();
2275 if (N->getMaskElt(i) < 0)
2276 return getUNDEF(VT.getVectorElementType());
2277 unsigned Index = N->getMaskElt(i);
2278 unsigned NumElems = VT.getVectorNumElements();
2279 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2282 if (V.getOpcode() == ISD::BIT_CONVERT) {
2283 V = V.getOperand(0);
2284 EVT VVT = V.getValueType();
2285 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2288 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2289 return (Index == 0) ? V.getOperand(0)
2290 : getUNDEF(VT.getVectorElementType());
2291 if (V.getOpcode() == ISD::BUILD_VECTOR)
2292 return V.getOperand(Index);
2293 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2294 return getShuffleScalarElt(SVN, Index);
2299 /// getNode - Gets or creates the specified node.
2301 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2302 FoldingSetNodeID ID;
2303 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2306 return SDValue(E, 0);
2308 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2309 CSEMap.InsertNode(N, IP);
2311 AllNodes.push_back(N);
2315 return SDValue(N, 0);
2318 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2319 EVT VT, SDValue Operand) {
2320 // Constant fold unary operations with an integer constant operand.
2321 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2322 const APInt &Val = C->getAPIntValue();
2325 case ISD::SIGN_EXTEND:
2326 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT);
2327 case ISD::ANY_EXTEND:
2328 case ISD::ZERO_EXTEND:
2330 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT);
2331 case ISD::UINT_TO_FP:
2332 case ISD::SINT_TO_FP: {
2333 const uint64_t zero[] = {0, 0};
2334 // No compile time operations on ppcf128.
2335 if (VT == MVT::ppcf128) break;
2336 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero));
2337 (void)apf.convertFromAPInt(Val,
2338 Opcode==ISD::SINT_TO_FP,
2339 APFloat::rmNearestTiesToEven);
2340 return getConstantFP(apf, VT);
2342 case ISD::BIT_CONVERT:
2343 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2344 return getConstantFP(Val.bitsToFloat(), VT);
2345 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2346 return getConstantFP(Val.bitsToDouble(), VT);
2349 return getConstant(Val.byteSwap(), VT);
2351 return getConstant(Val.countPopulation(), VT);
2353 return getConstant(Val.countLeadingZeros(), VT);
2355 return getConstant(Val.countTrailingZeros(), VT);
2359 // Constant fold unary operations with a floating point constant operand.
2360 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2361 APFloat V = C->getValueAPF(); // make copy
2362 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2366 return getConstantFP(V, VT);
2369 return getConstantFP(V, VT);
2371 case ISD::FP_EXTEND: {
2373 // This can return overflow, underflow, or inexact; we don't care.
2374 // FIXME need to be more flexible about rounding mode.
2375 (void)V.convert(*EVTToAPFloatSemantics(VT),
2376 APFloat::rmNearestTiesToEven, &ignored);
2377 return getConstantFP(V, VT);
2379 case ISD::FP_TO_SINT:
2380 case ISD::FP_TO_UINT: {
2383 assert(integerPartWidth >= 64);
2384 // FIXME need to be more flexible about rounding mode.
2385 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2386 Opcode==ISD::FP_TO_SINT,
2387 APFloat::rmTowardZero, &ignored);
2388 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2390 APInt api(VT.getSizeInBits(), 2, x);
2391 return getConstant(api, VT);
2393 case ISD::BIT_CONVERT:
2394 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2395 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2396 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2397 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2403 unsigned OpOpcode = Operand.getNode()->getOpcode();
2405 case ISD::TokenFactor:
2406 case ISD::MERGE_VALUES:
2407 case ISD::CONCAT_VECTORS:
2408 return Operand; // Factor, merge or concat of one node? No need.
2409 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2410 case ISD::FP_EXTEND:
2411 assert(VT.isFloatingPoint() &&
2412 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2413 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2414 assert((!VT.isVector() ||
2415 VT.getVectorNumElements() ==
2416 Operand.getValueType().getVectorNumElements()) &&
2417 "Vector element count mismatch!");
2418 if (Operand.getOpcode() == ISD::UNDEF)
2419 return getUNDEF(VT);
2421 case ISD::SIGN_EXTEND:
2422 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2423 "Invalid SIGN_EXTEND!");
2424 if (Operand.getValueType() == VT) return Operand; // noop extension
2425 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2426 "Invalid sext node, dst < src!");
2427 assert((!VT.isVector() ||
2428 VT.getVectorNumElements() ==
2429 Operand.getValueType().getVectorNumElements()) &&
2430 "Vector element count mismatch!");
2431 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2432 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2434 case ISD::ZERO_EXTEND:
2435 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2436 "Invalid ZERO_EXTEND!");
2437 if (Operand.getValueType() == VT) return Operand; // noop extension
2438 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2439 "Invalid zext node, dst < src!");
2440 assert((!VT.isVector() ||
2441 VT.getVectorNumElements() ==
2442 Operand.getValueType().getVectorNumElements()) &&
2443 "Vector element count mismatch!");
2444 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2445 return getNode(ISD::ZERO_EXTEND, DL, VT,
2446 Operand.getNode()->getOperand(0));
2448 case ISD::ANY_EXTEND:
2449 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2450 "Invalid ANY_EXTEND!");
2451 if (Operand.getValueType() == VT) return Operand; // noop extension
2452 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2453 "Invalid anyext node, dst < src!");
2454 assert((!VT.isVector() ||
2455 VT.getVectorNumElements() ==
2456 Operand.getValueType().getVectorNumElements()) &&
2457 "Vector element count mismatch!");
2458 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2459 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2460 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2463 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2464 "Invalid TRUNCATE!");
2465 if (Operand.getValueType() == VT) return Operand; // noop truncate
2466 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2467 "Invalid truncate node, src < dst!");
2468 assert((!VT.isVector() ||
2469 VT.getVectorNumElements() ==
2470 Operand.getValueType().getVectorNumElements()) &&
2471 "Vector element count mismatch!");
2472 if (OpOpcode == ISD::TRUNCATE)
2473 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2474 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2475 OpOpcode == ISD::ANY_EXTEND) {
2476 // If the source is smaller than the dest, we still need an extend.
2477 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2478 .bitsLT(VT.getScalarType()))
2479 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2480 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2481 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2483 return Operand.getNode()->getOperand(0);
2486 case ISD::BIT_CONVERT:
2487 // Basic sanity checking.
2488 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2489 && "Cannot BIT_CONVERT between types of different sizes!");
2490 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2491 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2492 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2493 if (OpOpcode == ISD::UNDEF)
2494 return getUNDEF(VT);
2496 case ISD::SCALAR_TO_VECTOR:
2497 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2498 (VT.getVectorElementType() == Operand.getValueType() ||
2499 (VT.getVectorElementType().isInteger() &&
2500 Operand.getValueType().isInteger() &&
2501 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2502 "Illegal SCALAR_TO_VECTOR node!");
2503 if (OpOpcode == ISD::UNDEF)
2504 return getUNDEF(VT);
2505 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2506 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2507 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2508 Operand.getConstantOperandVal(1) == 0 &&
2509 Operand.getOperand(0).getValueType() == VT)
2510 return Operand.getOperand(0);
2513 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2514 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2515 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2516 Operand.getNode()->getOperand(0));
2517 if (OpOpcode == ISD::FNEG) // --X -> X
2518 return Operand.getNode()->getOperand(0);
2521 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2522 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2527 SDVTList VTs = getVTList(VT);
2528 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2529 FoldingSetNodeID ID;
2530 SDValue Ops[1] = { Operand };
2531 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2533 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2534 return SDValue(E, 0);
2536 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2537 CSEMap.InsertNode(N, IP);
2539 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2542 AllNodes.push_back(N);
2546 return SDValue(N, 0);
2549 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2551 ConstantSDNode *Cst1,
2552 ConstantSDNode *Cst2) {
2553 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2556 case ISD::ADD: return getConstant(C1 + C2, VT);
2557 case ISD::SUB: return getConstant(C1 - C2, VT);
2558 case ISD::MUL: return getConstant(C1 * C2, VT);
2560 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2563 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2566 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2569 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2571 case ISD::AND: return getConstant(C1 & C2, VT);
2572 case ISD::OR: return getConstant(C1 | C2, VT);
2573 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2574 case ISD::SHL: return getConstant(C1 << C2, VT);
2575 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2576 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2577 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2578 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2585 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2586 SDValue N1, SDValue N2) {
2587 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2588 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2591 case ISD::TokenFactor:
2592 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2593 N2.getValueType() == MVT::Other && "Invalid token factor!");
2594 // Fold trivial token factors.
2595 if (N1.getOpcode() == ISD::EntryToken) return N2;
2596 if (N2.getOpcode() == ISD::EntryToken) return N1;
2597 if (N1 == N2) return N1;
2599 case ISD::CONCAT_VECTORS:
2600 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2601 // one big BUILD_VECTOR.
2602 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2603 N2.getOpcode() == ISD::BUILD_VECTOR) {
2604 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2605 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2606 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2610 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2611 N1.getValueType() == VT && "Binary operator types must match!");
2612 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2613 // worth handling here.
2614 if (N2C && N2C->isNullValue())
2616 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2623 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2624 N1.getValueType() == VT && "Binary operator types must match!");
2625 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2626 // it's worth handling here.
2627 if (N2C && N2C->isNullValue())
2637 assert(VT.isInteger() && "This operator does not apply to FP types!");
2645 if (Opcode == ISD::FADD) {
2647 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2648 if (CFP->getValueAPF().isZero())
2651 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2652 if (CFP->getValueAPF().isZero())
2654 } else if (Opcode == ISD::FSUB) {
2656 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2657 if (CFP->getValueAPF().isZero())
2661 assert(N1.getValueType() == N2.getValueType() &&
2662 N1.getValueType() == VT && "Binary operator types must match!");
2664 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2665 assert(N1.getValueType() == VT &&
2666 N1.getValueType().isFloatingPoint() &&
2667 N2.getValueType().isFloatingPoint() &&
2668 "Invalid FCOPYSIGN!");
2675 assert(VT == N1.getValueType() &&
2676 "Shift operators return type must be the same as their first arg");
2677 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2678 "Shifts only work on integers");
2680 // Always fold shifts of i1 values so the code generator doesn't need to
2681 // handle them. Since we know the size of the shift has to be less than the
2682 // size of the value, the shift/rotate count is guaranteed to be zero.
2685 if (N2C && N2C->isNullValue())
2688 case ISD::FP_ROUND_INREG: {
2689 EVT EVT = cast<VTSDNode>(N2)->getVT();
2690 assert(VT == N1.getValueType() && "Not an inreg round!");
2691 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2692 "Cannot FP_ROUND_INREG integer types");
2693 assert(EVT.isVector() == VT.isVector() &&
2694 "FP_ROUND_INREG type should be vector iff the operand "
2696 assert((!EVT.isVector() ||
2697 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2698 "Vector element counts must match in FP_ROUND_INREG");
2699 assert(EVT.bitsLE(VT) && "Not rounding down!");
2700 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2704 assert(VT.isFloatingPoint() &&
2705 N1.getValueType().isFloatingPoint() &&
2706 VT.bitsLE(N1.getValueType()) &&
2707 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2708 if (N1.getValueType() == VT) return N1; // noop conversion.
2710 case ISD::AssertSext:
2711 case ISD::AssertZext: {
2712 EVT EVT = cast<VTSDNode>(N2)->getVT();
2713 assert(VT == N1.getValueType() && "Not an inreg extend!");
2714 assert(VT.isInteger() && EVT.isInteger() &&
2715 "Cannot *_EXTEND_INREG FP types");
2716 assert(!EVT.isVector() &&
2717 "AssertSExt/AssertZExt type should be the vector element type "
2718 "rather than the vector type!");
2719 assert(EVT.bitsLE(VT) && "Not extending!");
2720 if (VT == EVT) return N1; // noop assertion.
2723 case ISD::SIGN_EXTEND_INREG: {
2724 EVT EVT = cast<VTSDNode>(N2)->getVT();
2725 assert(VT == N1.getValueType() && "Not an inreg extend!");
2726 assert(VT.isInteger() && EVT.isInteger() &&
2727 "Cannot *_EXTEND_INREG FP types");
2728 assert(EVT.isVector() == VT.isVector() &&
2729 "SIGN_EXTEND_INREG type should be vector iff the operand "
2731 assert((!EVT.isVector() ||
2732 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2733 "Vector element counts must match in SIGN_EXTEND_INREG");
2734 assert(EVT.bitsLE(VT) && "Not extending!");
2735 if (EVT == VT) return N1; // Not actually extending
2738 APInt Val = N1C->getAPIntValue();
2739 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2740 Val <<= Val.getBitWidth()-FromBits;
2741 Val = Val.ashr(Val.getBitWidth()-FromBits);
2742 return getConstant(Val, VT);
2746 case ISD::EXTRACT_VECTOR_ELT:
2747 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2748 if (N1.getOpcode() == ISD::UNDEF)
2749 return getUNDEF(VT);
2751 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2752 // expanding copies of large vectors from registers.
2754 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2755 N1.getNumOperands() > 0) {
2757 N1.getOperand(0).getValueType().getVectorNumElements();
2758 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2759 N1.getOperand(N2C->getZExtValue() / Factor),
2760 getConstant(N2C->getZExtValue() % Factor,
2761 N2.getValueType()));
2764 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2765 // expanding large vector constants.
2766 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2767 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2768 EVT VEltTy = N1.getValueType().getVectorElementType();
2769 if (Elt.getValueType() != VEltTy) {
2770 // If the vector element type is not legal, the BUILD_VECTOR operands
2771 // are promoted and implicitly truncated. Make that explicit here.
2772 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2775 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2776 // result is implicitly extended.
2777 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2782 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2783 // operations are lowered to scalars.
2784 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2785 // If the indices are the same, return the inserted element else
2786 // if the indices are known different, extract the element from
2787 // the original vector.
2788 if (N1.getOperand(2) == N2) {
2789 if (VT == N1.getOperand(1).getValueType())
2790 return N1.getOperand(1);
2792 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2793 } else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2794 isa<ConstantSDNode>(N2))
2795 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2798 case ISD::EXTRACT_ELEMENT:
2799 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2800 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2801 (N1.getValueType().isInteger() == VT.isInteger()) &&
2802 "Wrong types for EXTRACT_ELEMENT!");
2804 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2805 // 64-bit integers into 32-bit parts. Instead of building the extract of
2806 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2807 if (N1.getOpcode() == ISD::BUILD_PAIR)
2808 return N1.getOperand(N2C->getZExtValue());
2810 // EXTRACT_ELEMENT of a constant int is also very common.
2811 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2812 unsigned ElementSize = VT.getSizeInBits();
2813 unsigned Shift = ElementSize * N2C->getZExtValue();
2814 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2815 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2818 case ISD::EXTRACT_SUBVECTOR:
2819 if (N1.getValueType() == VT) // Trivial extraction.
2826 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2827 if (SV.getNode()) return SV;
2828 } else { // Cannonicalize constant to RHS if commutative
2829 if (isCommutativeBinOp(Opcode)) {
2830 std::swap(N1C, N2C);
2836 // Constant fold FP operations.
2837 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2838 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2840 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2841 // Cannonicalize constant to RHS if commutative
2842 std::swap(N1CFP, N2CFP);
2844 } else if (N2CFP && VT != MVT::ppcf128) {
2845 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2846 APFloat::opStatus s;
2849 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2850 if (s != APFloat::opInvalidOp)
2851 return getConstantFP(V1, VT);
2854 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2855 if (s!=APFloat::opInvalidOp)
2856 return getConstantFP(V1, VT);
2859 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2860 if (s!=APFloat::opInvalidOp)
2861 return getConstantFP(V1, VT);
2864 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2865 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2866 return getConstantFP(V1, VT);
2869 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2870 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2871 return getConstantFP(V1, VT);
2873 case ISD::FCOPYSIGN:
2875 return getConstantFP(V1, VT);
2881 // Canonicalize an UNDEF to the RHS, even over a constant.
2882 if (N1.getOpcode() == ISD::UNDEF) {
2883 if (isCommutativeBinOp(Opcode)) {
2887 case ISD::FP_ROUND_INREG:
2888 case ISD::SIGN_EXTEND_INREG:
2894 return N1; // fold op(undef, arg2) -> undef
2902 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2903 // For vectors, we can't easily build an all zero vector, just return
2910 // Fold a bunch of operators when the RHS is undef.
2911 if (N2.getOpcode() == ISD::UNDEF) {
2914 if (N1.getOpcode() == ISD::UNDEF)
2915 // Handle undef ^ undef -> 0 special case. This is a common
2917 return getConstant(0, VT);
2927 return N2; // fold op(arg1, undef) -> undef
2941 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2942 // For vectors, we can't easily build an all zero vector, just return
2947 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2948 // For vectors, we can't easily build an all one vector, just return
2956 // Memoize this node if possible.
2958 SDVTList VTs = getVTList(VT);
2959 if (VT != MVT::Flag) {
2960 SDValue Ops[] = { N1, N2 };
2961 FoldingSetNodeID ID;
2962 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2964 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2965 return SDValue(E, 0);
2967 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2968 CSEMap.InsertNode(N, IP);
2970 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2973 AllNodes.push_back(N);
2977 return SDValue(N, 0);
2980 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2981 SDValue N1, SDValue N2, SDValue N3) {
2982 // Perform various simplifications.
2983 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2984 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2986 case ISD::CONCAT_VECTORS:
2987 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2988 // one big BUILD_VECTOR.
2989 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2990 N2.getOpcode() == ISD::BUILD_VECTOR &&
2991 N3.getOpcode() == ISD::BUILD_VECTOR) {
2992 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2993 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2994 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2995 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2999 // Use FoldSetCC to simplify SETCC's.
3000 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3001 if (Simp.getNode()) return Simp;
3006 if (N1C->getZExtValue())
3007 return N2; // select true, X, Y -> X
3009 return N3; // select false, X, Y -> Y
3012 if (N2 == N3) return N2; // select C, X, X -> X
3016 if (N2C->getZExtValue()) // Unconditional branch
3017 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
3019 return N1; // Never-taken branch
3022 case ISD::VECTOR_SHUFFLE:
3023 llvm_unreachable("should use getVectorShuffle constructor!");
3025 case ISD::BIT_CONVERT:
3026 // Fold bit_convert nodes from a type to themselves.
3027 if (N1.getValueType() == VT)
3032 // Memoize node if it doesn't produce a flag.
3034 SDVTList VTs = getVTList(VT);
3035 if (VT != MVT::Flag) {
3036 SDValue Ops[] = { N1, N2, N3 };
3037 FoldingSetNodeID ID;
3038 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3040 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3041 return SDValue(E, 0);
3043 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3044 CSEMap.InsertNode(N, IP);
3046 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3049 AllNodes.push_back(N);
3053 return SDValue(N, 0);
3056 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3057 SDValue N1, SDValue N2, SDValue N3,
3059 SDValue Ops[] = { N1, N2, N3, N4 };
3060 return getNode(Opcode, DL, VT, Ops, 4);
3063 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3064 SDValue N1, SDValue N2, SDValue N3,
3065 SDValue N4, SDValue N5) {
3066 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3067 return getNode(Opcode, DL, VT, Ops, 5);
3070 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3071 /// the incoming stack arguments to be loaded from the stack.
3072 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3073 SmallVector<SDValue, 8> ArgChains;
3075 // Include the original chain at the beginning of the list. When this is
3076 // used by target LowerCall hooks, this helps legalize find the
3077 // CALLSEQ_BEGIN node.
3078 ArgChains.push_back(Chain);
3080 // Add a chain value for each stack argument.
3081 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3082 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3083 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3084 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3085 if (FI->getIndex() < 0)
3086 ArgChains.push_back(SDValue(L, 1));
3088 // Build a tokenfactor for all the chains.
3089 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3090 &ArgChains[0], ArgChains.size());
3093 /// getMemsetValue - Vectorized representation of the memset value
3095 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3097 unsigned NumBits = VT.getScalarType().getSizeInBits();
3098 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3099 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3101 for (unsigned i = NumBits; i > 8; i >>= 1) {
3102 Val = (Val << Shift) | Val;
3106 return DAG.getConstant(Val, VT);
3107 return DAG.getConstantFP(APFloat(Val), VT);
3110 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3111 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3113 for (unsigned i = NumBits; i > 8; i >>= 1) {
3114 Value = DAG.getNode(ISD::OR, dl, VT,
3115 DAG.getNode(ISD::SHL, dl, VT, Value,
3116 DAG.getConstant(Shift,
3117 TLI.getShiftAmountTy())),
3125 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3126 /// used when a memcpy is turned into a memset when the source is a constant
3128 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3129 const TargetLowering &TLI,
3130 std::string &Str, unsigned Offset) {
3131 // Handle vector with all elements zero.
3134 return DAG.getConstant(0, VT);
3135 else if (VT.getSimpleVT().SimpleTy == MVT::f32 ||
3136 VT.getSimpleVT().SimpleTy == MVT::f64)
3137 return DAG.getConstantFP(0.0, VT);
3138 else if (VT.isVector()) {
3139 unsigned NumElts = VT.getVectorNumElements();
3140 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3141 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3142 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3145 llvm_unreachable("Expected type!");
3148 assert(!VT.isVector() && "Can't handle vector type here!");
3149 unsigned NumBits = VT.getSizeInBits();
3150 unsigned MSB = NumBits / 8;
3152 if (TLI.isLittleEndian())
3153 Offset = Offset + MSB - 1;
3154 for (unsigned i = 0; i != MSB; ++i) {
3155 Val = (Val << 8) | (unsigned char)Str[Offset];
3156 Offset += TLI.isLittleEndian() ? -1 : 1;
3158 return DAG.getConstant(Val, VT);
3161 /// getMemBasePlusOffset - Returns base and offset node for the
3163 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3164 SelectionDAG &DAG) {
3165 EVT VT = Base.getValueType();
3166 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3167 VT, Base, DAG.getConstant(Offset, VT));
3170 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3172 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3173 unsigned SrcDelta = 0;
3174 GlobalAddressSDNode *G = NULL;
3175 if (Src.getOpcode() == ISD::GlobalAddress)
3176 G = cast<GlobalAddressSDNode>(Src);
3177 else if (Src.getOpcode() == ISD::ADD &&
3178 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3179 Src.getOperand(1).getOpcode() == ISD::Constant) {
3180 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3181 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3186 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3187 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3193 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3194 /// to replace the memset / memcpy. Return true if the number of memory ops
3195 /// is below the threshold. It returns the types of the sequence of
3196 /// memory ops to perform memset / memcpy by reference.
3197 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3198 unsigned Limit, uint64_t Size,
3199 unsigned DstAlign, unsigned SrcAlign,
3202 const TargetLowering &TLI) {
3203 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3204 "Expecting memcpy / memset source to meet alignment requirement!");
3205 // If 'SrcAlign' is zero, that means the memory operation does not need load
3206 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3207 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3208 // specified alignment of the memory operation. If it is zero, that means
3209 // it's possible to change the alignment of the destination.
3210 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, SafeToUseFP, DAG);
3212 if (VT == MVT::Other) {
3213 VT = TLI.getPointerTy();
3214 const Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3215 if (DstAlign >= TLI.getTargetData()->getABITypeAlignment(Ty) ||
3216 TLI.allowsUnalignedMemoryAccesses(VT)) {
3219 switch (DstAlign & 7) {
3220 case 0: VT = MVT::i64; break;
3221 case 4: VT = MVT::i32; break;
3222 case 2: VT = MVT::i16; break;
3223 default: VT = MVT::i8; break;
3228 while (!TLI.isTypeLegal(LVT))
3229 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3230 assert(LVT.isInteger());
3236 unsigned NumMemOps = 0;
3238 unsigned VTSize = VT.getSizeInBits() / 8;
3239 while (VTSize > Size) {
3240 // For now, only use non-vector load / store's for the left-over pieces.
3241 if (VT.isVector() || VT.isFloatingPoint()) {
3243 while (!TLI.isTypeLegal(VT))
3244 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3245 VTSize = VT.getSizeInBits() / 8;
3247 // This can result in a type that is not legal on the target, e.g.
3248 // 1 or 2 bytes on PPC.
3249 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3254 if (++NumMemOps > Limit)
3256 MemOps.push_back(VT);
3263 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3264 SDValue Chain, SDValue Dst,
3265 SDValue Src, uint64_t Size,
3266 unsigned Align, bool AlwaysInline,
3267 const Value *DstSV, uint64_t DstSVOff,
3268 const Value *SrcSV, uint64_t SrcSVOff) {
3269 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3271 // Expand memcpy to a series of load and store ops if the size operand falls
3272 // below a certain threshold.
3273 std::vector<EVT> MemOps;
3274 uint64_t Limit = -1ULL;
3276 Limit = TLI.getMaxStoresPerMemcpy();
3277 bool DstAlignCanChange = false;
3278 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3279 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3280 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3281 DstAlignCanChange = true;
3282 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3283 if (Align > SrcAlign)
3286 bool CopyFromStr = isMemSrcFromString(Src, Str);
3287 bool isZeroStr = CopyFromStr && Str.empty();
3288 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3289 (DstAlignCanChange ? 0 : Align),
3290 (isZeroStr ? 0 : SrcAlign), true, DAG, TLI))
3293 if (DstAlignCanChange) {
3294 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3295 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3296 if (NewAlign > Align) {
3297 // Give the stack frame object a larger alignment if needed.
3298 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3299 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3304 SmallVector<SDValue, 8> OutChains;
3305 unsigned NumMemOps = MemOps.size();
3306 uint64_t SrcOff = 0, DstOff = 0;
3307 for (unsigned i = 0; i != NumMemOps; ++i) {
3309 unsigned VTSize = VT.getSizeInBits() / 8;
3310 SDValue Value, Store;
3313 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3314 // It's unlikely a store of a vector immediate can be done in a single
3315 // instruction. It would require a load from a constantpool first.
3316 // We only handle zero vectors here.
3317 // FIXME: Handle other cases where store of vector immediate is done in
3318 // a single instruction.
3319 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3320 Store = DAG.getStore(Chain, dl, Value,
3321 getMemBasePlusOffset(Dst, DstOff, DAG),
3322 DstSV, DstSVOff + DstOff, false, false, Align);
3324 // The type might not be legal for the target. This should only happen
3325 // if the type is smaller than a legal type, as on PPC, so the right
3326 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3327 // to Load/Store if NVT==VT.
3328 // FIXME does the case above also need this?
3329 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3330 assert(NVT.bitsGE(VT));
3331 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3332 getMemBasePlusOffset(Src, SrcOff, DAG),
3333 SrcSV, SrcSVOff + SrcOff, VT, false, false,
3334 MinAlign(SrcAlign, SrcOff));
3335 Store = DAG.getTruncStore(Chain, dl, Value,
3336 getMemBasePlusOffset(Dst, DstOff, DAG),
3337 DstSV, DstSVOff + DstOff, VT, false, false,
3340 OutChains.push_back(Store);
3345 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3346 &OutChains[0], OutChains.size());
3349 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3350 SDValue Chain, SDValue Dst,
3351 SDValue Src, uint64_t Size,
3352 unsigned Align,bool AlwaysInline,
3353 const Value *DstSV, uint64_t DstSVOff,
3354 const Value *SrcSV, uint64_t SrcSVOff) {
3355 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3357 // Expand memmove to a series of load and store ops if the size operand falls
3358 // below a certain threshold.
3359 std::vector<EVT> MemOps;
3360 uint64_t Limit = -1ULL;
3362 Limit = TLI.getMaxStoresPerMemmove();
3363 bool DstAlignCanChange = false;
3364 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3365 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3366 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3367 DstAlignCanChange = true;
3368 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3369 if (Align > SrcAlign)
3372 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3373 (DstAlignCanChange ? 0 : Align),
3374 SrcAlign, true, DAG, TLI))
3377 if (DstAlignCanChange) {
3378 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3379 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3380 if (NewAlign > Align) {
3381 // Give the stack frame object a larger alignment if needed.
3382 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3383 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3388 uint64_t SrcOff = 0, DstOff = 0;
3389 SmallVector<SDValue, 8> LoadValues;
3390 SmallVector<SDValue, 8> LoadChains;
3391 SmallVector<SDValue, 8> OutChains;
3392 unsigned NumMemOps = MemOps.size();
3393 for (unsigned i = 0; i < NumMemOps; i++) {
3395 unsigned VTSize = VT.getSizeInBits() / 8;
3396 SDValue Value, Store;
3398 Value = DAG.getLoad(VT, dl, Chain,
3399 getMemBasePlusOffset(Src, SrcOff, DAG),
3400 SrcSV, SrcSVOff + SrcOff, false, false, SrcAlign);
3401 LoadValues.push_back(Value);
3402 LoadChains.push_back(Value.getValue(1));
3405 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3406 &LoadChains[0], LoadChains.size());
3408 for (unsigned i = 0; i < NumMemOps; i++) {
3410 unsigned VTSize = VT.getSizeInBits() / 8;
3411 SDValue Value, Store;
3413 Store = DAG.getStore(Chain, dl, LoadValues[i],
3414 getMemBasePlusOffset(Dst, DstOff, DAG),
3415 DstSV, DstSVOff + DstOff, false, false, Align);
3416 OutChains.push_back(Store);
3420 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3421 &OutChains[0], OutChains.size());
3424 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3425 SDValue Chain, SDValue Dst,
3426 SDValue Src, uint64_t Size,
3428 const Value *DstSV, uint64_t DstSVOff) {
3429 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3431 // Expand memset to a series of load/store ops if the size operand
3432 // falls below a certain threshold.
3433 std::vector<EVT> MemOps;
3434 bool DstAlignCanChange = false;
3435 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3436 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3437 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3438 DstAlignCanChange = true;
3439 bool IsZero = isa<ConstantSDNode>(Src) &&
3440 cast<ConstantSDNode>(Src)->isNullValue();
3441 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3442 Size, (DstAlignCanChange ? 0 : Align), 0,
3446 if (DstAlignCanChange) {
3447 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3448 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3449 if (NewAlign > Align) {
3450 // Give the stack frame object a larger alignment if needed.
3451 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3452 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3457 SmallVector<SDValue, 8> OutChains;
3458 uint64_t DstOff = 0;
3459 unsigned NumMemOps = MemOps.size();
3460 for (unsigned i = 0; i < NumMemOps; i++) {
3462 unsigned VTSize = VT.getSizeInBits() / 8;
3463 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3464 SDValue Store = DAG.getStore(Chain, dl, Value,
3465 getMemBasePlusOffset(Dst, DstOff, DAG),
3466 DstSV, DstSVOff + DstOff, false, false, 0);
3467 OutChains.push_back(Store);
3471 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3472 &OutChains[0], OutChains.size());
3475 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3476 SDValue Src, SDValue Size,
3477 unsigned Align, bool AlwaysInline,
3478 const Value *DstSV, uint64_t DstSVOff,
3479 const Value *SrcSV, uint64_t SrcSVOff) {
3481 // Check to see if we should lower the memcpy to loads and stores first.
3482 // For cases within the target-specified limits, this is the best choice.
3483 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3485 // Memcpy with size zero? Just return the original chain.
3486 if (ConstantSize->isNullValue())
3489 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3490 ConstantSize->getZExtValue(),Align,
3491 false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3492 if (Result.getNode())
3496 // Then check to see if we should lower the memcpy with target-specific
3497 // code. If the target chooses to do this, this is the next best.
3499 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3501 DstSV, DstSVOff, SrcSV, SrcSVOff);
3502 if (Result.getNode())
3505 // If we really need inline code and the target declined to provide it,
3506 // use a (potentially long) sequence of loads and stores.
3508 assert(ConstantSize && "AlwaysInline requires a constant size!");
3509 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3510 ConstantSize->getZExtValue(), Align, true,
3511 DstSV, DstSVOff, SrcSV, SrcSVOff);
3514 // Emit a library call.
3515 TargetLowering::ArgListTy Args;
3516 TargetLowering::ArgListEntry Entry;
3517 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3518 Entry.Node = Dst; Args.push_back(Entry);
3519 Entry.Node = Src; Args.push_back(Entry);
3520 Entry.Node = Size; Args.push_back(Entry);
3521 // FIXME: pass in DebugLoc
3522 std::pair<SDValue,SDValue> CallResult =
3523 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3524 false, false, false, false, 0,
3525 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3526 /*isReturnValueUsed=*/false,
3527 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3528 TLI.getPointerTy()),
3530 return CallResult.second;
3533 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3534 SDValue Src, SDValue Size,
3536 const Value *DstSV, uint64_t DstSVOff,
3537 const Value *SrcSV, uint64_t SrcSVOff) {
3539 // Check to see if we should lower the memmove to loads and stores first.
3540 // For cases within the target-specified limits, this is the best choice.
3541 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3543 // Memmove with size zero? Just return the original chain.
3544 if (ConstantSize->isNullValue())
3548 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3549 ConstantSize->getZExtValue(),
3550 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3551 if (Result.getNode())
3555 // Then check to see if we should lower the memmove with target-specific
3556 // code. If the target chooses to do this, this is the next best.
3558 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3559 DstSV, DstSVOff, SrcSV, SrcSVOff);
3560 if (Result.getNode())
3563 // Emit a library call.
3564 TargetLowering::ArgListTy Args;
3565 TargetLowering::ArgListEntry Entry;
3566 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3567 Entry.Node = Dst; Args.push_back(Entry);
3568 Entry.Node = Src; Args.push_back(Entry);
3569 Entry.Node = Size; Args.push_back(Entry);
3570 // FIXME: pass in DebugLoc
3571 std::pair<SDValue,SDValue> CallResult =
3572 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3573 false, false, false, false, 0,
3574 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3575 /*isReturnValueUsed=*/false,
3576 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3577 TLI.getPointerTy()),
3579 return CallResult.second;
3582 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3583 SDValue Src, SDValue Size,
3585 const Value *DstSV, uint64_t DstSVOff) {
3587 // Check to see if we should lower the memset to stores first.
3588 // For cases within the target-specified limits, this is the best choice.
3589 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3591 // Memset with size zero? Just return the original chain.
3592 if (ConstantSize->isNullValue())
3596 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3597 Align, DstSV, DstSVOff);
3598 if (Result.getNode())
3602 // Then check to see if we should lower the memset with target-specific
3603 // code. If the target chooses to do this, this is the next best.
3605 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3607 if (Result.getNode())
3610 // Emit a library call.
3611 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3612 TargetLowering::ArgListTy Args;
3613 TargetLowering::ArgListEntry Entry;
3614 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3615 Args.push_back(Entry);
3616 // Extend or truncate the argument to be an i32 value for the call.
3617 if (Src.getValueType().bitsGT(MVT::i32))
3618 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3620 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3622 Entry.Ty = Type::getInt32Ty(*getContext());
3623 Entry.isSExt = true;
3624 Args.push_back(Entry);
3626 Entry.Ty = IntPtrTy;
3627 Entry.isSExt = false;
3628 Args.push_back(Entry);
3629 // FIXME: pass in DebugLoc
3630 std::pair<SDValue,SDValue> CallResult =
3631 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3632 false, false, false, false, 0,
3633 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3634 /*isReturnValueUsed=*/false,
3635 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3636 TLI.getPointerTy()),
3638 return CallResult.second;
3641 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3643 SDValue Ptr, SDValue Cmp,
3644 SDValue Swp, const Value* PtrVal,
3645 unsigned Alignment) {
3646 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3647 Alignment = getEVTAlignment(MemVT);
3649 // Check if the memory reference references a frame index
3651 if (const FrameIndexSDNode *FI =
3652 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3653 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3655 MachineFunction &MF = getMachineFunction();
3656 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3658 // For now, atomics are considered to be volatile always.
3659 Flags |= MachineMemOperand::MOVolatile;
3661 MachineMemOperand *MMO =
3662 MF.getMachineMemOperand(PtrVal, Flags, 0,
3663 MemVT.getStoreSize(), Alignment);
3665 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3668 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3670 SDValue Ptr, SDValue Cmp,
3671 SDValue Swp, MachineMemOperand *MMO) {
3672 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3673 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3675 EVT VT = Cmp.getValueType();
3677 SDVTList VTs = getVTList(VT, MVT::Other);
3678 FoldingSetNodeID ID;
3679 ID.AddInteger(MemVT.getRawBits());
3680 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3681 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3683 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3684 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3685 return SDValue(E, 0);
3687 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3688 Ptr, Cmp, Swp, MMO);
3689 CSEMap.InsertNode(N, IP);
3690 AllNodes.push_back(N);
3691 return SDValue(N, 0);
3694 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3696 SDValue Ptr, SDValue Val,
3697 const Value* PtrVal,
3698 unsigned Alignment) {
3699 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3700 Alignment = getEVTAlignment(MemVT);
3702 // Check if the memory reference references a frame index
3704 if (const FrameIndexSDNode *FI =
3705 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3706 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3708 MachineFunction &MF = getMachineFunction();
3709 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3711 // For now, atomics are considered to be volatile always.
3712 Flags |= MachineMemOperand::MOVolatile;
3714 MachineMemOperand *MMO =
3715 MF.getMachineMemOperand(PtrVal, Flags, 0,
3716 MemVT.getStoreSize(), Alignment);
3718 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3721 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3723 SDValue Ptr, SDValue Val,
3724 MachineMemOperand *MMO) {
3725 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3726 Opcode == ISD::ATOMIC_LOAD_SUB ||
3727 Opcode == ISD::ATOMIC_LOAD_AND ||
3728 Opcode == ISD::ATOMIC_LOAD_OR ||
3729 Opcode == ISD::ATOMIC_LOAD_XOR ||
3730 Opcode == ISD::ATOMIC_LOAD_NAND ||
3731 Opcode == ISD::ATOMIC_LOAD_MIN ||
3732 Opcode == ISD::ATOMIC_LOAD_MAX ||
3733 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3734 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3735 Opcode == ISD::ATOMIC_SWAP) &&
3736 "Invalid Atomic Op");
3738 EVT VT = Val.getValueType();
3740 SDVTList VTs = getVTList(VT, MVT::Other);
3741 FoldingSetNodeID ID;
3742 ID.AddInteger(MemVT.getRawBits());
3743 SDValue Ops[] = {Chain, Ptr, Val};
3744 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3746 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3747 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3748 return SDValue(E, 0);
3750 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3752 CSEMap.InsertNode(N, IP);
3753 AllNodes.push_back(N);
3754 return SDValue(N, 0);
3757 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3758 /// Allowed to return something different (and simpler) if Simplify is true.
3759 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3764 SmallVector<EVT, 4> VTs;
3765 VTs.reserve(NumOps);
3766 for (unsigned i = 0; i < NumOps; ++i)
3767 VTs.push_back(Ops[i].getValueType());
3768 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3773 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3774 const EVT *VTs, unsigned NumVTs,
3775 const SDValue *Ops, unsigned NumOps,
3776 EVT MemVT, const Value *srcValue, int SVOff,
3777 unsigned Align, bool Vol,
3778 bool ReadMem, bool WriteMem) {
3779 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3780 MemVT, srcValue, SVOff, Align, Vol,
3785 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3786 const SDValue *Ops, unsigned NumOps,
3787 EVT MemVT, const Value *srcValue, int SVOff,
3788 unsigned Align, bool Vol,
3789 bool ReadMem, bool WriteMem) {
3790 if (Align == 0) // Ensure that codegen never sees alignment 0
3791 Align = getEVTAlignment(MemVT);
3793 MachineFunction &MF = getMachineFunction();
3796 Flags |= MachineMemOperand::MOStore;
3798 Flags |= MachineMemOperand::MOLoad;
3800 Flags |= MachineMemOperand::MOVolatile;
3801 MachineMemOperand *MMO =
3802 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3803 MemVT.getStoreSize(), Align);
3805 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3809 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3810 const SDValue *Ops, unsigned NumOps,
3811 EVT MemVT, MachineMemOperand *MMO) {
3812 assert((Opcode == ISD::INTRINSIC_VOID ||
3813 Opcode == ISD::INTRINSIC_W_CHAIN ||
3814 (Opcode <= INT_MAX &&
3815 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3816 "Opcode is not a memory-accessing opcode!");
3818 // Memoize the node unless it returns a flag.
3819 MemIntrinsicSDNode *N;
3820 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3821 FoldingSetNodeID ID;
3822 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3824 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3825 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3826 return SDValue(E, 0);
3829 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3831 CSEMap.InsertNode(N, IP);
3833 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3836 AllNodes.push_back(N);
3837 return SDValue(N, 0);
3841 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3842 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3843 SDValue Ptr, SDValue Offset,
3844 const Value *SV, int SVOffset, EVT MemVT,
3845 bool isVolatile, bool isNonTemporal,
3846 unsigned Alignment) {
3847 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3848 Alignment = getEVTAlignment(VT);
3850 // Check if the memory reference references a frame index
3852 if (const FrameIndexSDNode *FI =
3853 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3854 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3856 MachineFunction &MF = getMachineFunction();
3857 unsigned Flags = MachineMemOperand::MOLoad;
3859 Flags |= MachineMemOperand::MOVolatile;
3861 Flags |= MachineMemOperand::MONonTemporal;
3862 MachineMemOperand *MMO =
3863 MF.getMachineMemOperand(SV, Flags, SVOffset,
3864 MemVT.getStoreSize(), Alignment);
3865 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3869 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3870 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3871 SDValue Ptr, SDValue Offset, EVT MemVT,
3872 MachineMemOperand *MMO) {
3874 ExtType = ISD::NON_EXTLOAD;
3875 } else if (ExtType == ISD::NON_EXTLOAD) {
3876 assert(VT == MemVT && "Non-extending load from different memory type!");
3879 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3880 "Should only be an extending load, not truncating!");
3881 assert(VT.isInteger() == MemVT.isInteger() &&
3882 "Cannot convert from FP to Int or Int -> FP!");
3883 assert(VT.isVector() == MemVT.isVector() &&
3884 "Cannot use trunc store to convert to or from a vector!");
3885 assert((!VT.isVector() ||
3886 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3887 "Cannot use trunc store to change the number of vector elements!");
3890 bool Indexed = AM != ISD::UNINDEXED;
3891 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3892 "Unindexed load with an offset!");
3894 SDVTList VTs = Indexed ?
3895 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3896 SDValue Ops[] = { Chain, Ptr, Offset };
3897 FoldingSetNodeID ID;
3898 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3899 ID.AddInteger(MemVT.getRawBits());
3900 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3901 MMO->isNonTemporal()));
3903 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3904 cast<LoadSDNode>(E)->refineAlignment(MMO);
3905 return SDValue(E, 0);
3907 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
3909 CSEMap.InsertNode(N, IP);
3910 AllNodes.push_back(N);
3911 return SDValue(N, 0);
3914 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3915 SDValue Chain, SDValue Ptr,
3916 const Value *SV, int SVOffset,
3917 bool isVolatile, bool isNonTemporal,
3918 unsigned Alignment) {
3919 SDValue Undef = getUNDEF(Ptr.getValueType());
3920 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3921 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment);
3924 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3925 SDValue Chain, SDValue Ptr,
3927 int SVOffset, EVT MemVT,
3928 bool isVolatile, bool isNonTemporal,
3929 unsigned Alignment) {
3930 SDValue Undef = getUNDEF(Ptr.getValueType());
3931 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3932 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment);
3936 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3937 SDValue Offset, ISD::MemIndexedMode AM) {
3938 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3939 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3940 "Load is already a indexed load!");
3941 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3942 LD->getChain(), Base, Offset, LD->getSrcValue(),
3943 LD->getSrcValueOffset(), LD->getMemoryVT(),
3944 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
3947 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3948 SDValue Ptr, const Value *SV, int SVOffset,
3949 bool isVolatile, bool isNonTemporal,
3950 unsigned Alignment) {
3951 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3952 Alignment = getEVTAlignment(Val.getValueType());
3954 // Check if the memory reference references a frame index
3956 if (const FrameIndexSDNode *FI =
3957 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3958 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3960 MachineFunction &MF = getMachineFunction();
3961 unsigned Flags = MachineMemOperand::MOStore;
3963 Flags |= MachineMemOperand::MOVolatile;
3965 Flags |= MachineMemOperand::MONonTemporal;
3966 MachineMemOperand *MMO =
3967 MF.getMachineMemOperand(SV, Flags, SVOffset,
3968 Val.getValueType().getStoreSize(), Alignment);
3970 return getStore(Chain, dl, Val, Ptr, MMO);
3973 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3974 SDValue Ptr, MachineMemOperand *MMO) {
3975 EVT VT = Val.getValueType();
3976 SDVTList VTs = getVTList(MVT::Other);
3977 SDValue Undef = getUNDEF(Ptr.getValueType());
3978 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3979 FoldingSetNodeID ID;
3980 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3981 ID.AddInteger(VT.getRawBits());
3982 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
3983 MMO->isNonTemporal()));
3985 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3986 cast<StoreSDNode>(E)->refineAlignment(MMO);
3987 return SDValue(E, 0);
3989 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
3991 CSEMap.InsertNode(N, IP);
3992 AllNodes.push_back(N);
3993 return SDValue(N, 0);
3996 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3997 SDValue Ptr, const Value *SV,
3998 int SVOffset, EVT SVT,
3999 bool isVolatile, bool isNonTemporal,
4000 unsigned Alignment) {
4001 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4002 Alignment = getEVTAlignment(SVT);
4004 // Check if the memory reference references a frame index
4006 if (const FrameIndexSDNode *FI =
4007 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
4008 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
4010 MachineFunction &MF = getMachineFunction();
4011 unsigned Flags = MachineMemOperand::MOStore;
4013 Flags |= MachineMemOperand::MOVolatile;
4015 Flags |= MachineMemOperand::MONonTemporal;
4016 MachineMemOperand *MMO =
4017 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
4019 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4022 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4023 SDValue Ptr, EVT SVT,
4024 MachineMemOperand *MMO) {
4025 EVT VT = Val.getValueType();
4028 return getStore(Chain, dl, Val, Ptr, MMO);
4030 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4031 "Should only be a truncating store, not extending!");
4032 assert(VT.isInteger() == SVT.isInteger() &&
4033 "Can't do FP-INT conversion!");
4034 assert(VT.isVector() == SVT.isVector() &&
4035 "Cannot use trunc store to convert to or from a vector!");
4036 assert((!VT.isVector() ||
4037 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4038 "Cannot use trunc store to change the number of vector elements!");
4040 SDVTList VTs = getVTList(MVT::Other);
4041 SDValue Undef = getUNDEF(Ptr.getValueType());
4042 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4043 FoldingSetNodeID ID;
4044 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4045 ID.AddInteger(SVT.getRawBits());
4046 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4047 MMO->isNonTemporal()));
4049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4050 cast<StoreSDNode>(E)->refineAlignment(MMO);
4051 return SDValue(E, 0);
4053 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4055 CSEMap.InsertNode(N, IP);
4056 AllNodes.push_back(N);
4057 return SDValue(N, 0);
4061 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4062 SDValue Offset, ISD::MemIndexedMode AM) {
4063 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4064 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4065 "Store is already a indexed store!");
4066 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4067 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4068 FoldingSetNodeID ID;
4069 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4070 ID.AddInteger(ST->getMemoryVT().getRawBits());
4071 ID.AddInteger(ST->getRawSubclassData());
4073 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4074 return SDValue(E, 0);
4076 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4077 ST->isTruncatingStore(),
4079 ST->getMemOperand());
4080 CSEMap.InsertNode(N, IP);
4081 AllNodes.push_back(N);
4082 return SDValue(N, 0);
4085 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4086 SDValue Chain, SDValue Ptr,
4088 SDValue Ops[] = { Chain, Ptr, SV };
4089 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4092 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4093 const SDUse *Ops, unsigned NumOps) {
4095 case 0: return getNode(Opcode, DL, VT);
4096 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4097 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4098 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4102 // Copy from an SDUse array into an SDValue array for use with
4103 // the regular getNode logic.
4104 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4105 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4108 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4109 const SDValue *Ops, unsigned NumOps) {
4111 case 0: return getNode(Opcode, DL, VT);
4112 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4113 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4114 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4120 case ISD::SELECT_CC: {
4121 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4122 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4123 "LHS and RHS of condition must have same type!");
4124 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4125 "True and False arms of SelectCC must have same type!");
4126 assert(Ops[2].getValueType() == VT &&
4127 "select_cc node must be of same type as true and false value!");
4131 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4132 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4133 "LHS/RHS of comparison should match types!");
4140 SDVTList VTs = getVTList(VT);
4142 if (VT != MVT::Flag) {
4143 FoldingSetNodeID ID;
4144 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4147 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4148 return SDValue(E, 0);
4150 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4151 CSEMap.InsertNode(N, IP);
4153 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4156 AllNodes.push_back(N);
4160 return SDValue(N, 0);
4163 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4164 const std::vector<EVT> &ResultTys,
4165 const SDValue *Ops, unsigned NumOps) {
4166 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4170 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4171 const EVT *VTs, unsigned NumVTs,
4172 const SDValue *Ops, unsigned NumOps) {
4174 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4175 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4178 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4179 const SDValue *Ops, unsigned NumOps) {
4180 if (VTList.NumVTs == 1)
4181 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4185 // FIXME: figure out how to safely handle things like
4186 // int foo(int x) { return 1 << (x & 255); }
4187 // int bar() { return foo(256); }
4188 case ISD::SRA_PARTS:
4189 case ISD::SRL_PARTS:
4190 case ISD::SHL_PARTS:
4191 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4192 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4193 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4194 else if (N3.getOpcode() == ISD::AND)
4195 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4196 // If the and is only masking out bits that cannot effect the shift,
4197 // eliminate the and.
4198 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4199 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4200 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4206 // Memoize the node unless it returns a flag.
4208 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4209 FoldingSetNodeID ID;
4210 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4212 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4213 return SDValue(E, 0);
4216 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4217 } else if (NumOps == 2) {
4218 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4219 } else if (NumOps == 3) {
4220 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4223 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4225 CSEMap.InsertNode(N, IP);
4228 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4229 } else if (NumOps == 2) {
4230 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4231 } else if (NumOps == 3) {
4232 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4235 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4238 AllNodes.push_back(N);
4242 return SDValue(N, 0);
4245 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4246 return getNode(Opcode, DL, VTList, 0, 0);
4249 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4251 SDValue Ops[] = { N1 };
4252 return getNode(Opcode, DL, VTList, Ops, 1);
4255 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4256 SDValue N1, SDValue N2) {
4257 SDValue Ops[] = { N1, N2 };
4258 return getNode(Opcode, DL, VTList, Ops, 2);
4261 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4262 SDValue N1, SDValue N2, SDValue N3) {
4263 SDValue Ops[] = { N1, N2, N3 };
4264 return getNode(Opcode, DL, VTList, Ops, 3);
4267 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4268 SDValue N1, SDValue N2, SDValue N3,
4270 SDValue Ops[] = { N1, N2, N3, N4 };
4271 return getNode(Opcode, DL, VTList, Ops, 4);
4274 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4275 SDValue N1, SDValue N2, SDValue N3,
4276 SDValue N4, SDValue N5) {
4277 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4278 return getNode(Opcode, DL, VTList, Ops, 5);
4281 SDVTList SelectionDAG::getVTList(EVT VT) {
4282 return makeVTList(SDNode::getValueTypeList(VT), 1);
4285 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4286 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4287 E = VTList.rend(); I != E; ++I)
4288 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4291 EVT *Array = Allocator.Allocate<EVT>(2);
4294 SDVTList Result = makeVTList(Array, 2);
4295 VTList.push_back(Result);
4299 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4300 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4301 E = VTList.rend(); I != E; ++I)
4302 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4306 EVT *Array = Allocator.Allocate<EVT>(3);
4310 SDVTList Result = makeVTList(Array, 3);
4311 VTList.push_back(Result);
4315 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4316 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4317 E = VTList.rend(); I != E; ++I)
4318 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4319 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4322 EVT *Array = Allocator.Allocate<EVT>(4);
4327 SDVTList Result = makeVTList(Array, 4);
4328 VTList.push_back(Result);
4332 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4334 case 0: llvm_unreachable("Cannot have nodes without results!");
4335 case 1: return getVTList(VTs[0]);
4336 case 2: return getVTList(VTs[0], VTs[1]);
4337 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4338 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4342 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4343 E = VTList.rend(); I != E; ++I) {
4344 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4347 bool NoMatch = false;
4348 for (unsigned i = 2; i != NumVTs; ++i)
4349 if (VTs[i] != I->VTs[i]) {
4357 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4358 std::copy(VTs, VTs+NumVTs, Array);
4359 SDVTList Result = makeVTList(Array, NumVTs);
4360 VTList.push_back(Result);
4365 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4366 /// specified operands. If the resultant node already exists in the DAG,
4367 /// this does not modify the specified node, instead it returns the node that
4368 /// already exists. If the resultant node does not exist in the DAG, the
4369 /// input node is returned. As a degenerate case, if you specify the same
4370 /// input operands as the node already has, the input node is returned.
4371 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4372 SDNode *N = InN.getNode();
4373 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4375 // Check to see if there is no change.
4376 if (Op == N->getOperand(0)) return InN;
4378 // See if the modified node already exists.
4379 void *InsertPos = 0;
4380 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4381 return SDValue(Existing, InN.getResNo());
4383 // Nope it doesn't. Remove the node from its current place in the maps.
4385 if (!RemoveNodeFromCSEMaps(N))
4388 // Now we update the operands.
4389 N->OperandList[0].set(Op);
4391 // If this gets put into a CSE map, add it.
4392 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4396 SDValue SelectionDAG::
4397 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4398 SDNode *N = InN.getNode();
4399 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4401 // Check to see if there is no change.
4402 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4403 return InN; // No operands changed, just return the input node.
4405 // See if the modified node already exists.
4406 void *InsertPos = 0;
4407 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4408 return SDValue(Existing, InN.getResNo());
4410 // Nope it doesn't. Remove the node from its current place in the maps.
4412 if (!RemoveNodeFromCSEMaps(N))
4415 // Now we update the operands.
4416 if (N->OperandList[0] != Op1)
4417 N->OperandList[0].set(Op1);
4418 if (N->OperandList[1] != Op2)
4419 N->OperandList[1].set(Op2);
4421 // If this gets put into a CSE map, add it.
4422 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4426 SDValue SelectionDAG::
4427 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4428 SDValue Ops[] = { Op1, Op2, Op3 };
4429 return UpdateNodeOperands(N, Ops, 3);
4432 SDValue SelectionDAG::
4433 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4434 SDValue Op3, SDValue Op4) {
4435 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4436 return UpdateNodeOperands(N, Ops, 4);
4439 SDValue SelectionDAG::
4440 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4441 SDValue Op3, SDValue Op4, SDValue Op5) {
4442 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4443 return UpdateNodeOperands(N, Ops, 5);
4446 SDValue SelectionDAG::
4447 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4448 SDNode *N = InN.getNode();
4449 assert(N->getNumOperands() == NumOps &&
4450 "Update with wrong number of operands");
4452 // Check to see if there is no change.
4453 bool AnyChange = false;
4454 for (unsigned i = 0; i != NumOps; ++i) {
4455 if (Ops[i] != N->getOperand(i)) {
4461 // No operands changed, just return the input node.
4462 if (!AnyChange) return InN;
4464 // See if the modified node already exists.
4465 void *InsertPos = 0;
4466 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4467 return SDValue(Existing, InN.getResNo());
4469 // Nope it doesn't. Remove the node from its current place in the maps.
4471 if (!RemoveNodeFromCSEMaps(N))
4474 // Now we update the operands.
4475 for (unsigned i = 0; i != NumOps; ++i)
4476 if (N->OperandList[i] != Ops[i])
4477 N->OperandList[i].set(Ops[i]);
4479 // If this gets put into a CSE map, add it.
4480 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4484 /// DropOperands - Release the operands and set this node to have
4486 void SDNode::DropOperands() {
4487 // Unlike the code in MorphNodeTo that does this, we don't need to
4488 // watch for dead nodes here.
4489 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4495 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4498 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4500 SDVTList VTs = getVTList(VT);
4501 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4504 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4505 EVT VT, SDValue Op1) {
4506 SDVTList VTs = getVTList(VT);
4507 SDValue Ops[] = { Op1 };
4508 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4511 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4512 EVT VT, SDValue Op1,
4514 SDVTList VTs = getVTList(VT);
4515 SDValue Ops[] = { Op1, Op2 };
4516 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4519 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4520 EVT VT, SDValue Op1,
4521 SDValue Op2, SDValue Op3) {
4522 SDVTList VTs = getVTList(VT);
4523 SDValue Ops[] = { Op1, Op2, Op3 };
4524 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4527 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4528 EVT VT, const SDValue *Ops,
4530 SDVTList VTs = getVTList(VT);
4531 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4534 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4535 EVT VT1, EVT VT2, const SDValue *Ops,
4537 SDVTList VTs = getVTList(VT1, VT2);
4538 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4541 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4543 SDVTList VTs = getVTList(VT1, VT2);
4544 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4547 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4548 EVT VT1, EVT VT2, EVT VT3,
4549 const SDValue *Ops, unsigned NumOps) {
4550 SDVTList VTs = getVTList(VT1, VT2, VT3);
4551 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4554 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4555 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4556 const SDValue *Ops, unsigned NumOps) {
4557 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4558 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4561 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4564 SDVTList VTs = getVTList(VT1, VT2);
4565 SDValue Ops[] = { Op1 };
4566 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4569 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4571 SDValue Op1, SDValue Op2) {
4572 SDVTList VTs = getVTList(VT1, VT2);
4573 SDValue Ops[] = { Op1, Op2 };
4574 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4577 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4579 SDValue Op1, SDValue Op2,
4581 SDVTList VTs = getVTList(VT1, VT2);
4582 SDValue Ops[] = { Op1, Op2, Op3 };
4583 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4586 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4587 EVT VT1, EVT VT2, EVT VT3,
4588 SDValue Op1, SDValue Op2,
4590 SDVTList VTs = getVTList(VT1, VT2, VT3);
4591 SDValue Ops[] = { Op1, Op2, Op3 };
4592 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4595 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4596 SDVTList VTs, const SDValue *Ops,
4598 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4599 // Reset the NodeID to -1.
4604 /// MorphNodeTo - This *mutates* the specified node to have the specified
4605 /// return type, opcode, and operands.
4607 /// Note that MorphNodeTo returns the resultant node. If there is already a
4608 /// node of the specified opcode and operands, it returns that node instead of
4609 /// the current one. Note that the DebugLoc need not be the same.
4611 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4612 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4613 /// node, and because it doesn't require CSE recalculation for any of
4614 /// the node's users.
4616 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4617 SDVTList VTs, const SDValue *Ops,
4619 // If an identical node already exists, use it.
4621 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4622 FoldingSetNodeID ID;
4623 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4624 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4628 if (!RemoveNodeFromCSEMaps(N))
4631 // Start the morphing.
4633 N->ValueList = VTs.VTs;
4634 N->NumValues = VTs.NumVTs;
4636 // Clear the operands list, updating used nodes to remove this from their
4637 // use list. Keep track of any operands that become dead as a result.
4638 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4639 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4641 SDNode *Used = Use.getNode();
4643 if (Used->use_empty())
4644 DeadNodeSet.insert(Used);
4647 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4648 // Initialize the memory references information.
4649 MN->setMemRefs(0, 0);
4650 // If NumOps is larger than the # of operands we can have in a
4651 // MachineSDNode, reallocate the operand list.
4652 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4653 if (MN->OperandsNeedDelete)
4654 delete[] MN->OperandList;
4655 if (NumOps > array_lengthof(MN->LocalOperands))
4656 // We're creating a final node that will live unmorphed for the
4657 // remainder of the current SelectionDAG iteration, so we can allocate
4658 // the operands directly out of a pool with no recycling metadata.
4659 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4662 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4663 MN->OperandsNeedDelete = false;
4665 MN->InitOperands(MN->OperandList, Ops, NumOps);
4667 // If NumOps is larger than the # of operands we currently have, reallocate
4668 // the operand list.
4669 if (NumOps > N->NumOperands) {
4670 if (N->OperandsNeedDelete)
4671 delete[] N->OperandList;
4672 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4673 N->OperandsNeedDelete = true;
4675 N->InitOperands(N->OperandList, Ops, NumOps);
4678 // Delete any nodes that are still dead after adding the uses for the
4680 if (!DeadNodeSet.empty()) {
4681 SmallVector<SDNode *, 16> DeadNodes;
4682 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4683 E = DeadNodeSet.end(); I != E; ++I)
4684 if ((*I)->use_empty())
4685 DeadNodes.push_back(*I);
4686 RemoveDeadNodes(DeadNodes);
4690 CSEMap.InsertNode(N, IP); // Memoize the new node.
4695 /// getMachineNode - These are used for target selectors to create a new node
4696 /// with specified return type(s), MachineInstr opcode, and operands.
4698 /// Note that getMachineNode returns the resultant node. If there is already a
4699 /// node of the specified opcode and operands, it returns that node instead of
4700 /// the current one.
4702 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4703 SDVTList VTs = getVTList(VT);
4704 return getMachineNode(Opcode, dl, VTs, 0, 0);
4708 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4709 SDVTList VTs = getVTList(VT);
4710 SDValue Ops[] = { Op1 };
4711 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4715 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4716 SDValue Op1, SDValue Op2) {
4717 SDVTList VTs = getVTList(VT);
4718 SDValue Ops[] = { Op1, Op2 };
4719 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4723 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4724 SDValue Op1, SDValue Op2, SDValue Op3) {
4725 SDVTList VTs = getVTList(VT);
4726 SDValue Ops[] = { Op1, Op2, Op3 };
4727 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4731 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4732 const SDValue *Ops, unsigned NumOps) {
4733 SDVTList VTs = getVTList(VT);
4734 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4738 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4739 SDVTList VTs = getVTList(VT1, VT2);
4740 return getMachineNode(Opcode, dl, VTs, 0, 0);
4744 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4745 EVT VT1, EVT VT2, SDValue Op1) {
4746 SDVTList VTs = getVTList(VT1, VT2);
4747 SDValue Ops[] = { Op1 };
4748 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4752 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4753 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4754 SDVTList VTs = getVTList(VT1, VT2);
4755 SDValue Ops[] = { Op1, Op2 };
4756 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4760 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4761 EVT VT1, EVT VT2, SDValue Op1,
4762 SDValue Op2, SDValue Op3) {
4763 SDVTList VTs = getVTList(VT1, VT2);
4764 SDValue Ops[] = { Op1, Op2, Op3 };
4765 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4769 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4771 const SDValue *Ops, unsigned NumOps) {
4772 SDVTList VTs = getVTList(VT1, VT2);
4773 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4777 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4778 EVT VT1, EVT VT2, EVT VT3,
4779 SDValue Op1, SDValue Op2) {
4780 SDVTList VTs = getVTList(VT1, VT2, VT3);
4781 SDValue Ops[] = { Op1, Op2 };
4782 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4786 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4787 EVT VT1, EVT VT2, EVT VT3,
4788 SDValue Op1, SDValue Op2, SDValue Op3) {
4789 SDVTList VTs = getVTList(VT1, VT2, VT3);
4790 SDValue Ops[] = { Op1, Op2, Op3 };
4791 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4795 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4796 EVT VT1, EVT VT2, EVT VT3,
4797 const SDValue *Ops, unsigned NumOps) {
4798 SDVTList VTs = getVTList(VT1, VT2, VT3);
4799 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4803 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4804 EVT VT2, EVT VT3, EVT VT4,
4805 const SDValue *Ops, unsigned NumOps) {
4806 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4807 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4811 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4812 const std::vector<EVT> &ResultTys,
4813 const SDValue *Ops, unsigned NumOps) {
4814 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4815 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4819 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4820 const SDValue *Ops, unsigned NumOps) {
4821 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4826 FoldingSetNodeID ID;
4827 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4829 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4830 return cast<MachineSDNode>(E);
4833 // Allocate a new MachineSDNode.
4834 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4836 // Initialize the operands list.
4837 if (NumOps > array_lengthof(N->LocalOperands))
4838 // We're creating a final node that will live unmorphed for the
4839 // remainder of the current SelectionDAG iteration, so we can allocate
4840 // the operands directly out of a pool with no recycling metadata.
4841 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4844 N->InitOperands(N->LocalOperands, Ops, NumOps);
4845 N->OperandsNeedDelete = false;
4848 CSEMap.InsertNode(N, IP);
4850 AllNodes.push_back(N);
4857 /// getTargetExtractSubreg - A convenience function for creating
4858 /// TargetOpcode::EXTRACT_SUBREG nodes.
4860 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4862 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4863 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4864 VT, Operand, SRIdxVal);
4865 return SDValue(Subreg, 0);
4868 /// getTargetInsertSubreg - A convenience function for creating
4869 /// TargetOpcode::INSERT_SUBREG nodes.
4871 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4872 SDValue Operand, SDValue Subreg) {
4873 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4874 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4875 VT, Operand, Subreg, SRIdxVal);
4876 return SDValue(Result, 0);
4879 /// getNodeIfExists - Get the specified node if it's already available, or
4880 /// else return NULL.
4881 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4882 const SDValue *Ops, unsigned NumOps) {
4883 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4884 FoldingSetNodeID ID;
4885 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4887 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4893 /// getDbgValue - Creates a SDDbgValue node.
4896 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4897 DebugLoc DL, unsigned O) {
4898 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4902 SelectionDAG::getDbgValue(MDNode *MDPtr, Value *C, uint64_t Off,
4903 DebugLoc DL, unsigned O) {
4904 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4908 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
4909 DebugLoc DL, unsigned O) {
4910 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
4915 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
4916 /// pointed to by a use iterator is deleted, increment the use iterator
4917 /// so that it doesn't dangle.
4919 /// This class also manages a "downlink" DAGUpdateListener, to forward
4920 /// messages to ReplaceAllUsesWith's callers.
4922 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
4923 SelectionDAG::DAGUpdateListener *DownLink;
4924 SDNode::use_iterator &UI;
4925 SDNode::use_iterator &UE;
4927 virtual void NodeDeleted(SDNode *N, SDNode *E) {
4928 // Increment the iterator as needed.
4929 while (UI != UE && N == *UI)
4932 // Then forward the message.
4933 if (DownLink) DownLink->NodeDeleted(N, E);
4936 virtual void NodeUpdated(SDNode *N) {
4937 // Just forward the message.
4938 if (DownLink) DownLink->NodeUpdated(N);
4942 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
4943 SDNode::use_iterator &ui,
4944 SDNode::use_iterator &ue)
4945 : DownLink(dl), UI(ui), UE(ue) {}
4950 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4951 /// This can cause recursive merging of nodes in the DAG.
4953 /// This version assumes From has a single result value.
4955 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4956 DAGUpdateListener *UpdateListener) {
4957 SDNode *From = FromN.getNode();
4958 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4959 "Cannot replace with this method!");
4960 assert(From != To.getNode() && "Cannot replace uses of with self");
4962 // Iterate over all the existing uses of From. New uses will be added
4963 // to the beginning of the use list, which we avoid visiting.
4964 // This specifically avoids visiting uses of From that arise while the
4965 // replacement is happening, because any such uses would be the result
4966 // of CSE: If an existing node looks like From after one of its operands
4967 // is replaced by To, we don't want to replace of all its users with To
4968 // too. See PR3018 for more info.
4969 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4970 RAUWUpdateListener Listener(UpdateListener, UI, UE);
4974 // This node is about to morph, remove its old self from the CSE maps.
4975 RemoveNodeFromCSEMaps(User);
4977 // A user can appear in a use list multiple times, and when this
4978 // happens the uses are usually next to each other in the list.
4979 // To help reduce the number of CSE recomputations, process all
4980 // the uses of this user that we can find this way.
4982 SDUse &Use = UI.getUse();
4985 } while (UI != UE && *UI == User);
4987 // Now that we have modified User, add it back to the CSE maps. If it
4988 // already exists there, recursively merge the results together.
4989 AddModifiedNodeToCSEMaps(User, &Listener);
4993 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4994 /// This can cause recursive merging of nodes in the DAG.
4996 /// This version assumes that for each value of From, there is a
4997 /// corresponding value in To in the same position with the same type.
4999 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5000 DAGUpdateListener *UpdateListener) {
5002 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5003 assert((!From->hasAnyUseOfValue(i) ||
5004 From->getValueType(i) == To->getValueType(i)) &&
5005 "Cannot use this version of ReplaceAllUsesWith!");
5008 // Handle the trivial case.
5012 // Iterate over just the existing users of From. See the comments in
5013 // the ReplaceAllUsesWith above.
5014 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5015 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5019 // This node is about to morph, remove its old self from the CSE maps.
5020 RemoveNodeFromCSEMaps(User);
5022 // A user can appear in a use list multiple times, and when this
5023 // happens the uses are usually next to each other in the list.
5024 // To help reduce the number of CSE recomputations, process all
5025 // the uses of this user that we can find this way.
5027 SDUse &Use = UI.getUse();
5030 } while (UI != UE && *UI == User);
5032 // Now that we have modified User, add it back to the CSE maps. If it
5033 // already exists there, recursively merge the results together.
5034 AddModifiedNodeToCSEMaps(User, &Listener);
5038 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5039 /// This can cause recursive merging of nodes in the DAG.
5041 /// This version can replace From with any result values. To must match the
5042 /// number and types of values returned by From.
5043 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5045 DAGUpdateListener *UpdateListener) {
5046 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5047 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5049 // Iterate over just the existing users of From. See the comments in
5050 // the ReplaceAllUsesWith above.
5051 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5052 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5056 // This node is about to morph, remove its old self from the CSE maps.
5057 RemoveNodeFromCSEMaps(User);
5059 // A user can appear in a use list multiple times, and when this
5060 // happens the uses are usually next to each other in the list.
5061 // To help reduce the number of CSE recomputations, process all
5062 // the uses of this user that we can find this way.
5064 SDUse &Use = UI.getUse();
5065 const SDValue &ToOp = To[Use.getResNo()];
5068 } while (UI != UE && *UI == User);
5070 // Now that we have modified User, add it back to the CSE maps. If it
5071 // already exists there, recursively merge the results together.
5072 AddModifiedNodeToCSEMaps(User, &Listener);
5076 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5077 /// uses of other values produced by From.getNode() alone. The Deleted
5078 /// vector is handled the same way as for ReplaceAllUsesWith.
5079 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5080 DAGUpdateListener *UpdateListener){
5081 // Handle the really simple, really trivial case efficiently.
5082 if (From == To) return;
5084 // Handle the simple, trivial, case efficiently.
5085 if (From.getNode()->getNumValues() == 1) {
5086 ReplaceAllUsesWith(From, To, UpdateListener);
5090 // Iterate over just the existing users of From. See the comments in
5091 // the ReplaceAllUsesWith above.
5092 SDNode::use_iterator UI = From.getNode()->use_begin(),
5093 UE = From.getNode()->use_end();
5094 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5097 bool UserRemovedFromCSEMaps = false;
5099 // A user can appear in a use list multiple times, and when this
5100 // happens the uses are usually next to each other in the list.
5101 // To help reduce the number of CSE recomputations, process all
5102 // the uses of this user that we can find this way.
5104 SDUse &Use = UI.getUse();
5106 // Skip uses of different values from the same node.
5107 if (Use.getResNo() != From.getResNo()) {
5112 // If this node hasn't been modified yet, it's still in the CSE maps,
5113 // so remove its old self from the CSE maps.
5114 if (!UserRemovedFromCSEMaps) {
5115 RemoveNodeFromCSEMaps(User);
5116 UserRemovedFromCSEMaps = true;
5121 } while (UI != UE && *UI == User);
5123 // We are iterating over all uses of the From node, so if a use
5124 // doesn't use the specific value, no changes are made.
5125 if (!UserRemovedFromCSEMaps)
5128 // Now that we have modified User, add it back to the CSE maps. If it
5129 // already exists there, recursively merge the results together.
5130 AddModifiedNodeToCSEMaps(User, &Listener);
5135 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5136 /// to record information about a use.
5143 /// operator< - Sort Memos by User.
5144 bool operator<(const UseMemo &L, const UseMemo &R) {
5145 return (intptr_t)L.User < (intptr_t)R.User;
5149 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5150 /// uses of other values produced by From.getNode() alone. The same value
5151 /// may appear in both the From and To list. The Deleted vector is
5152 /// handled the same way as for ReplaceAllUsesWith.
5153 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5156 DAGUpdateListener *UpdateListener){
5157 // Handle the simple, trivial case efficiently.
5159 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5161 // Read up all the uses and make records of them. This helps
5162 // processing new uses that are introduced during the
5163 // replacement process.
5164 SmallVector<UseMemo, 4> Uses;
5165 for (unsigned i = 0; i != Num; ++i) {
5166 unsigned FromResNo = From[i].getResNo();
5167 SDNode *FromNode = From[i].getNode();
5168 for (SDNode::use_iterator UI = FromNode->use_begin(),
5169 E = FromNode->use_end(); UI != E; ++UI) {
5170 SDUse &Use = UI.getUse();
5171 if (Use.getResNo() == FromResNo) {
5172 UseMemo Memo = { *UI, i, &Use };
5173 Uses.push_back(Memo);
5178 // Sort the uses, so that all the uses from a given User are together.
5179 std::sort(Uses.begin(), Uses.end());
5181 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5182 UseIndex != UseIndexEnd; ) {
5183 // We know that this user uses some value of From. If it is the right
5184 // value, update it.
5185 SDNode *User = Uses[UseIndex].User;
5187 // This node is about to morph, remove its old self from the CSE maps.
5188 RemoveNodeFromCSEMaps(User);
5190 // The Uses array is sorted, so all the uses for a given User
5191 // are next to each other in the list.
5192 // To help reduce the number of CSE recomputations, process all
5193 // the uses of this user that we can find this way.
5195 unsigned i = Uses[UseIndex].Index;
5196 SDUse &Use = *Uses[UseIndex].Use;
5200 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5202 // Now that we have modified User, add it back to the CSE maps. If it
5203 // already exists there, recursively merge the results together.
5204 AddModifiedNodeToCSEMaps(User, UpdateListener);
5208 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5209 /// based on their topological order. It returns the maximum id and a vector
5210 /// of the SDNodes* in assigned order by reference.
5211 unsigned SelectionDAG::AssignTopologicalOrder() {
5213 unsigned DAGSize = 0;
5215 // SortedPos tracks the progress of the algorithm. Nodes before it are
5216 // sorted, nodes after it are unsorted. When the algorithm completes
5217 // it is at the end of the list.
5218 allnodes_iterator SortedPos = allnodes_begin();
5220 // Visit all the nodes. Move nodes with no operands to the front of
5221 // the list immediately. Annotate nodes that do have operands with their
5222 // operand count. Before we do this, the Node Id fields of the nodes
5223 // may contain arbitrary values. After, the Node Id fields for nodes
5224 // before SortedPos will contain the topological sort index, and the
5225 // Node Id fields for nodes At SortedPos and after will contain the
5226 // count of outstanding operands.
5227 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5230 unsigned Degree = N->getNumOperands();
5232 // A node with no uses, add it to the result array immediately.
5233 N->setNodeId(DAGSize++);
5234 allnodes_iterator Q = N;
5236 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5237 assert(SortedPos != AllNodes.end() && "Overran node list");
5240 // Temporarily use the Node Id as scratch space for the degree count.
5241 N->setNodeId(Degree);
5245 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5246 // such that by the time the end is reached all nodes will be sorted.
5247 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5250 // N is in sorted position, so all its uses have one less operand
5251 // that needs to be sorted.
5252 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5255 unsigned Degree = P->getNodeId();
5256 assert(Degree != 0 && "Invalid node degree");
5259 // All of P's operands are sorted, so P may sorted now.
5260 P->setNodeId(DAGSize++);
5262 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5263 assert(SortedPos != AllNodes.end() && "Overran node list");
5266 // Update P's outstanding operand count.
5267 P->setNodeId(Degree);
5270 if (I == SortedPos) {
5273 dbgs() << "Overran sorted position:\n";
5276 llvm_unreachable(0);
5280 assert(SortedPos == AllNodes.end() &&
5281 "Topological sort incomplete!");
5282 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5283 "First node in topological sort is not the entry token!");
5284 assert(AllNodes.front().getNodeId() == 0 &&
5285 "First node in topological sort has non-zero id!");
5286 assert(AllNodes.front().getNumOperands() == 0 &&
5287 "First node in topological sort has operands!");
5288 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5289 "Last node in topologic sort has unexpected id!");
5290 assert(AllNodes.back().use_empty() &&
5291 "Last node in topologic sort has users!");
5292 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5296 /// AssignOrdering - Assign an order to the SDNode.
5297 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5298 assert(SD && "Trying to assign an order to a null node!");
5299 Ordering->add(SD, Order);
5302 /// GetOrdering - Get the order for the SDNode.
5303 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5304 assert(SD && "Trying to get the order of a null node!");
5305 return Ordering->getOrder(SD);
5308 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5309 /// value is produced by SD.
5310 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) {
5311 DbgInfo->add(DB, SD);
5313 SD->setHasDebugValue(true);
5316 //===----------------------------------------------------------------------===//
5318 //===----------------------------------------------------------------------===//
5320 HandleSDNode::~HandleSDNode() {
5324 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5325 EVT VT, int64_t o, unsigned char TF)
5326 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
5327 Offset(o), TargetFlags(TF) {
5328 TheGlobal = const_cast<GlobalValue*>(GA);
5331 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5332 MachineMemOperand *mmo)
5333 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5334 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5335 MMO->isNonTemporal());
5336 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5337 assert(isNonTemporal() == MMO->isNonTemporal() &&
5338 "Non-temporal encoding error!");
5339 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5342 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5343 const SDValue *Ops, unsigned NumOps, EVT memvt,
5344 MachineMemOperand *mmo)
5345 : SDNode(Opc, dl, VTs, Ops, NumOps),
5346 MemoryVT(memvt), MMO(mmo) {
5347 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5348 MMO->isNonTemporal());
5349 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5350 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5353 /// Profile - Gather unique data for the node.
5355 void SDNode::Profile(FoldingSetNodeID &ID) const {
5356 AddNodeIDNode(ID, this);
5361 std::vector<EVT> VTs;
5364 VTs.reserve(MVT::LAST_VALUETYPE);
5365 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5366 VTs.push_back(MVT((MVT::SimpleValueType)i));
5371 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5372 static ManagedStatic<EVTArray> SimpleVTArray;
5373 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5375 /// getValueTypeList - Return a pointer to the specified value type.
5377 const EVT *SDNode::getValueTypeList(EVT VT) {
5378 if (VT.isExtended()) {
5379 sys::SmartScopedLock<true> Lock(*VTMutex);
5380 return &(*EVTs->insert(VT).first);
5382 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5386 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5387 /// indicated value. This method ignores uses of other values defined by this
5389 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5390 assert(Value < getNumValues() && "Bad value!");
5392 // TODO: Only iterate over uses of a given value of the node
5393 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5394 if (UI.getUse().getResNo() == Value) {
5401 // Found exactly the right number of uses?
5406 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5407 /// value. This method ignores uses of other values defined by this operation.
5408 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5409 assert(Value < getNumValues() && "Bad value!");
5411 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5412 if (UI.getUse().getResNo() == Value)
5419 /// isOnlyUserOf - Return true if this node is the only use of N.
5421 bool SDNode::isOnlyUserOf(SDNode *N) const {
5423 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5434 /// isOperand - Return true if this node is an operand of N.
5436 bool SDValue::isOperandOf(SDNode *N) const {
5437 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5438 if (*this == N->getOperand(i))
5443 bool SDNode::isOperandOf(SDNode *N) const {
5444 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5445 if (this == N->OperandList[i].getNode())
5450 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5451 /// be a chain) reaches the specified operand without crossing any
5452 /// side-effecting instructions. In practice, this looks through token
5453 /// factors and non-volatile loads. In order to remain efficient, this only
5454 /// looks a couple of nodes in, it does not do an exhaustive search.
5455 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5456 unsigned Depth) const {
5457 if (*this == Dest) return true;
5459 // Don't search too deeply, we just want to be able to see through
5460 // TokenFactor's etc.
5461 if (Depth == 0) return false;
5463 // If this is a token factor, all inputs to the TF happen in parallel. If any
5464 // of the operands of the TF reach dest, then we can do the xform.
5465 if (getOpcode() == ISD::TokenFactor) {
5466 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5467 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5472 // Loads don't have side effects, look through them.
5473 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5474 if (!Ld->isVolatile())
5475 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5480 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5481 /// is either an operand of N or it can be reached by traversing up the operands.
5482 /// NOTE: this is an expensive method. Use it carefully.
5483 bool SDNode::isPredecessorOf(SDNode *N) const {
5484 SmallPtrSet<SDNode *, 32> Visited;
5485 SmallVector<SDNode *, 16> Worklist;
5486 Worklist.push_back(N);
5489 N = Worklist.pop_back_val();
5490 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5491 SDNode *Op = N->getOperand(i).getNode();
5494 if (Visited.insert(Op))
5495 Worklist.push_back(Op);
5497 } while (!Worklist.empty());
5502 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5503 assert(Num < NumOperands && "Invalid child # of SDNode!");
5504 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5507 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5508 switch (getOpcode()) {
5510 if (getOpcode() < ISD::BUILTIN_OP_END)
5511 return "<<Unknown DAG Node>>";
5512 if (isMachineOpcode()) {
5514 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5515 if (getMachineOpcode() < TII->getNumOpcodes())
5516 return TII->get(getMachineOpcode()).getName();
5517 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5520 const TargetLowering &TLI = G->getTargetLoweringInfo();
5521 const char *Name = TLI.getTargetNodeName(getOpcode());
5522 if (Name) return Name;
5523 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5525 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5528 case ISD::DELETED_NODE:
5529 return "<<Deleted Node!>>";
5531 case ISD::PREFETCH: return "Prefetch";
5532 case ISD::MEMBARRIER: return "MemBarrier";
5533 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5534 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5535 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5536 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5537 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5538 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5539 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5540 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5541 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5542 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5543 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5544 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5545 case ISD::PCMARKER: return "PCMarker";
5546 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5547 case ISD::SRCVALUE: return "SrcValue";
5548 case ISD::EntryToken: return "EntryToken";
5549 case ISD::TokenFactor: return "TokenFactor";
5550 case ISD::AssertSext: return "AssertSext";
5551 case ISD::AssertZext: return "AssertZext";
5553 case ISD::BasicBlock: return "BasicBlock";
5554 case ISD::VALUETYPE: return "ValueType";
5555 case ISD::Register: return "Register";
5557 case ISD::Constant: return "Constant";
5558 case ISD::ConstantFP: return "ConstantFP";
5559 case ISD::GlobalAddress: return "GlobalAddress";
5560 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5561 case ISD::FrameIndex: return "FrameIndex";
5562 case ISD::JumpTable: return "JumpTable";
5563 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5564 case ISD::RETURNADDR: return "RETURNADDR";
5565 case ISD::FRAMEADDR: return "FRAMEADDR";
5566 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5567 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5568 case ISD::LSDAADDR: return "LSDAADDR";
5569 case ISD::EHSELECTION: return "EHSELECTION";
5570 case ISD::EH_RETURN: return "EH_RETURN";
5571 case ISD::ConstantPool: return "ConstantPool";
5572 case ISD::ExternalSymbol: return "ExternalSymbol";
5573 case ISD::BlockAddress: return "BlockAddress";
5574 case ISD::INTRINSIC_WO_CHAIN:
5575 case ISD::INTRINSIC_VOID:
5576 case ISD::INTRINSIC_W_CHAIN: {
5577 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5578 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5579 if (IID < Intrinsic::num_intrinsics)
5580 return Intrinsic::getName((Intrinsic::ID)IID);
5581 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5582 return TII->getName(IID);
5583 llvm_unreachable("Invalid intrinsic ID");
5586 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5587 case ISD::TargetConstant: return "TargetConstant";
5588 case ISD::TargetConstantFP:return "TargetConstantFP";
5589 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5590 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5591 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5592 case ISD::TargetJumpTable: return "TargetJumpTable";
5593 case ISD::TargetConstantPool: return "TargetConstantPool";
5594 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5595 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5597 case ISD::CopyToReg: return "CopyToReg";
5598 case ISD::CopyFromReg: return "CopyFromReg";
5599 case ISD::UNDEF: return "undef";
5600 case ISD::MERGE_VALUES: return "merge_values";
5601 case ISD::INLINEASM: return "inlineasm";
5602 case ISD::EH_LABEL: return "eh_label";
5603 case ISD::HANDLENODE: return "handlenode";
5606 case ISD::FABS: return "fabs";
5607 case ISD::FNEG: return "fneg";
5608 case ISD::FSQRT: return "fsqrt";
5609 case ISD::FSIN: return "fsin";
5610 case ISD::FCOS: return "fcos";
5611 case ISD::FPOWI: return "fpowi";
5612 case ISD::FPOW: return "fpow";
5613 case ISD::FTRUNC: return "ftrunc";
5614 case ISD::FFLOOR: return "ffloor";
5615 case ISD::FCEIL: return "fceil";
5616 case ISD::FRINT: return "frint";
5617 case ISD::FNEARBYINT: return "fnearbyint";
5620 case ISD::ADD: return "add";
5621 case ISD::SUB: return "sub";
5622 case ISD::MUL: return "mul";
5623 case ISD::MULHU: return "mulhu";
5624 case ISD::MULHS: return "mulhs";
5625 case ISD::SDIV: return "sdiv";
5626 case ISD::UDIV: return "udiv";
5627 case ISD::SREM: return "srem";
5628 case ISD::UREM: return "urem";
5629 case ISD::SMUL_LOHI: return "smul_lohi";
5630 case ISD::UMUL_LOHI: return "umul_lohi";
5631 case ISD::SDIVREM: return "sdivrem";
5632 case ISD::UDIVREM: return "udivrem";
5633 case ISD::AND: return "and";
5634 case ISD::OR: return "or";
5635 case ISD::XOR: return "xor";
5636 case ISD::SHL: return "shl";
5637 case ISD::SRA: return "sra";
5638 case ISD::SRL: return "srl";
5639 case ISD::ROTL: return "rotl";
5640 case ISD::ROTR: return "rotr";
5641 case ISD::FADD: return "fadd";
5642 case ISD::FSUB: return "fsub";
5643 case ISD::FMUL: return "fmul";
5644 case ISD::FDIV: return "fdiv";
5645 case ISD::FREM: return "frem";
5646 case ISD::FCOPYSIGN: return "fcopysign";
5647 case ISD::FGETSIGN: return "fgetsign";
5649 case ISD::SETCC: return "setcc";
5650 case ISD::VSETCC: return "vsetcc";
5651 case ISD::SELECT: return "select";
5652 case ISD::SELECT_CC: return "select_cc";
5653 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5654 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5655 case ISD::CONCAT_VECTORS: return "concat_vectors";
5656 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5657 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5658 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5659 case ISD::CARRY_FALSE: return "carry_false";
5660 case ISD::ADDC: return "addc";
5661 case ISD::ADDE: return "adde";
5662 case ISD::SADDO: return "saddo";
5663 case ISD::UADDO: return "uaddo";
5664 case ISD::SSUBO: return "ssubo";
5665 case ISD::USUBO: return "usubo";
5666 case ISD::SMULO: return "smulo";
5667 case ISD::UMULO: return "umulo";
5668 case ISD::SUBC: return "subc";
5669 case ISD::SUBE: return "sube";
5670 case ISD::SHL_PARTS: return "shl_parts";
5671 case ISD::SRA_PARTS: return "sra_parts";
5672 case ISD::SRL_PARTS: return "srl_parts";
5674 // Conversion operators.
5675 case ISD::SIGN_EXTEND: return "sign_extend";
5676 case ISD::ZERO_EXTEND: return "zero_extend";
5677 case ISD::ANY_EXTEND: return "any_extend";
5678 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5679 case ISD::TRUNCATE: return "truncate";
5680 case ISD::FP_ROUND: return "fp_round";
5681 case ISD::FLT_ROUNDS_: return "flt_rounds";
5682 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5683 case ISD::FP_EXTEND: return "fp_extend";
5685 case ISD::SINT_TO_FP: return "sint_to_fp";
5686 case ISD::UINT_TO_FP: return "uint_to_fp";
5687 case ISD::FP_TO_SINT: return "fp_to_sint";
5688 case ISD::FP_TO_UINT: return "fp_to_uint";
5689 case ISD::BIT_CONVERT: return "bit_convert";
5690 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5691 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5693 case ISD::CONVERT_RNDSAT: {
5694 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5695 default: llvm_unreachable("Unknown cvt code!");
5696 case ISD::CVT_FF: return "cvt_ff";
5697 case ISD::CVT_FS: return "cvt_fs";
5698 case ISD::CVT_FU: return "cvt_fu";
5699 case ISD::CVT_SF: return "cvt_sf";
5700 case ISD::CVT_UF: return "cvt_uf";
5701 case ISD::CVT_SS: return "cvt_ss";
5702 case ISD::CVT_SU: return "cvt_su";
5703 case ISD::CVT_US: return "cvt_us";
5704 case ISD::CVT_UU: return "cvt_uu";
5708 // Control flow instructions
5709 case ISD::BR: return "br";
5710 case ISD::BRIND: return "brind";
5711 case ISD::BR_JT: return "br_jt";
5712 case ISD::BRCOND: return "brcond";
5713 case ISD::BR_CC: return "br_cc";
5714 case ISD::CALLSEQ_START: return "callseq_start";
5715 case ISD::CALLSEQ_END: return "callseq_end";
5718 case ISD::LOAD: return "load";
5719 case ISD::STORE: return "store";
5720 case ISD::VAARG: return "vaarg";
5721 case ISD::VACOPY: return "vacopy";
5722 case ISD::VAEND: return "vaend";
5723 case ISD::VASTART: return "vastart";
5724 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5725 case ISD::EXTRACT_ELEMENT: return "extract_element";
5726 case ISD::BUILD_PAIR: return "build_pair";
5727 case ISD::STACKSAVE: return "stacksave";
5728 case ISD::STACKRESTORE: return "stackrestore";
5729 case ISD::TRAP: return "trap";
5732 case ISD::BSWAP: return "bswap";
5733 case ISD::CTPOP: return "ctpop";
5734 case ISD::CTTZ: return "cttz";
5735 case ISD::CTLZ: return "ctlz";
5738 case ISD::TRAMPOLINE: return "trampoline";
5741 switch (cast<CondCodeSDNode>(this)->get()) {
5742 default: llvm_unreachable("Unknown setcc condition!");
5743 case ISD::SETOEQ: return "setoeq";
5744 case ISD::SETOGT: return "setogt";
5745 case ISD::SETOGE: return "setoge";
5746 case ISD::SETOLT: return "setolt";
5747 case ISD::SETOLE: return "setole";
5748 case ISD::SETONE: return "setone";
5750 case ISD::SETO: return "seto";
5751 case ISD::SETUO: return "setuo";
5752 case ISD::SETUEQ: return "setue";
5753 case ISD::SETUGT: return "setugt";
5754 case ISD::SETUGE: return "setuge";
5755 case ISD::SETULT: return "setult";
5756 case ISD::SETULE: return "setule";
5757 case ISD::SETUNE: return "setune";
5759 case ISD::SETEQ: return "seteq";
5760 case ISD::SETGT: return "setgt";
5761 case ISD::SETGE: return "setge";
5762 case ISD::SETLT: return "setlt";
5763 case ISD::SETLE: return "setle";
5764 case ISD::SETNE: return "setne";
5769 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5778 return "<post-inc>";
5780 return "<post-dec>";
5784 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5785 std::string S = "< ";
5799 if (getByValAlign())
5800 S += "byval-align:" + utostr(getByValAlign()) + " ";
5802 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5804 S += "byval-size:" + utostr(getByValSize()) + " ";
5808 void SDNode::dump() const { dump(0); }
5809 void SDNode::dump(const SelectionDAG *G) const {
5813 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5814 OS << (void*)this << ": ";
5816 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5818 if (getValueType(i) == MVT::Other)
5821 OS << getValueType(i).getEVTString();
5823 OS << " = " << getOperationName(G);
5826 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5827 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5828 if (!MN->memoperands_empty()) {
5831 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5832 e = MN->memoperands_end(); i != e; ++i) {
5839 } else if (const ShuffleVectorSDNode *SVN =
5840 dyn_cast<ShuffleVectorSDNode>(this)) {
5842 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5843 int Idx = SVN->getMaskElt(i);
5851 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5852 OS << '<' << CSDN->getAPIntValue() << '>';
5853 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5854 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5855 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5856 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5857 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5860 CSDN->getValueAPF().bitcastToAPInt().dump();
5863 } else if (const GlobalAddressSDNode *GADN =
5864 dyn_cast<GlobalAddressSDNode>(this)) {
5865 int64_t offset = GADN->getOffset();
5867 WriteAsOperand(OS, GADN->getGlobal());
5870 OS << " + " << offset;
5872 OS << " " << offset;
5873 if (unsigned int TF = GADN->getTargetFlags())
5874 OS << " [TF=" << TF << ']';
5875 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5876 OS << "<" << FIDN->getIndex() << ">";
5877 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5878 OS << "<" << JTDN->getIndex() << ">";
5879 if (unsigned int TF = JTDN->getTargetFlags())
5880 OS << " [TF=" << TF << ']';
5881 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5882 int offset = CP->getOffset();
5883 if (CP->isMachineConstantPoolEntry())
5884 OS << "<" << *CP->getMachineCPVal() << ">";
5886 OS << "<" << *CP->getConstVal() << ">";
5888 OS << " + " << offset;
5890 OS << " " << offset;
5891 if (unsigned int TF = CP->getTargetFlags())
5892 OS << " [TF=" << TF << ']';
5893 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5895 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5897 OS << LBB->getName() << " ";
5898 OS << (const void*)BBDN->getBasicBlock() << ">";
5899 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5900 if (G && R->getReg() &&
5901 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5902 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5904 OS << " %reg" << R->getReg();
5906 } else if (const ExternalSymbolSDNode *ES =
5907 dyn_cast<ExternalSymbolSDNode>(this)) {
5908 OS << "'" << ES->getSymbol() << "'";
5909 if (unsigned int TF = ES->getTargetFlags())
5910 OS << " [TF=" << TF << ']';
5911 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5913 OS << "<" << M->getValue() << ">";
5916 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5917 OS << ":" << N->getVT().getEVTString();
5919 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5920 OS << "<" << *LD->getMemOperand();
5923 switch (LD->getExtensionType()) {
5924 default: doExt = false; break;
5925 case ISD::EXTLOAD: OS << ", anyext"; break;
5926 case ISD::SEXTLOAD: OS << ", sext"; break;
5927 case ISD::ZEXTLOAD: OS << ", zext"; break;
5930 OS << " from " << LD->getMemoryVT().getEVTString();
5932 const char *AM = getIndexedModeName(LD->getAddressingMode());
5937 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5938 OS << "<" << *ST->getMemOperand();
5940 if (ST->isTruncatingStore())
5941 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
5943 const char *AM = getIndexedModeName(ST->getAddressingMode());
5948 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
5949 OS << "<" << *M->getMemOperand() << ">";
5950 } else if (const BlockAddressSDNode *BA =
5951 dyn_cast<BlockAddressSDNode>(this)) {
5953 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
5955 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
5957 if (unsigned int TF = BA->getTargetFlags())
5958 OS << " [TF=" << TF << ']';
5962 if (unsigned Order = G->GetOrdering(this))
5963 OS << " [ORD=" << Order << ']';
5965 if (getNodeId() != -1)
5966 OS << " [ID=" << getNodeId() << ']';
5969 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5971 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5972 if (i) OS << ", "; else OS << " ";
5973 OS << (void*)getOperand(i).getNode();
5974 if (unsigned RN = getOperand(i).getResNo())
5977 print_details(OS, G);
5980 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
5981 const SelectionDAG *G, unsigned depth,
5994 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5996 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6000 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6001 unsigned depth) const {
6002 printrWithDepthHelper(OS, this, G, depth, 0);
6005 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6006 // Don't print impossibly deep things.
6007 printrWithDepth(OS, G, 100);
6010 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6011 printrWithDepth(dbgs(), G, depth);
6014 void SDNode::dumprFull(const SelectionDAG *G) const {
6015 // Don't print impossibly deep things.
6016 dumprWithDepth(G, 100);
6019 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6020 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6021 if (N->getOperand(i).getNode()->hasOneUse())
6022 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6024 dbgs() << "\n" << std::string(indent+2, ' ')
6025 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6029 dbgs().indent(indent);
6033 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6034 assert(N->getNumValues() == 1 &&
6035 "Can't unroll a vector with multiple results!");
6037 EVT VT = N->getValueType(0);
6038 unsigned NE = VT.getVectorNumElements();
6039 EVT EltVT = VT.getVectorElementType();
6040 DebugLoc dl = N->getDebugLoc();
6042 SmallVector<SDValue, 8> Scalars;
6043 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6045 // If ResNE is 0, fully unroll the vector op.
6048 else if (NE > ResNE)
6052 for (i= 0; i != NE; ++i) {
6053 for (unsigned j = 0; j != N->getNumOperands(); ++j) {
6054 SDValue Operand = N->getOperand(j);
6055 EVT OperandVT = Operand.getValueType();
6056 if (OperandVT.isVector()) {
6057 // A vector operand; extract a single element.
6058 EVT OperandEltVT = OperandVT.getVectorElementType();
6059 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6062 getConstant(i, MVT::i32));
6064 // A scalar operand; just use it as is.
6065 Operands[j] = Operand;
6069 switch (N->getOpcode()) {
6071 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6072 &Operands[0], Operands.size()));
6079 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6080 getShiftAmountOperand(Operands[1])));
6082 case ISD::SIGN_EXTEND_INREG:
6083 case ISD::FP_ROUND_INREG: {
6084 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6085 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6087 getValueType(ExtVT)));
6092 for (; i < ResNE; ++i)
6093 Scalars.push_back(getUNDEF(EltVT));
6095 return getNode(ISD::BUILD_VECTOR, dl,
6096 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6097 &Scalars[0], Scalars.size());
6101 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6102 /// location that is 'Dist' units away from the location that the 'Base' load
6103 /// is loading from.
6104 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6105 unsigned Bytes, int Dist) const {
6106 if (LD->getChain() != Base->getChain())
6108 EVT VT = LD->getValueType(0);
6109 if (VT.getSizeInBits() / 8 != Bytes)
6112 SDValue Loc = LD->getOperand(1);
6113 SDValue BaseLoc = Base->getOperand(1);
6114 if (Loc.getOpcode() == ISD::FrameIndex) {
6115 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6117 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6118 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6119 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6120 int FS = MFI->getObjectSize(FI);
6121 int BFS = MFI->getObjectSize(BFI);
6122 if (FS != BFS || FS != (int)Bytes) return false;
6123 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6125 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6126 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6127 if (V && (V->getSExtValue() == Dist*Bytes))
6131 GlobalValue *GV1 = NULL;
6132 GlobalValue *GV2 = NULL;
6133 int64_t Offset1 = 0;
6134 int64_t Offset2 = 0;
6135 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6136 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6137 if (isGA1 && isGA2 && GV1 == GV2)
6138 return Offset1 == (Offset2 + Dist*Bytes);
6143 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6144 /// it cannot be inferred.
6145 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6146 // If this is a GlobalAddress + cst, return the alignment.
6148 int64_t GVOffset = 0;
6149 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6150 // If GV has specified alignment, then use it. Otherwise, use the preferred
6152 unsigned Align = GV->getAlignment();
6154 if (GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6155 if (GVar->hasInitializer()) {
6156 const TargetData *TD = TLI.getTargetData();
6157 Align = TD->getPreferredAlignment(GVar);
6161 return MinAlign(Align, GVOffset);
6164 // If this is a direct reference to a stack slot, use information about the
6165 // stack slot's alignment.
6166 int FrameIdx = 1 << 31;
6167 int64_t FrameOffset = 0;
6168 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6169 FrameIdx = FI->getIndex();
6170 } else if (Ptr.getOpcode() == ISD::ADD &&
6171 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6172 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6173 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6174 FrameOffset = Ptr.getConstantOperandVal(1);
6177 if (FrameIdx != (1 << 31)) {
6178 // FIXME: Handle FI+CST.
6179 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6180 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6182 if (MFI.isFixedObjectIndex(FrameIdx)) {
6183 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
6185 // The alignment of the frame index can be determined from its offset from
6186 // the incoming frame position. If the frame object is at offset 32 and
6187 // the stack is guaranteed to be 16-byte aligned, then we know that the
6188 // object is 16-byte aligned.
6189 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
6190 unsigned Align = MinAlign(ObjectOffset, StackAlign);
6192 // Finally, the frame object itself may have a known alignment. Factor
6193 // the alignment + offset into a new alignment. For example, if we know
6194 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
6195 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
6196 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
6197 return std::max(Align, FIInfoAlign);
6205 void SelectionDAG::dump() const {
6206 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6208 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6210 const SDNode *N = I;
6211 if (!N->hasOneUse() && N != getRoot().getNode())
6212 DumpNodes(N, 2, this);
6215 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6220 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6222 print_details(OS, G);
6225 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6226 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6227 const SelectionDAG *G, VisitedSDNodeSet &once) {
6228 if (!once.insert(N)) // If we've been here before, return now.
6231 // Dump the current SDNode, but don't end the line yet.
6232 OS << std::string(indent, ' ');
6235 // Having printed this SDNode, walk the children:
6236 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6237 const SDNode *child = N->getOperand(i).getNode();
6242 if (child->getNumOperands() == 0) {
6243 // This child has no grandchildren; print it inline right here.
6244 child->printr(OS, G);
6246 } else { // Just the address. FIXME: also print the child's opcode.
6248 if (unsigned RN = N->getOperand(i).getResNo())
6255 // Dump children that have grandchildren on their own line(s).
6256 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6257 const SDNode *child = N->getOperand(i).getNode();
6258 DumpNodesr(OS, child, indent+2, G, once);
6262 void SDNode::dumpr() const {
6263 VisitedSDNodeSet once;
6264 DumpNodesr(dbgs(), this, 0, 0, once);
6267 void SDNode::dumpr(const SelectionDAG *G) const {
6268 VisitedSDNodeSet once;
6269 DumpNodesr(dbgs(), this, 0, G, once);
6273 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6274 unsigned GlobalAddressSDNode::getAddressSpace() const {
6275 return getGlobal()->getType()->getAddressSpace();
6279 const Type *ConstantPoolSDNode::getType() const {
6280 if (isMachineConstantPoolEntry())
6281 return Val.MachineCPVal->getType();
6282 return Val.ConstVal->getType();
6285 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6287 unsigned &SplatBitSize,
6289 unsigned MinSplatBits,
6291 EVT VT = getValueType(0);
6292 assert(VT.isVector() && "Expected a vector type");
6293 unsigned sz = VT.getSizeInBits();
6294 if (MinSplatBits > sz)
6297 SplatValue = APInt(sz, 0);
6298 SplatUndef = APInt(sz, 0);
6300 // Get the bits. Bits with undefined values (when the corresponding element
6301 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6302 // in SplatValue. If any of the values are not constant, give up and return
6304 unsigned int nOps = getNumOperands();
6305 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6306 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6308 for (unsigned j = 0; j < nOps; ++j) {
6309 unsigned i = isBigEndian ? nOps-1-j : j;
6310 SDValue OpVal = getOperand(i);
6311 unsigned BitPos = j * EltBitSize;
6313 if (OpVal.getOpcode() == ISD::UNDEF)
6314 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6315 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6316 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6317 zextOrTrunc(sz) << BitPos);
6318 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6319 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6324 // The build_vector is all constants or undefs. Find the smallest element
6325 // size that splats the vector.
6327 HasAnyUndefs = (SplatUndef != 0);
6330 unsigned HalfSize = sz / 2;
6331 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6332 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6333 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6334 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6336 // If the two halves do not match (ignoring undef bits), stop here.
6337 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6338 MinSplatBits > HalfSize)
6341 SplatValue = HighValue | LowValue;
6342 SplatUndef = HighUndef & LowUndef;
6351 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6352 // Find the first non-undef value in the shuffle mask.
6354 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6357 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6359 // Make sure all remaining elements are either undef or the same as the first
6361 for (int Idx = Mask[i]; i != e; ++i)
6362 if (Mask[i] >= 0 && Mask[i] != Idx)
6368 static void checkForCyclesHelper(const SDNode *N,
6369 SmallPtrSet<const SDNode*, 32> &Visited,
6370 SmallPtrSet<const SDNode*, 32> &Checked) {
6371 // If this node has already been checked, don't check it again.
6372 if (Checked.count(N))
6375 // If a node has already been visited on this depth-first walk, reject it as
6377 if (!Visited.insert(N)) {
6378 dbgs() << "Offending node:\n";
6380 errs() << "Detected cycle in SelectionDAG\n";
6384 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6385 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6392 void llvm::checkForCycles(const llvm::SDNode *N) {
6394 assert(N && "Checking nonexistant SDNode");
6395 SmallPtrSet<const SDNode*, 32> visited;
6396 SmallPtrSet<const SDNode*, 32> checked;
6397 checkForCyclesHelper(N, visited, checked);
6401 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6402 checkForCycles(DAG->getRoot().getNode());