1 //===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // These classes wrap the information about a call or function
11 // definition used to handle ABI compliancy.
13 //===----------------------------------------------------------------------===//
15 #include "TargetInfo.h"
17 #include "CodeGenFunction.h"
18 #include "clang/AST/RecordLayout.h"
19 #include "llvm/Type.h"
20 #include "llvm/Target/TargetData.h"
21 #include "llvm/ADT/Triple.h"
22 #include "llvm/Support/raw_ostream.h"
23 using namespace clang;
24 using namespace CodeGen;
26 static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder,
31 // Alternatively, we could emit this as a loop in the source.
32 for (unsigned I = FirstIndex; I <= LastIndex; ++I) {
33 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I);
34 Builder.CreateStore(Value, Cell);
38 static bool isAggregateTypeForABI(QualType T) {
39 return CodeGenFunction::hasAggregateLLVMType(T) ||
40 T->isMemberFunctionPointerType();
43 ABIInfo::~ABIInfo() {}
45 ASTContext &ABIInfo::getContext() const {
46 return CGT.getContext();
49 llvm::LLVMContext &ABIInfo::getVMContext() const {
50 return CGT.getLLVMContext();
53 const llvm::TargetData &ABIInfo::getTargetData() const {
54 return CGT.getTargetData();
58 void ABIArgInfo::dump() const {
59 llvm::raw_ostream &OS = llvm::errs();
60 OS << "(ABIArgInfo Kind=";
64 if (const llvm::Type *Ty = getCoerceToType())
76 OS << "Indirect Align=" << getIndirectAlign()
77 << " Byal=" << getIndirectByVal()
78 << " Realign=" << getIndirectRealign();
87 TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; }
89 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays);
91 /// isEmptyField - Return true iff a the field is "empty", that is it
92 /// is an unnamed bit-field or an (array of) empty record(s).
93 static bool isEmptyField(ASTContext &Context, const FieldDecl *FD,
95 if (FD->isUnnamedBitfield())
98 QualType FT = FD->getType();
100 // Constant arrays of empty records count as empty, strip them off.
102 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT))
103 FT = AT->getElementType();
105 const RecordType *RT = FT->getAs<RecordType>();
109 // C++ record fields are never empty, at least in the Itanium ABI.
111 // FIXME: We should use a predicate for whether this behavior is true in the
113 if (isa<CXXRecordDecl>(RT->getDecl()))
116 return isEmptyRecord(Context, FT, AllowArrays);
119 /// isEmptyRecord - Return true iff a structure contains only empty
120 /// fields. Note that a structure with a flexible array member is not
121 /// considered empty.
122 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) {
123 const RecordType *RT = T->getAs<RecordType>();
126 const RecordDecl *RD = RT->getDecl();
127 if (RD->hasFlexibleArrayMember())
130 // If this is a C++ record, check the bases first.
131 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
132 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
133 e = CXXRD->bases_end(); i != e; ++i)
134 if (!isEmptyRecord(Context, i->getType(), true))
137 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
139 if (!isEmptyField(Context, *i, AllowArrays))
144 /// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either
145 /// a non-trivial destructor or a non-trivial copy constructor.
146 static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) {
147 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl());
151 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor();
154 /// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is
155 /// a record type with either a non-trivial destructor or a non-trivial copy
157 static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) {
158 const RecordType *RT = T->getAs<RecordType>();
162 return hasNonTrivialDestructorOrCopyConstructor(RT);
165 /// isSingleElementStruct - Determine if a structure is a "single
166 /// element struct", i.e. it has exactly one non-empty field or
167 /// exactly one field which is itself a single element
168 /// struct. Structures with flexible array members are never
169 /// considered single element structs.
171 /// \return The field declaration for the single non-empty field, if
173 static const Type *isSingleElementStruct(QualType T, ASTContext &Context) {
174 const RecordType *RT = T->getAsStructureType();
178 const RecordDecl *RD = RT->getDecl();
179 if (RD->hasFlexibleArrayMember())
182 const Type *Found = 0;
184 // If this is a C++ record, check the bases first.
185 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
186 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
187 e = CXXRD->bases_end(); i != e; ++i) {
188 // Ignore empty records.
189 if (isEmptyRecord(Context, i->getType(), true))
192 // If we already found an element then this isn't a single-element struct.
196 // If this is non-empty and not a single element struct, the composite
197 // cannot be a single element struct.
198 Found = isSingleElementStruct(i->getType(), Context);
204 // Check for single element.
205 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
207 const FieldDecl *FD = *i;
208 QualType FT = FD->getType();
210 // Ignore empty fields.
211 if (isEmptyField(Context, FD, true))
214 // If we already found an element then this isn't a single-element
219 // Treat single element arrays as the element.
220 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) {
221 if (AT->getSize().getZExtValue() != 1)
223 FT = AT->getElementType();
226 if (!isAggregateTypeForABI(FT)) {
227 Found = FT.getTypePtr();
229 Found = isSingleElementStruct(FT, Context);
238 static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) {
239 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() &&
240 !Ty->isAnyComplexType() && !Ty->isEnumeralType() &&
241 !Ty->isBlockPointerType())
244 uint64_t Size = Context.getTypeSize(Ty);
245 return Size == 32 || Size == 64;
248 /// canExpandIndirectArgument - Test whether an argument type which is to be
249 /// passed indirectly (on the stack) would have the equivalent layout if it was
250 /// expanded into separate arguments. If so, we prefer to do the latter to avoid
251 /// inhibiting optimizations.
253 // FIXME: This predicate is missing many cases, currently it just follows
254 // llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We
255 // should probably make this smarter, or better yet make the LLVM backend
256 // capable of handling it.
257 static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) {
258 // We can only expand structure types.
259 const RecordType *RT = Ty->getAs<RecordType>();
263 // We can only expand (C) structures.
265 // FIXME: This needs to be generalized to handle classes as well.
266 const RecordDecl *RD = RT->getDecl();
267 if (!RD->isStruct() || isa<CXXRecordDecl>(RD))
270 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
272 const FieldDecl *FD = *i;
274 if (!is32Or64BitBasicType(FD->getType(), Context))
277 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know
278 // how to expand them yet, and the predicate for telling if a bitfield still
279 // counts as "basic" is more complicated than what we were doing previously.
280 if (FD->isBitField())
288 /// DefaultABIInfo - The default implementation for ABI specific
289 /// details. This implementation provides information which results in
290 /// self-consistent and sensible LLVM IR generation, but does not
291 /// conform to any particular ABI.
292 class DefaultABIInfo : public ABIInfo {
294 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
296 ABIArgInfo classifyReturnType(QualType RetTy) const;
297 ABIArgInfo classifyArgumentType(QualType RetTy) const;
299 virtual void computeInfo(CGFunctionInfo &FI) const {
300 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
301 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
303 it->info = classifyArgumentType(it->type);
306 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
307 CodeGenFunction &CGF) const;
310 class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
312 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
313 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
316 llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
317 CodeGenFunction &CGF) const {
321 ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
322 if (isAggregateTypeForABI(Ty))
323 return ABIArgInfo::getIndirect(0);
325 // Treat an enum type as its underlying type.
326 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
327 Ty = EnumTy->getDecl()->getIntegerType();
329 return (Ty->isPromotableIntegerType() ?
330 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
333 ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const {
334 if (RetTy->isVoidType())
335 return ABIArgInfo::getIgnore();
337 if (isAggregateTypeForABI(RetTy))
338 return ABIArgInfo::getIndirect(0);
340 // Treat an enum type as its underlying type.
341 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
342 RetTy = EnumTy->getDecl()->getIntegerType();
344 return (RetTy->isPromotableIntegerType() ?
345 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
348 /// UseX86_MMXType - Return true if this is an MMX type that should use the special
350 bool UseX86_MMXType(const llvm::Type *IRType) {
351 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the
352 // special x86_mmx type.
353 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 &&
354 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() &&
355 IRType->getScalarSizeInBits() != 64;
358 static const llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
359 llvm::StringRef Constraint,
360 const llvm::Type* Ty) {
361 if (Constraint=="y" && Ty->isVectorTy())
362 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext());
366 //===----------------------------------------------------------------------===//
367 // X86-32 ABI Implementation
368 //===----------------------------------------------------------------------===//
370 /// X86_32ABIInfo - The X86-32 ABI information.
371 class X86_32ABIInfo : public ABIInfo {
372 static const unsigned MinABIStackAlignInBytes = 4;
374 bool IsDarwinVectorABI;
375 bool IsSmallStructInRegABI;
377 static bool isRegisterSize(unsigned Size) {
378 return (Size == 8 || Size == 16 || Size == 32 || Size == 64);
381 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context);
383 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
384 /// such that the argument will be passed in memory.
385 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const;
387 /// \brief Return the alignment to use for the given type on the stack.
388 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const;
392 ABIArgInfo classifyReturnType(QualType RetTy) const;
393 ABIArgInfo classifyArgumentType(QualType RetTy) const;
395 virtual void computeInfo(CGFunctionInfo &FI) const {
396 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
397 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
399 it->info = classifyArgumentType(it->type);
402 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
403 CodeGenFunction &CGF) const;
405 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p)
406 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p) {}
409 class X86_32TargetCodeGenInfo : public TargetCodeGenInfo {
411 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p)
412 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p)) {}
414 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
415 CodeGen::CodeGenModule &CGM) const;
417 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
418 // Darwin uses different dwarf register numbers for EH.
419 if (CGM.isTargetDarwin()) return 5;
424 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
425 llvm::Value *Address) const;
427 const llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
428 llvm::StringRef Constraint,
429 const llvm::Type* Ty) const {
430 return X86AdjustInlineAsmType(CGF, Constraint, Ty);
437 /// shouldReturnTypeInRegister - Determine if the given type should be
438 /// passed in a register (for the Darwin ABI).
439 bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty,
440 ASTContext &Context) {
441 uint64_t Size = Context.getTypeSize(Ty);
443 // Type must be register sized.
444 if (!isRegisterSize(Size))
447 if (Ty->isVectorType()) {
448 // 64- and 128- bit vectors inside structures are not returned in
450 if (Size == 64 || Size == 128)
456 // If this is a builtin, pointer, enum, complex type, member pointer, or
457 // member function pointer it is ok.
458 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() ||
459 Ty->isAnyComplexType() || Ty->isEnumeralType() ||
460 Ty->isBlockPointerType() || Ty->isMemberPointerType())
463 // Arrays are treated like records.
464 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty))
465 return shouldReturnTypeInRegister(AT->getElementType(), Context);
467 // Otherwise, it must be a record type.
468 const RecordType *RT = Ty->getAs<RecordType>();
469 if (!RT) return false;
471 // FIXME: Traverse bases here too.
473 // Structure types are passed in register if all fields would be
474 // passed in a register.
475 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(),
476 e = RT->getDecl()->field_end(); i != e; ++i) {
477 const FieldDecl *FD = *i;
479 // Empty fields are ignored.
480 if (isEmptyField(Context, FD, true))
483 // Check fields recursively.
484 if (!shouldReturnTypeInRegister(FD->getType(), Context))
491 ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const {
492 if (RetTy->isVoidType())
493 return ABIArgInfo::getIgnore();
495 if (const VectorType *VT = RetTy->getAs<VectorType>()) {
496 // On Darwin, some vectors are returned in registers.
497 if (IsDarwinVectorABI) {
498 uint64_t Size = getContext().getTypeSize(RetTy);
500 // 128-bit vectors are a special case; they are returned in
501 // registers and we need to make sure to pick a type the LLVM
502 // backend will like.
504 return ABIArgInfo::getDirect(llvm::VectorType::get(
505 llvm::Type::getInt64Ty(getVMContext()), 2));
507 // Always return in register if it fits in a general purpose
508 // register, or if it is 64 bits and has a single element.
509 if ((Size == 8 || Size == 16 || Size == 32) ||
510 (Size == 64 && VT->getNumElements() == 1))
511 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
514 return ABIArgInfo::getIndirect(0);
517 return ABIArgInfo::getDirect();
520 if (isAggregateTypeForABI(RetTy)) {
521 if (const RecordType *RT = RetTy->getAs<RecordType>()) {
522 // Structures with either a non-trivial destructor or a non-trivial
523 // copy constructor are always indirect.
524 if (hasNonTrivialDestructorOrCopyConstructor(RT))
525 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
527 // Structures with flexible arrays are always indirect.
528 if (RT->getDecl()->hasFlexibleArrayMember())
529 return ABIArgInfo::getIndirect(0);
532 // If specified, structs and unions are always indirect.
533 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType())
534 return ABIArgInfo::getIndirect(0);
536 // Classify "single element" structs as their element type.
537 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) {
538 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) {
539 if (BT->isIntegerType()) {
540 // We need to use the size of the structure, padding
541 // bit-fields can adjust that to be larger than the single
543 uint64_t Size = getContext().getTypeSize(RetTy);
544 return ABIArgInfo::getDirect(
545 llvm::IntegerType::get(getVMContext(), (unsigned)Size));
548 if (BT->getKind() == BuiltinType::Float) {
549 assert(getContext().getTypeSize(RetTy) ==
550 getContext().getTypeSize(SeltTy) &&
551 "Unexpect single element structure size!");
552 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext()));
555 if (BT->getKind() == BuiltinType::Double) {
556 assert(getContext().getTypeSize(RetTy) ==
557 getContext().getTypeSize(SeltTy) &&
558 "Unexpect single element structure size!");
559 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext()));
561 } else if (SeltTy->isPointerType()) {
562 // FIXME: It would be really nice if this could come out as the proper
564 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext());
565 return ABIArgInfo::getDirect(PtrTy);
566 } else if (SeltTy->isVectorType()) {
567 // 64- and 128-bit vectors are never returned in a
568 // register when inside a structure.
569 uint64_t Size = getContext().getTypeSize(RetTy);
570 if (Size == 64 || Size == 128)
571 return ABIArgInfo::getIndirect(0);
573 return classifyReturnType(QualType(SeltTy, 0));
577 // Small structures which are register sized are generally returned
579 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) {
580 uint64_t Size = getContext().getTypeSize(RetTy);
581 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size));
584 return ABIArgInfo::getIndirect(0);
587 // Treat an enum type as its underlying type.
588 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
589 RetTy = EnumTy->getDecl()->getIntegerType();
591 return (RetTy->isPromotableIntegerType() ?
592 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
595 static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) {
596 const RecordType *RT = Ty->getAs<RecordType>();
599 const RecordDecl *RD = RT->getDecl();
601 // If this is a C++ record, check the bases first.
602 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
603 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
604 e = CXXRD->bases_end(); i != e; ++i)
605 if (!isRecordWithSSEVectorType(Context, i->getType()))
608 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
610 QualType FT = i->getType();
612 if (FT->getAs<VectorType>() && Context.getTypeSize(Ty) == 128)
615 if (isRecordWithSSEVectorType(Context, FT))
622 unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty,
623 unsigned Align) const {
624 // Otherwise, if the alignment is less than or equal to the minimum ABI
625 // alignment, just use the default; the backend will handle this.
626 if (Align <= MinABIStackAlignInBytes)
627 return 0; // Use default alignment.
629 // On non-Darwin, the stack type alignment is always 4.
630 if (!IsDarwinVectorABI) {
631 // Set explicit alignment, since we may need to realign the top.
632 return MinABIStackAlignInBytes;
635 // Otherwise, if the type contains an SSE vector type, the alignment is 16.
636 if (isRecordWithSSEVectorType(getContext(), Ty))
639 return MinABIStackAlignInBytes;
642 ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const {
644 return ABIArgInfo::getIndirect(0, false);
646 // Compute the byval alignment.
647 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8;
648 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign);
650 return ABIArgInfo::getIndirect(0);
652 // If the stack alignment is less than the type alignment, realign the
654 if (StackAlign < TypeAlign)
655 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true,
658 return ABIArgInfo::getIndirect(StackAlign);
661 ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const {
662 // FIXME: Set alignment on indirect arguments.
663 if (isAggregateTypeForABI(Ty)) {
664 // Structures with flexible arrays are always indirect.
665 if (const RecordType *RT = Ty->getAs<RecordType>()) {
666 // Structures with either a non-trivial destructor or a non-trivial
667 // copy constructor are always indirect.
668 if (hasNonTrivialDestructorOrCopyConstructor(RT))
669 return getIndirectResult(Ty, /*ByVal=*/false);
671 if (RT->getDecl()->hasFlexibleArrayMember())
672 return getIndirectResult(Ty);
675 // Ignore empty structs.
676 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0)
677 return ABIArgInfo::getIgnore();
679 // Expand small (<= 128-bit) record types when we know that the stack layout
680 // of those arguments will match the struct. This is important because the
681 // LLVM backend isn't smart enough to remove byval, which inhibits many
683 if (getContext().getTypeSize(Ty) <= 4*32 &&
684 canExpandIndirectArgument(Ty, getContext()))
685 return ABIArgInfo::getExpand();
687 return getIndirectResult(Ty);
690 if (const VectorType *VT = Ty->getAs<VectorType>()) {
691 // On Darwin, some vectors are passed in memory, we handle this by passing
692 // it as an i8/i16/i32/i64.
693 if (IsDarwinVectorABI) {
694 uint64_t Size = getContext().getTypeSize(Ty);
695 if ((Size == 8 || Size == 16 || Size == 32) ||
696 (Size == 64 && VT->getNumElements() == 1))
697 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
701 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty);
702 if (UseX86_MMXType(IRType)) {
703 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType);
704 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext()));
708 return ABIArgInfo::getDirect();
712 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
713 Ty = EnumTy->getDecl()->getIntegerType();
715 return (Ty->isPromotableIntegerType() ?
716 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
719 llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
720 CodeGenFunction &CGF) const {
721 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext());
722 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP);
724 CGBuilderTy &Builder = CGF.Builder;
725 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
727 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
729 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
730 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
733 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4);
734 llvm::Value *NextAddr =
735 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
737 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
742 void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D,
743 llvm::GlobalValue *GV,
744 CodeGen::CodeGenModule &CGM) const {
745 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
746 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) {
747 // Get the LLVM function.
748 llvm::Function *Fn = cast<llvm::Function>(GV);
750 // Now add the 'alignstack' attribute with a value of 16.
751 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16));
756 bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable(
757 CodeGen::CodeGenFunction &CGF,
758 llvm::Value *Address) const {
759 CodeGen::CGBuilderTy &Builder = CGF.Builder;
760 llvm::LLVMContext &Context = CGF.getLLVMContext();
762 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
763 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
765 // 0-7 are the eight integer registers; the order is different
766 // on Darwin (for EH), but the range is the same.
768 AssignToArrayRange(Builder, Address, Four8, 0, 8);
770 if (CGF.CGM.isTargetDarwin()) {
771 // 12-16 are st(0..4). Not sure why we stop at 4.
772 // These have size 16, which is sizeof(long double) on
773 // platforms with 8-byte alignment for that type.
774 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
775 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16);
778 // 9 is %eflags, which doesn't get a size on Darwin for some
780 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9));
782 // 11-16 are st(0..5). Not sure why we stop at 5.
783 // These have size 12, which is sizeof(long double) on
784 // platforms with 4-byte alignment for that type.
785 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12);
786 AssignToArrayRange(Builder, Address, Twelve8, 11, 16);
792 //===----------------------------------------------------------------------===//
793 // X86-64 ABI Implementation
794 //===----------------------------------------------------------------------===//
798 /// X86_64ABIInfo - The X86_64 ABI information.
799 class X86_64ABIInfo : public ABIInfo {
811 /// merge - Implement the X86_64 ABI merging algorithm.
813 /// Merge an accumulating classification \arg Accum with a field
814 /// classification \arg Field.
816 /// \param Accum - The accumulating classification. This should
817 /// always be either NoClass or the result of a previous merge
818 /// call. In addition, this should never be Memory (the caller
819 /// should just return Memory for the aggregate).
820 static Class merge(Class Accum, Class Field);
822 /// classify - Determine the x86_64 register classes in which the
823 /// given type T should be passed.
825 /// \param Lo - The classification for the parts of the type
826 /// residing in the low word of the containing object.
828 /// \param Hi - The classification for the parts of the type
829 /// residing in the high word of the containing object.
831 /// \param OffsetBase - The bit offset of this type in the
832 /// containing object. Some parameters are classified different
833 /// depending on whether they straddle an eightbyte boundary.
835 /// If a word is unused its result will be NoClass; if a type should
836 /// be passed in Memory then at least the classification of \arg Lo
839 /// The \arg Lo class will be NoClass iff the argument is ignored.
841 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will
842 /// also be ComplexX87.
843 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const;
845 const llvm::Type *Get16ByteVectorType(QualType Ty) const;
846 const llvm::Type *GetSSETypeAtOffset(const llvm::Type *IRType,
847 unsigned IROffset, QualType SourceTy,
848 unsigned SourceOffset) const;
849 const llvm::Type *GetINTEGERTypeAtOffset(const llvm::Type *IRType,
850 unsigned IROffset, QualType SourceTy,
851 unsigned SourceOffset) const;
853 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
854 /// such that the argument will be returned in memory.
855 ABIArgInfo getIndirectReturnResult(QualType Ty) const;
857 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
858 /// such that the argument will be passed in memory.
859 ABIArgInfo getIndirectResult(QualType Ty) const;
861 ABIArgInfo classifyReturnType(QualType RetTy) const;
863 ABIArgInfo classifyArgumentType(QualType Ty,
865 unsigned &neededSSE) const;
868 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
870 virtual void computeInfo(CGFunctionInfo &FI) const;
872 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
873 CodeGenFunction &CGF) const;
876 /// WinX86_64ABIInfo - The Windows X86_64 ABI information.
877 class WinX86_64ABIInfo : public ABIInfo {
879 ABIArgInfo classify(QualType Ty) const;
882 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
884 virtual void computeInfo(CGFunctionInfo &FI) const;
886 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
887 CodeGenFunction &CGF) const;
890 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
892 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
893 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {}
895 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
899 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
900 llvm::Value *Address) const {
901 CodeGen::CGBuilderTy &Builder = CGF.Builder;
902 llvm::LLVMContext &Context = CGF.getLLVMContext();
904 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
905 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
907 // 0-15 are the 16 integer registers.
909 AssignToArrayRange(Builder, Address, Eight8, 0, 16);
914 const llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
915 llvm::StringRef Constraint,
916 const llvm::Type* Ty) const {
917 return X86AdjustInlineAsmType(CGF, Constraint, Ty);
922 class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo {
924 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
925 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {}
927 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
931 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
932 llvm::Value *Address) const {
933 CodeGen::CGBuilderTy &Builder = CGF.Builder;
934 llvm::LLVMContext &Context = CGF.getLLVMContext();
936 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
937 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
939 // 0-15 are the 16 integer registers.
941 AssignToArrayRange(Builder, Address, Eight8, 0, 16);
949 X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) {
950 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is
951 // classified recursively so that always two fields are
952 // considered. The resulting class is calculated according to
953 // the classes of the fields in the eightbyte:
955 // (a) If both classes are equal, this is the resulting class.
957 // (b) If one of the classes is NO_CLASS, the resulting class is
960 // (c) If one of the classes is MEMORY, the result is the MEMORY
963 // (d) If one of the classes is INTEGER, the result is the
966 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class,
967 // MEMORY is used as class.
969 // (f) Otherwise class SSE is used.
971 // Accum should never be memory (we should have returned) or
972 // ComplexX87 (because this cannot be passed in a structure).
973 assert((Accum != Memory && Accum != ComplexX87) &&
974 "Invalid accumulated classification during merge.");
975 if (Accum == Field || Field == NoClass)
979 if (Accum == NoClass)
981 if (Accum == Integer || Field == Integer)
983 if (Field == X87 || Field == X87Up || Field == ComplexX87 ||
984 Accum == X87 || Accum == X87Up)
989 void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
990 Class &Lo, Class &Hi) const {
991 // FIXME: This code can be simplified by introducing a simple value class for
992 // Class pairs with appropriate constructor methods for the various
995 // FIXME: Some of the split computations are wrong; unaligned vectors
996 // shouldn't be passed in registers for example, so there is no chance they
997 // can straddle an eightbyte. Verify & simplify.
1001 Class &Current = OffsetBase < 64 ? Lo : Hi;
1004 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
1005 BuiltinType::Kind k = BT->getKind();
1007 if (k == BuiltinType::Void) {
1009 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) {
1012 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) {
1014 } else if (k == BuiltinType::Float || k == BuiltinType::Double) {
1016 } else if (k == BuiltinType::LongDouble) {
1020 // FIXME: _Decimal32 and _Decimal64 are SSE.
1021 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp).
1025 if (const EnumType *ET = Ty->getAs<EnumType>()) {
1026 // Classify the underlying integer type.
1027 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi);
1031 if (Ty->hasPointerRepresentation()) {
1036 if (Ty->isMemberPointerType()) {
1037 if (Ty->isMemberFunctionPointerType())
1044 if (const VectorType *VT = Ty->getAs<VectorType>()) {
1045 uint64_t Size = getContext().getTypeSize(VT);
1047 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x
1048 // float> as integer.
1051 // If this type crosses an eightbyte boundary, it should be
1053 uint64_t EB_Real = (OffsetBase) / 64;
1054 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64;
1055 if (EB_Real != EB_Imag)
1057 } else if (Size == 64) {
1058 // gcc passes <1 x double> in memory. :(
1059 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double))
1062 // gcc passes <1 x long long> as INTEGER.
1063 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) ||
1064 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) ||
1065 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) ||
1066 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong))
1071 // If this type crosses an eightbyte boundary, it should be
1073 if (OffsetBase && OffsetBase != 64)
1075 } else if (Size == 128) {
1082 if (const ComplexType *CT = Ty->getAs<ComplexType>()) {
1083 QualType ET = getContext().getCanonicalType(CT->getElementType());
1085 uint64_t Size = getContext().getTypeSize(Ty);
1086 if (ET->isIntegralOrEnumerationType()) {
1089 else if (Size <= 128)
1091 } else if (ET == getContext().FloatTy)
1093 else if (ET == getContext().DoubleTy)
1095 else if (ET == getContext().LongDoubleTy)
1096 Current = ComplexX87;
1098 // If this complex type crosses an eightbyte boundary then it
1100 uint64_t EB_Real = (OffsetBase) / 64;
1101 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64;
1102 if (Hi == NoClass && EB_Real != EB_Imag)
1108 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) {
1109 // Arrays are treated like structures.
1111 uint64_t Size = getContext().getTypeSize(Ty);
1113 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
1114 // than two eightbytes, ..., it has class MEMORY.
1118 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned
1119 // fields, it has class MEMORY.
1121 // Only need to check alignment of array base.
1122 if (OffsetBase % getContext().getTypeAlign(AT->getElementType()))
1125 // Otherwise implement simplified merge. We could be smarter about
1126 // this, but it isn't worth it and would be harder to verify.
1128 uint64_t EltSize = getContext().getTypeSize(AT->getElementType());
1129 uint64_t ArraySize = AT->getSize().getZExtValue();
1130 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) {
1131 Class FieldLo, FieldHi;
1132 classify(AT->getElementType(), Offset, FieldLo, FieldHi);
1133 Lo = merge(Lo, FieldLo);
1134 Hi = merge(Hi, FieldHi);
1135 if (Lo == Memory || Hi == Memory)
1139 // Do post merger cleanup (see below). Only case we worry about is Memory.
1142 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification.");
1146 if (const RecordType *RT = Ty->getAs<RecordType>()) {
1147 uint64_t Size = getContext().getTypeSize(Ty);
1149 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
1150 // than two eightbytes, ..., it has class MEMORY.
1154 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial
1155 // copy constructor or a non-trivial destructor, it is passed by invisible
1157 if (hasNonTrivialDestructorOrCopyConstructor(RT))
1160 const RecordDecl *RD = RT->getDecl();
1162 // Assume variable sized types are passed in memory.
1163 if (RD->hasFlexibleArrayMember())
1166 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
1168 // Reset Lo class, this will be recomputed.
1171 // If this is a C++ record, classify the bases first.
1172 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
1173 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
1174 e = CXXRD->bases_end(); i != e; ++i) {
1175 assert(!i->isVirtual() && !i->getType()->isDependentType() &&
1176 "Unexpected base class!");
1177 const CXXRecordDecl *Base =
1178 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl());
1180 // Classify this field.
1182 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a
1183 // single eightbyte, each is classified separately. Each eightbyte gets
1184 // initialized to class NO_CLASS.
1185 Class FieldLo, FieldHi;
1186 uint64_t Offset = OffsetBase + Layout.getBaseClassOffsetInBits(Base);
1187 classify(i->getType(), Offset, FieldLo, FieldHi);
1188 Lo = merge(Lo, FieldLo);
1189 Hi = merge(Hi, FieldHi);
1190 if (Lo == Memory || Hi == Memory)
1195 // Classify the fields one at a time, merging the results.
1197 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
1198 i != e; ++i, ++idx) {
1199 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
1200 bool BitField = i->isBitField();
1202 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned
1203 // fields, it has class MEMORY.
1205 // Note, skip this test for bit-fields, see below.
1206 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) {
1211 // Classify this field.
1213 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate
1214 // exceeds a single eightbyte, each is classified
1215 // separately. Each eightbyte gets initialized to class
1217 Class FieldLo, FieldHi;
1219 // Bit-fields require special handling, they do not force the
1220 // structure to be passed in memory even if unaligned, and
1221 // therefore they can straddle an eightbyte.
1223 // Ignore padding bit-fields.
1224 if (i->isUnnamedBitfield())
1227 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
1229 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue();
1231 uint64_t EB_Lo = Offset / 64;
1232 uint64_t EB_Hi = (Offset + Size - 1) / 64;
1233 FieldLo = FieldHi = NoClass;
1235 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes.");
1240 FieldHi = EB_Hi ? Integer : NoClass;
1243 classify(i->getType(), Offset, FieldLo, FieldHi);
1244 Lo = merge(Lo, FieldLo);
1245 Hi = merge(Hi, FieldHi);
1246 if (Lo == Memory || Hi == Memory)
1250 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done:
1252 // (a) If one of the classes is MEMORY, the whole argument is
1253 // passed in memory.
1255 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE.
1257 // The first of these conditions is guaranteed by how we implement
1258 // the merge (just bail).
1260 // The second condition occurs in the case of unions; for example
1261 // union { _Complex double; unsigned; }.
1264 if (Hi == SSEUp && Lo != SSE)
1269 ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const {
1270 // If this is a scalar LLVM value then assume LLVM will pass it in the right
1272 if (!isAggregateTypeForABI(Ty)) {
1273 // Treat an enum type as its underlying type.
1274 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1275 Ty = EnumTy->getDecl()->getIntegerType();
1277 return (Ty->isPromotableIntegerType() ?
1278 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1281 return ABIArgInfo::getIndirect(0);
1284 ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const {
1285 // If this is a scalar LLVM value then assume LLVM will pass it in the right
1287 if (!isAggregateTypeForABI(Ty)) {
1288 // Treat an enum type as its underlying type.
1289 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1290 Ty = EnumTy->getDecl()->getIntegerType();
1292 return (Ty->isPromotableIntegerType() ?
1293 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1296 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty))
1297 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
1299 // Compute the byval alignment. We trust the back-end to honor the
1300 // minimum ABI alignment for byval, to make cleaner IR.
1301 const unsigned MinABIAlign = 8;
1302 unsigned Align = getContext().getTypeAlign(Ty) / 8;
1303 if (Align > MinABIAlign)
1304 return ABIArgInfo::getIndirect(Align);
1305 return ABIArgInfo::getIndirect(0);
1308 /// Get16ByteVectorType - The ABI specifies that a value should be passed in an
1309 /// full vector XMM register. Pick an LLVM IR type that will be passed as a
1310 /// vector register.
1311 const llvm::Type *X86_64ABIInfo::Get16ByteVectorType(QualType Ty) const {
1312 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty);
1314 // Wrapper structs that just contain vectors are passed just like vectors,
1315 // strip them off if present.
1316 const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType);
1317 while (STy && STy->getNumElements() == 1) {
1318 IRType = STy->getElementType(0);
1319 STy = dyn_cast<llvm::StructType>(IRType);
1322 // If the preferred type is a 16-byte vector, prefer to pass it.
1323 if (const llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){
1324 const llvm::Type *EltTy = VT->getElementType();
1325 if (VT->getBitWidth() == 128 &&
1326 (EltTy->isFloatTy() || EltTy->isDoubleTy() ||
1327 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) ||
1328 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) ||
1329 EltTy->isIntegerTy(128)))
1333 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2);
1336 /// BitsContainNoUserData - Return true if the specified [start,end) bit range
1337 /// is known to either be off the end of the specified type or being in
1338 /// alignment padding. The user type specified is known to be at most 128 bits
1339 /// in size, and have passed through X86_64ABIInfo::classify with a successful
1340 /// classification that put one of the two halves in the INTEGER class.
1342 /// It is conservatively correct to return false.
1343 static bool BitsContainNoUserData(QualType Ty, unsigned StartBit,
1344 unsigned EndBit, ASTContext &Context) {
1345 // If the bytes being queried are off the end of the type, there is no user
1346 // data hiding here. This handles analysis of builtins, vectors and other
1347 // types that don't contain interesting padding.
1348 unsigned TySize = (unsigned)Context.getTypeSize(Ty);
1349 if (TySize <= StartBit)
1352 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) {
1353 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType());
1354 unsigned NumElts = (unsigned)AT->getSize().getZExtValue();
1356 // Check each element to see if the element overlaps with the queried range.
1357 for (unsigned i = 0; i != NumElts; ++i) {
1358 // If the element is after the span we care about, then we're done..
1359 unsigned EltOffset = i*EltSize;
1360 if (EltOffset >= EndBit) break;
1362 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0;
1363 if (!BitsContainNoUserData(AT->getElementType(), EltStart,
1364 EndBit-EltOffset, Context))
1367 // If it overlaps no elements, then it is safe to process as padding.
1371 if (const RecordType *RT = Ty->getAs<RecordType>()) {
1372 const RecordDecl *RD = RT->getDecl();
1373 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
1375 // If this is a C++ record, check the bases first.
1376 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
1377 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
1378 e = CXXRD->bases_end(); i != e; ++i) {
1379 assert(!i->isVirtual() && !i->getType()->isDependentType() &&
1380 "Unexpected base class!");
1381 const CXXRecordDecl *Base =
1382 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl());
1384 // If the base is after the span we care about, ignore it.
1385 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffsetInBits(Base);
1386 if (BaseOffset >= EndBit) continue;
1388 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0;
1389 if (!BitsContainNoUserData(i->getType(), BaseStart,
1390 EndBit-BaseOffset, Context))
1395 // Verify that no field has data that overlaps the region of interest. Yes
1396 // this could be sped up a lot by being smarter about queried fields,
1397 // however we're only looking at structs up to 16 bytes, so we don't care
1400 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
1401 i != e; ++i, ++idx) {
1402 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx);
1404 // If we found a field after the region we care about, then we're done.
1405 if (FieldOffset >= EndBit) break;
1407 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0;
1408 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset,
1413 // If nothing in this record overlapped the area of interest, then we're
1421 /// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a
1422 /// float member at the specified offset. For example, {int,{float}} has a
1423 /// float at offset 4. It is conservatively correct for this routine to return
1425 static bool ContainsFloatAtOffset(const llvm::Type *IRType, unsigned IROffset,
1426 const llvm::TargetData &TD) {
1427 // Base case if we find a float.
1428 if (IROffset == 0 && IRType->isFloatTy())
1431 // If this is a struct, recurse into the field at the specified offset.
1432 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
1433 const llvm::StructLayout *SL = TD.getStructLayout(STy);
1434 unsigned Elt = SL->getElementContainingOffset(IROffset);
1435 IROffset -= SL->getElementOffset(Elt);
1436 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD);
1439 // If this is an array, recurse into the field at the specified offset.
1440 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
1441 const llvm::Type *EltTy = ATy->getElementType();
1442 unsigned EltSize = TD.getTypeAllocSize(EltTy);
1443 IROffset -= IROffset/EltSize*EltSize;
1444 return ContainsFloatAtOffset(EltTy, IROffset, TD);
1451 /// GetSSETypeAtOffset - Return a type that will be passed by the backend in the
1452 /// low 8 bytes of an XMM register, corresponding to the SSE class.
1453 const llvm::Type *X86_64ABIInfo::
1454 GetSSETypeAtOffset(const llvm::Type *IRType, unsigned IROffset,
1455 QualType SourceTy, unsigned SourceOffset) const {
1456 // The only three choices we have are either double, <2 x float>, or float. We
1457 // pass as float if the last 4 bytes is just padding. This happens for
1458 // structs that contain 3 floats.
1459 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32,
1460 SourceOffset*8+64, getContext()))
1461 return llvm::Type::getFloatTy(getVMContext());
1463 // We want to pass as <2 x float> if the LLVM IR type contains a float at
1464 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the
1466 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) &&
1467 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData()))
1468 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2);
1470 return llvm::Type::getDoubleTy(getVMContext());
1474 /// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in
1475 /// an 8-byte GPR. This means that we either have a scalar or we are talking
1476 /// about the high or low part of an up-to-16-byte struct. This routine picks
1477 /// the best LLVM IR type to represent this, which may be i64 or may be anything
1478 /// else that the backend will pass in a GPR that works better (e.g. i8, %foo*,
1481 /// PrefType is an LLVM IR type that corresponds to (part of) the IR type for
1482 /// the source type. IROffset is an offset in bytes into the LLVM IR type that
1483 /// the 8-byte value references. PrefType may be null.
1485 /// SourceTy is the source level type for the entire argument. SourceOffset is
1486 /// an offset into this that we're processing (which is always either 0 or 8).
1488 const llvm::Type *X86_64ABIInfo::
1489 GetINTEGERTypeAtOffset(const llvm::Type *IRType, unsigned IROffset,
1490 QualType SourceTy, unsigned SourceOffset) const {
1491 // If we're dealing with an un-offset LLVM IR type, then it means that we're
1492 // returning an 8-byte unit starting with it. See if we can safely use it.
1493 if (IROffset == 0) {
1494 // Pointers and int64's always fill the 8-byte unit.
1495 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64))
1498 // If we have a 1/2/4-byte integer, we can use it only if the rest of the
1499 // goodness in the source type is just tail padding. This is allowed to
1500 // kick in for struct {double,int} on the int, but not on
1501 // struct{double,int,int} because we wouldn't return the second int. We
1502 // have to do this analysis on the source type because we can't depend on
1503 // unions being lowered a specific way etc.
1504 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) ||
1505 IRType->isIntegerTy(32)) {
1506 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth();
1508 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth,
1509 SourceOffset*8+64, getContext()))
1514 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
1515 // If this is a struct, recurse into the field at the specified offset.
1516 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy);
1517 if (IROffset < SL->getSizeInBytes()) {
1518 unsigned FieldIdx = SL->getElementContainingOffset(IROffset);
1519 IROffset -= SL->getElementOffset(FieldIdx);
1521 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset,
1522 SourceTy, SourceOffset);
1526 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
1527 const llvm::Type *EltTy = ATy->getElementType();
1528 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy);
1529 unsigned EltOffset = IROffset/EltSize*EltSize;
1530 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy,
1534 // Okay, we don't have any better idea of what to pass, so we pass this in an
1535 // integer register that isn't too big to fit the rest of the struct.
1536 unsigned TySizeInBytes =
1537 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity();
1539 assert(TySizeInBytes != SourceOffset && "Empty field?");
1541 // It is always safe to classify this as an integer type up to i64 that
1542 // isn't larger than the structure.
1543 return llvm::IntegerType::get(getVMContext(),
1544 std::min(TySizeInBytes-SourceOffset, 8U)*8);
1548 /// GetX86_64ByValArgumentPair - Given a high and low type that can ideally
1549 /// be used as elements of a two register pair to pass or return, return a
1550 /// first class aggregate to represent them. For example, if the low part of
1551 /// a by-value argument should be passed as i32* and the high part as float,
1552 /// return {i32*, float}.
1553 static const llvm::Type *
1554 GetX86_64ByValArgumentPair(const llvm::Type *Lo, const llvm::Type *Hi,
1555 const llvm::TargetData &TD) {
1556 // In order to correctly satisfy the ABI, we need to the high part to start
1557 // at offset 8. If the high and low parts we inferred are both 4-byte types
1558 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have
1559 // the second element at offset 8. Check for this:
1560 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo);
1561 unsigned HiAlign = TD.getABITypeAlignment(Hi);
1562 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign);
1563 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!");
1565 // To handle this, we have to increase the size of the low part so that the
1566 // second element will start at an 8 byte offset. We can't increase the size
1567 // of the second element because it might make us access off the end of the
1570 // There are only two sorts of types the ABI generation code can produce for
1571 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32.
1572 // Promote these to a larger type.
1573 if (Lo->isFloatTy())
1574 Lo = llvm::Type::getDoubleTy(Lo->getContext());
1576 assert(Lo->isIntegerTy() && "Invalid/unknown lo type");
1577 Lo = llvm::Type::getInt64Ty(Lo->getContext());
1581 const llvm::StructType *Result =
1582 llvm::StructType::get(Lo->getContext(), Lo, Hi, NULL);
1585 // Verify that the second element is at an 8-byte offset.
1586 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 &&
1587 "Invalid x86-64 argument pair!");
1591 ABIArgInfo X86_64ABIInfo::
1592 classifyReturnType(QualType RetTy) const {
1593 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the
1594 // classification algorithm.
1595 X86_64ABIInfo::Class Lo, Hi;
1596 classify(RetTy, 0, Lo, Hi);
1598 // Check some invariants.
1599 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
1600 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
1602 const llvm::Type *ResType = 0;
1606 return ABIArgInfo::getIgnore();
1607 // If the low part is just padding, it takes no register, leave ResType
1609 assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
1610 "Unknown missing lo part");
1615 assert(0 && "Invalid classification for lo word.");
1617 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via
1620 return getIndirectReturnResult(RetTy);
1622 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next
1623 // available register of the sequence %rax, %rdx is used.
1625 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0,
1628 // If we have a sign or zero extended integer, make sure to return Extend
1629 // so that the parameter gets the right LLVM IR attributes.
1630 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
1631 // Treat an enum type as its underlying type.
1632 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
1633 RetTy = EnumTy->getDecl()->getIntegerType();
1635 if (RetTy->isIntegralOrEnumerationType() &&
1636 RetTy->isPromotableIntegerType())
1637 return ABIArgInfo::getExtend();
1641 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next
1642 // available SSE register of the sequence %xmm0, %xmm1 is used.
1644 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, RetTy, 0);
1647 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is
1648 // returned on the X87 stack in %st0 as 80-bit x87 number.
1650 ResType = llvm::Type::getX86_FP80Ty(getVMContext());
1653 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real
1654 // part of the value is returned in %st0 and the imaginary part in
1657 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification.");
1658 ResType = llvm::StructType::get(getVMContext(),
1659 llvm::Type::getX86_FP80Ty(getVMContext()),
1660 llvm::Type::getX86_FP80Ty(getVMContext()),
1665 const llvm::Type *HighPart = 0;
1667 // Memory was handled previously and X87 should
1668 // never occur as a hi class.
1671 assert(0 && "Invalid classification for hi word.");
1673 case ComplexX87: // Previously handled.
1678 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy),
1680 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
1681 return ABIArgInfo::getDirect(HighPart, 8);
1684 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8);
1685 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
1686 return ABIArgInfo::getDirect(HighPart, 8);
1689 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte
1690 // is passed in the upper half of the last used SSE register.
1692 // SSEUP should always be preceeded by SSE, just widen.
1694 assert(Lo == SSE && "Unexpected SSEUp classification.");
1695 ResType = Get16ByteVectorType(RetTy);
1698 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is
1699 // returned together with the previous X87 value in %st0.
1701 // If X87Up is preceeded by X87, we don't need to do
1702 // anything. However, in some cases with unions it may not be
1703 // preceeded by X87. In such situations we follow gcc and pass the
1704 // extra bits in an SSE reg.
1706 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy),
1708 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
1709 return ABIArgInfo::getDirect(HighPart, 8);
1714 // If a high part was specified, merge it together with the low part. It is
1715 // known to pass in the high eightbyte of the result. We do this by forming a
1716 // first class struct aggregate with the high and low part: {low, high}
1718 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData());
1720 return ABIArgInfo::getDirect(ResType);
1723 ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt,
1724 unsigned &neededSSE) const {
1725 X86_64ABIInfo::Class Lo, Hi;
1726 classify(Ty, 0, Lo, Hi);
1728 // Check some invariants.
1729 // FIXME: Enforce these by construction.
1730 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
1731 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
1735 const llvm::Type *ResType = 0;
1739 return ABIArgInfo::getIgnore();
1740 // If the low part is just padding, it takes no register, leave ResType
1742 assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
1743 "Unknown missing lo part");
1746 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument
1750 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or
1751 // COMPLEX_X87, it is passed in memory.
1754 return getIndirectResult(Ty);
1758 assert(0 && "Invalid classification for lo word.");
1760 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next
1761 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8
1766 // Pick an 8-byte type based on the preferred type.
1767 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0);
1769 // If we have a sign or zero extended integer, make sure to return Extend
1770 // so that the parameter gets the right LLVM IR attributes.
1771 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
1772 // Treat an enum type as its underlying type.
1773 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1774 Ty = EnumTy->getDecl()->getIntegerType();
1776 if (Ty->isIntegralOrEnumerationType() &&
1777 Ty->isPromotableIntegerType())
1778 return ABIArgInfo::getExtend();
1783 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next
1784 // available SSE register is used, the registers are taken in the
1785 // order from %xmm0 to %xmm7.
1787 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty);
1788 if (Hi != NoClass || !UseX86_MMXType(IRType))
1789 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0);
1791 // This is an MMX type. Treat it as such.
1792 ResType = llvm::Type::getX86_MMXTy(getVMContext());
1799 const llvm::Type *HighPart = 0;
1801 // Memory was handled previously, ComplexX87 and X87 should
1802 // never occur as hi classes, and X87Up must be preceed by X87,
1803 // which is passed in memory.
1807 assert(0 && "Invalid classification for hi word.");
1810 case NoClass: break;
1814 // Pick an 8-byte type based on the preferred type.
1815 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8);
1817 if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
1818 return ABIArgInfo::getDirect(HighPart, 8);
1821 // X87Up generally doesn't occur here (long double is passed in
1822 // memory), except in situations involving unions.
1825 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8);
1827 if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
1828 return ABIArgInfo::getDirect(HighPart, 8);
1833 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the
1834 // eightbyte is passed in the upper half of the last used SSE
1835 // register. This only happens when 128-bit vectors are passed.
1837 assert(Lo == SSE && "Unexpected SSEUp classification");
1838 ResType = Get16ByteVectorType(Ty);
1842 // If a high part was specified, merge it together with the low part. It is
1843 // known to pass in the high eightbyte of the result. We do this by forming a
1844 // first class struct aggregate with the high and low part: {low, high}
1846 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData());
1848 return ABIArgInfo::getDirect(ResType);
1851 void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
1853 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
1855 // Keep track of the number of assigned registers.
1856 unsigned freeIntRegs = 6, freeSSERegs = 8;
1858 // If the return value is indirect, then the hidden argument is consuming one
1859 // integer register.
1860 if (FI.getReturnInfo().isIndirect())
1863 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers
1864 // get assigned (in left-to-right order) for passing as follows...
1865 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
1867 unsigned neededInt, neededSSE;
1868 it->info = classifyArgumentType(it->type, neededInt, neededSSE);
1870 // AMD64-ABI 3.2.3p3: If there are no registers available for any
1871 // eightbyte of an argument, the whole argument is passed on the
1872 // stack. If registers have already been assigned for some
1873 // eightbytes of such an argument, the assignments get reverted.
1874 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) {
1875 freeIntRegs -= neededInt;
1876 freeSSERegs -= neededSSE;
1878 it->info = getIndirectResult(it->type);
1883 static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr,
1885 CodeGenFunction &CGF) {
1886 llvm::Value *overflow_arg_area_p =
1887 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p");
1888 llvm::Value *overflow_arg_area =
1889 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area");
1891 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16
1892 // byte boundary if alignment needed by type exceeds 8 byte boundary.
1893 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8;
1895 // Note that we follow the ABI & gcc here, even though the type
1896 // could in theory have an alignment greater than 16. This case
1897 // shouldn't ever matter in practice.
1899 // overflow_arg_area = (overflow_arg_area + 15) & ~15;
1900 llvm::Value *Offset =
1901 llvm::ConstantInt::get(CGF.Int32Ty, 15);
1902 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset);
1903 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area,
1905 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL);
1907 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask),
1908 overflow_arg_area->getType(),
1909 "overflow_arg_area.align");
1912 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area.
1913 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
1915 CGF.Builder.CreateBitCast(overflow_arg_area,
1916 llvm::PointerType::getUnqual(LTy));
1918 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to:
1919 // l->overflow_arg_area + sizeof(type).
1920 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to
1921 // an 8 byte boundary.
1923 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8;
1924 llvm::Value *Offset =
1925 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7);
1926 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset,
1927 "overflow_arg_area.next");
1928 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p);
1930 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type.
1934 llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1935 CodeGenFunction &CGF) const {
1936 llvm::LLVMContext &VMContext = CGF.getLLVMContext();
1938 // Assume that va_list type is correct; should be pointer to LLVM type:
1942 // i8* overflow_arg_area;
1943 // i8* reg_save_area;
1945 unsigned neededInt, neededSSE;
1947 Ty = CGF.getContext().getCanonicalType(Ty);
1948 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE);
1950 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed
1951 // in the registers. If not go to step 7.
1952 if (!neededInt && !neededSSE)
1953 return EmitVAArgFromMemory(VAListAddr, Ty, CGF);
1955 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of
1956 // general purpose registers needed to pass type and num_fp to hold
1957 // the number of floating point registers needed.
1959 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into
1960 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or
1961 // l->fp_offset > 304 - num_fp * 16 go to step 7.
1963 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of
1964 // register save space).
1966 llvm::Value *InRegs = 0;
1967 llvm::Value *gp_offset_p = 0, *gp_offset = 0;
1968 llvm::Value *fp_offset_p = 0, *fp_offset = 0;
1970 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p");
1971 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset");
1972 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8);
1973 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp");
1977 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p");
1978 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset");
1979 llvm::Value *FitsInFP =
1980 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16);
1981 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp");
1982 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP;
1985 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
1986 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem");
1987 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
1988 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock);
1990 // Emit code to load the value if it was passed in registers.
1992 CGF.EmitBlock(InRegBlock);
1994 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with
1995 // an offset of l->gp_offset and/or l->fp_offset. This may require
1996 // copying to a temporary location in case the parameter is passed
1997 // in different register classes or requires an alignment greater
1998 // than 8 for general purpose registers and 16 for XMM registers.
2000 // FIXME: This really results in shameful code when we end up needing to
2001 // collect arguments from different places; often what should result in a
2002 // simple assembling of a structure from scattered addresses has many more
2003 // loads than necessary. Can we clean this up?
2004 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
2005 llvm::Value *RegAddr =
2006 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3),
2008 if (neededInt && neededSSE) {
2010 assert(AI.isDirect() && "Unexpected ABI info for mixed regs");
2011 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType());
2012 llvm::Value *Tmp = CGF.CreateTempAlloca(ST);
2013 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs");
2014 const llvm::Type *TyLo = ST->getElementType(0);
2015 const llvm::Type *TyHi = ST->getElementType(1);
2016 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) &&
2017 "Unexpected ABI info for mixed regs");
2018 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo);
2019 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi);
2020 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
2021 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2022 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr;
2023 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr;
2025 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo));
2026 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
2027 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi));
2028 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
2030 RegAddr = CGF.Builder.CreateBitCast(Tmp,
2031 llvm::PointerType::getUnqual(LTy));
2032 } else if (neededInt) {
2033 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
2034 RegAddr = CGF.Builder.CreateBitCast(RegAddr,
2035 llvm::PointerType::getUnqual(LTy));
2036 } else if (neededSSE == 1) {
2037 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2038 RegAddr = CGF.Builder.CreateBitCast(RegAddr,
2039 llvm::PointerType::getUnqual(LTy));
2041 assert(neededSSE == 2 && "Invalid number of needed registers!");
2042 // SSE registers are spaced 16 bytes apart in the register save
2043 // area, we need to collect the two eightbytes together.
2044 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2045 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16);
2046 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext);
2047 const llvm::Type *DblPtrTy =
2048 llvm::PointerType::getUnqual(DoubleTy);
2049 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy,
2051 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST);
2052 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo,
2054 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
2055 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi,
2057 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
2058 RegAddr = CGF.Builder.CreateBitCast(Tmp,
2059 llvm::PointerType::getUnqual(LTy));
2062 // AMD64-ABI 3.5.7p5: Step 5. Set:
2063 // l->gp_offset = l->gp_offset + num_gp * 8
2064 // l->fp_offset = l->fp_offset + num_fp * 16.
2066 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8);
2067 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset),
2071 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16);
2072 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset),
2075 CGF.EmitBranch(ContBlock);
2077 // Emit code to load the value if it was passed in memory.
2079 CGF.EmitBlock(InMemBlock);
2080 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF);
2082 // Return the appropriate result.
2084 CGF.EmitBlock(ContBlock);
2085 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(),
2087 ResAddr->reserveOperandSpace(2);
2088 ResAddr->addIncoming(RegAddr, InRegBlock);
2089 ResAddr->addIncoming(MemAddr, InMemBlock);
2093 ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const {
2095 if (Ty->isVoidType())
2096 return ABIArgInfo::getIgnore();
2098 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2099 Ty = EnumTy->getDecl()->getIntegerType();
2101 uint64_t Size = getContext().getTypeSize(Ty);
2103 if (const RecordType *RT = Ty->getAs<RecordType>()) {
2104 if (hasNonTrivialDestructorOrCopyConstructor(RT) ||
2105 RT->getDecl()->hasFlexibleArrayMember())
2106 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2108 // FIXME: mingw-w64-gcc emits 128-bit struct as i128
2110 getContext().Target.getTriple().getOS() == llvm::Triple::MinGW32)
2111 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2114 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is
2115 // not 1, 2, 4, or 8 bytes, must be passed by reference."
2117 (Size & (Size - 1)) == 0)
2118 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2121 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2124 if (Ty->isPromotableIntegerType())
2125 return ABIArgInfo::getExtend();
2127 return ABIArgInfo::getDirect();
2130 void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
2132 QualType RetTy = FI.getReturnType();
2133 FI.getReturnInfo() = classify(RetTy);
2135 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2137 it->info = classify(it->type);
2140 llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2141 CodeGenFunction &CGF) const {
2142 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext());
2143 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP);
2145 CGBuilderTy &Builder = CGF.Builder;
2146 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
2148 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
2150 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
2151 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
2154 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8);
2155 llvm::Value *NextAddr =
2156 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
2158 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
2166 class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
2168 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {}
2170 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
2171 // This is recovered from gcc output.
2172 return 1; // r1 is the dedicated stack pointer
2175 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2176 llvm::Value *Address) const;
2182 PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2183 llvm::Value *Address) const {
2184 // This is calculated from the LLVM and GCC tables and verified
2185 // against gcc output. AFAIK all ABIs use the same encoding.
2187 CodeGen::CGBuilderTy &Builder = CGF.Builder;
2188 llvm::LLVMContext &Context = CGF.getLLVMContext();
2190 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
2191 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
2192 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
2193 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
2195 // 0-31: r0-31, the 4-byte general-purpose registers
2196 AssignToArrayRange(Builder, Address, Four8, 0, 31);
2198 // 32-63: fp0-31, the 8-byte floating-point registers
2199 AssignToArrayRange(Builder, Address, Eight8, 32, 63);
2201 // 64-76 are various 4-byte special-purpose registers:
2208 AssignToArrayRange(Builder, Address, Four8, 64, 76);
2210 // 77-108: v0-31, the 16-byte vector registers
2211 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
2218 AssignToArrayRange(Builder, Address, Four8, 109, 113);
2224 //===----------------------------------------------------------------------===//
2225 // ARM ABI Implementation
2226 //===----------------------------------------------------------------------===//
2230 class ARMABIInfo : public ABIInfo {
2242 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {}
2245 ABIKind getABIKind() const { return Kind; }
2247 ABIArgInfo classifyReturnType(QualType RetTy) const;
2248 ABIArgInfo classifyArgumentType(QualType RetTy) const;
2250 virtual void computeInfo(CGFunctionInfo &FI) const;
2252 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2253 CodeGenFunction &CGF) const;
2256 class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
2258 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K)
2259 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {}
2261 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
2268 void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const {
2269 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2270 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2272 it->info = classifyArgumentType(it->type);
2274 const llvm::Triple &Triple(getContext().Target.getTriple());
2275 llvm::CallingConv::ID DefaultCC;
2276 if (Triple.getEnvironmentName() == "gnueabi" ||
2277 Triple.getEnvironmentName() == "eabi")
2278 DefaultCC = llvm::CallingConv::ARM_AAPCS;
2280 DefaultCC = llvm::CallingConv::ARM_APCS;
2282 switch (getABIKind()) {
2284 if (DefaultCC != llvm::CallingConv::ARM_APCS)
2285 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS);
2289 if (DefaultCC != llvm::CallingConv::ARM_AAPCS)
2290 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS);
2294 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP);
2299 ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const {
2300 if (!isAggregateTypeForABI(Ty)) {
2301 // Treat an enum type as its underlying type.
2302 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2303 Ty = EnumTy->getDecl()->getIntegerType();
2305 return (Ty->isPromotableIntegerType() ?
2306 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2309 // Ignore empty records.
2310 if (isEmptyRecord(getContext(), Ty, true))
2311 return ABIArgInfo::getIgnore();
2313 // Structures with either a non-trivial destructor or a non-trivial
2314 // copy constructor are always indirect.
2315 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty))
2316 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2318 // Otherwise, pass by coercing to a structure of the appropriate size.
2320 // FIXME: This is kind of nasty... but there isn't much choice because the ARM
2321 // backend doesn't support byval.
2322 // FIXME: This doesn't handle alignment > 64 bits.
2323 const llvm::Type* ElemTy;
2325 if (getContext().getTypeAlign(Ty) > 32) {
2326 ElemTy = llvm::Type::getInt64Ty(getVMContext());
2327 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64;
2329 ElemTy = llvm::Type::getInt32Ty(getVMContext());
2330 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32;
2332 std::vector<const llvm::Type*> LLVMFields;
2333 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs));
2334 const llvm::Type* STy = llvm::StructType::get(getVMContext(), LLVMFields,
2336 return ABIArgInfo::getDirect(STy);
2339 static bool isIntegerLikeType(QualType Ty, ASTContext &Context,
2340 llvm::LLVMContext &VMContext) {
2341 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure
2342 // is called integer-like if its size is less than or equal to one word, and
2343 // the offset of each of its addressable sub-fields is zero.
2345 uint64_t Size = Context.getTypeSize(Ty);
2347 // Check that the type fits in a word.
2351 // FIXME: Handle vector types!
2352 if (Ty->isVectorType())
2355 // Float types are never treated as "integer like".
2356 if (Ty->isRealFloatingType())
2359 // If this is a builtin or pointer type then it is ok.
2360 if (Ty->getAs<BuiltinType>() || Ty->isPointerType())
2363 // Small complex integer types are "integer like".
2364 if (const ComplexType *CT = Ty->getAs<ComplexType>())
2365 return isIntegerLikeType(CT->getElementType(), Context, VMContext);
2367 // Single element and zero sized arrays should be allowed, by the definition
2368 // above, but they are not.
2370 // Otherwise, it must be a record type.
2371 const RecordType *RT = Ty->getAs<RecordType>();
2372 if (!RT) return false;
2374 // Ignore records with flexible arrays.
2375 const RecordDecl *RD = RT->getDecl();
2376 if (RD->hasFlexibleArrayMember())
2379 // Check that all sub-fields are at offset 0, and are themselves "integer
2381 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
2383 bool HadField = false;
2385 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
2386 i != e; ++i, ++idx) {
2387 const FieldDecl *FD = *i;
2389 // Bit-fields are not addressable, we only need to verify they are "integer
2390 // like". We still have to disallow a subsequent non-bitfield, for example:
2391 // struct { int : 0; int x }
2392 // is non-integer like according to gcc.
2393 if (FD->isBitField()) {
2397 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
2403 // Check if this field is at offset 0.
2404 if (Layout.getFieldOffset(idx) != 0)
2407 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
2410 // Only allow at most one field in a structure. This doesn't match the
2411 // wording above, but follows gcc in situations with a field following an
2413 if (!RD->isUnion()) {
2424 ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const {
2425 if (RetTy->isVoidType())
2426 return ABIArgInfo::getIgnore();
2428 // Large vector types should be returned via memory.
2429 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128)
2430 return ABIArgInfo::getIndirect(0);
2432 if (!isAggregateTypeForABI(RetTy)) {
2433 // Treat an enum type as its underlying type.
2434 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
2435 RetTy = EnumTy->getDecl()->getIntegerType();
2437 return (RetTy->isPromotableIntegerType() ?
2438 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2441 // Structures with either a non-trivial destructor or a non-trivial
2442 // copy constructor are always indirect.
2443 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy))
2444 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
2446 // Are we following APCS?
2447 if (getABIKind() == APCS) {
2448 if (isEmptyRecord(getContext(), RetTy, false))
2449 return ABIArgInfo::getIgnore();
2451 // Complex types are all returned as packed integers.
2453 // FIXME: Consider using 2 x vector types if the back end handles them
2455 if (RetTy->isAnyComplexType())
2456 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2457 getContext().getTypeSize(RetTy)));
2459 // Integer like structures are returned in r0.
2460 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) {
2461 // Return in the smallest viable integer type.
2462 uint64_t Size = getContext().getTypeSize(RetTy);
2464 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
2466 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
2467 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
2470 // Otherwise return in memory.
2471 return ABIArgInfo::getIndirect(0);
2474 // Otherwise this is an AAPCS variant.
2476 if (isEmptyRecord(getContext(), RetTy, true))
2477 return ABIArgInfo::getIgnore();
2479 // Aggregates <= 4 bytes are returned in r0; other aggregates
2480 // are returned indirectly.
2481 uint64_t Size = getContext().getTypeSize(RetTy);
2483 // Return in the smallest viable integer type.
2485 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
2487 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
2488 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
2491 return ABIArgInfo::getIndirect(0);
2494 llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2495 CodeGenFunction &CGF) const {
2496 // FIXME: Need to handle alignment
2497 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext());
2498 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP);
2500 CGBuilderTy &Builder = CGF.Builder;
2501 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
2503 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
2505 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
2506 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
2509 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4);
2510 llvm::Value *NextAddr =
2511 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
2513 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
2518 //===----------------------------------------------------------------------===//
2519 // SystemZ ABI Implementation
2520 //===----------------------------------------------------------------------===//
2524 class SystemZABIInfo : public ABIInfo {
2526 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
2528 bool isPromotableIntegerType(QualType Ty) const;
2530 ABIArgInfo classifyReturnType(QualType RetTy) const;
2531 ABIArgInfo classifyArgumentType(QualType RetTy) const;
2533 virtual void computeInfo(CGFunctionInfo &FI) const {
2534 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2535 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2537 it->info = classifyArgumentType(it->type);
2540 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2541 CodeGenFunction &CGF) const;
2544 class SystemZTargetCodeGenInfo : public TargetCodeGenInfo {
2546 SystemZTargetCodeGenInfo(CodeGenTypes &CGT)
2547 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {}
2552 bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const {
2553 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended.
2554 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
2555 switch (BT->getKind()) {
2556 case BuiltinType::Bool:
2557 case BuiltinType::Char_S:
2558 case BuiltinType::Char_U:
2559 case BuiltinType::SChar:
2560 case BuiltinType::UChar:
2561 case BuiltinType::Short:
2562 case BuiltinType::UShort:
2563 case BuiltinType::Int:
2564 case BuiltinType::UInt:
2572 llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2573 CodeGenFunction &CGF) const {
2579 ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const {
2580 if (RetTy->isVoidType())
2581 return ABIArgInfo::getIgnore();
2582 if (isAggregateTypeForABI(RetTy))
2583 return ABIArgInfo::getIndirect(0);
2585 return (isPromotableIntegerType(RetTy) ?
2586 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2589 ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const {
2590 if (isAggregateTypeForABI(Ty))
2591 return ABIArgInfo::getIndirect(0);
2593 return (isPromotableIntegerType(Ty) ?
2594 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2597 //===----------------------------------------------------------------------===//
2598 // MBlaze ABI Implementation
2599 //===----------------------------------------------------------------------===//
2603 class MBlazeABIInfo : public ABIInfo {
2605 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
2607 bool isPromotableIntegerType(QualType Ty) const;
2609 ABIArgInfo classifyReturnType(QualType RetTy) const;
2610 ABIArgInfo classifyArgumentType(QualType RetTy) const;
2612 virtual void computeInfo(CGFunctionInfo &FI) const {
2613 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2614 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2616 it->info = classifyArgumentType(it->type);
2619 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2620 CodeGenFunction &CGF) const;
2623 class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo {
2625 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT)
2626 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {}
2627 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
2628 CodeGen::CodeGenModule &M) const;
2633 bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const {
2634 // MBlaze ABI requires all 8 and 16 bit quantities to be extended.
2635 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
2636 switch (BT->getKind()) {
2637 case BuiltinType::Bool:
2638 case BuiltinType::Char_S:
2639 case BuiltinType::Char_U:
2640 case BuiltinType::SChar:
2641 case BuiltinType::UChar:
2642 case BuiltinType::Short:
2643 case BuiltinType::UShort:
2651 llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2652 CodeGenFunction &CGF) const {
2658 ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const {
2659 if (RetTy->isVoidType())
2660 return ABIArgInfo::getIgnore();
2661 if (isAggregateTypeForABI(RetTy))
2662 return ABIArgInfo::getIndirect(0);
2664 return (isPromotableIntegerType(RetTy) ?
2665 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2668 ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const {
2669 if (isAggregateTypeForABI(Ty))
2670 return ABIArgInfo::getIndirect(0);
2672 return (isPromotableIntegerType(Ty) ?
2673 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2676 void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D,
2677 llvm::GlobalValue *GV,
2678 CodeGen::CodeGenModule &M)
2680 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
2683 llvm::CallingConv::ID CC = llvm::CallingConv::C;
2684 if (FD->hasAttr<MBlazeInterruptHandlerAttr>())
2685 CC = llvm::CallingConv::MBLAZE_INTR;
2686 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>())
2687 CC = llvm::CallingConv::MBLAZE_SVOL;
2689 if (CC != llvm::CallingConv::C) {
2690 // Handle 'interrupt_handler' attribute:
2691 llvm::Function *F = cast<llvm::Function>(GV);
2693 // Step 1: Set ISR calling convention.
2694 F->setCallingConv(CC);
2696 // Step 2: Add attributes goodness.
2697 F->addFnAttr(llvm::Attribute::NoInline);
2700 // Step 3: Emit _interrupt_handler alias.
2701 if (CC == llvm::CallingConv::MBLAZE_INTR)
2702 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage,
2703 "_interrupt_handler", GV, &M.getModule());
2707 //===----------------------------------------------------------------------===//
2708 // MSP430 ABI Implementation
2709 //===----------------------------------------------------------------------===//
2713 class MSP430TargetCodeGenInfo : public TargetCodeGenInfo {
2715 MSP430TargetCodeGenInfo(CodeGenTypes &CGT)
2716 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
2717 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
2718 CodeGen::CodeGenModule &M) const;
2723 void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D,
2724 llvm::GlobalValue *GV,
2725 CodeGen::CodeGenModule &M) const {
2726 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
2727 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) {
2728 // Handle 'interrupt' attribute:
2729 llvm::Function *F = cast<llvm::Function>(GV);
2731 // Step 1: Set ISR calling convention.
2732 F->setCallingConv(llvm::CallingConv::MSP430_INTR);
2734 // Step 2: Add attributes goodness.
2735 F->addFnAttr(llvm::Attribute::NoInline);
2737 // Step 3: Emit ISR vector alias.
2738 unsigned Num = attr->getNumber() + 0xffe0;
2739 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage,
2740 "vector_" + llvm::Twine::utohexstr(Num),
2741 GV, &M.getModule());
2746 //===----------------------------------------------------------------------===//
2747 // MIPS ABI Implementation. This works for both little-endian and
2748 // big-endian variants.
2749 //===----------------------------------------------------------------------===//
2752 class MIPSTargetCodeGenInfo : public TargetCodeGenInfo {
2754 MIPSTargetCodeGenInfo(CodeGenTypes &CGT)
2755 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
2757 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const {
2761 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2762 llvm::Value *Address) const;
2767 MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
2768 llvm::Value *Address) const {
2769 // This information comes from gcc's implementation, which seems to
2770 // as canonical as it gets.
2772 CodeGen::CGBuilderTy &Builder = CGF.Builder;
2773 llvm::LLVMContext &Context = CGF.getLLVMContext();
2775 // Everything on MIPS is 4 bytes. Double-precision FP registers
2776 // are aliased to pairs of single-precision FP registers.
2777 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context);
2778 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
2780 // 0-31 are the general purpose registers, $0 - $31.
2781 // 32-63 are the floating-point registers, $f0 - $f31.
2782 // 64 and 65 are the multiply/divide registers, $hi and $lo.
2783 // 66 is the (notional, I think) register for signal-handler return.
2784 AssignToArrayRange(Builder, Address, Four8, 0, 65);
2786 // 67-74 are the floating-point status registers, $fcc0 - $fcc7.
2787 // They are one bit wide and ignored here.
2789 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31.
2790 // (coprocessor 1 is the FP unit)
2791 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31.
2792 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31.
2793 // 176-181 are the DSP accumulator registers.
2794 AssignToArrayRange(Builder, Address, Four8, 80, 181);
2800 const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
2801 if (TheTargetCodeGenInfo)
2802 return *TheTargetCodeGenInfo;
2804 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't
2807 const llvm::Triple &Triple = getContext().Target.getTriple();
2808 switch (Triple.getArch()) {
2810 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types));
2812 case llvm::Triple::mips:
2813 case llvm::Triple::mipsel:
2814 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types));
2816 case llvm::Triple::arm:
2817 case llvm::Triple::thumb:
2818 // FIXME: We want to know the float calling convention as well.
2819 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0)
2820 return *(TheTargetCodeGenInfo =
2821 new ARMTargetCodeGenInfo(Types, ARMABIInfo::APCS));
2823 return *(TheTargetCodeGenInfo =
2824 new ARMTargetCodeGenInfo(Types, ARMABIInfo::AAPCS));
2826 case llvm::Triple::ppc:
2827 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types));
2829 case llvm::Triple::systemz:
2830 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types));
2832 case llvm::Triple::mblaze:
2833 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types));
2835 case llvm::Triple::msp430:
2836 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types));
2838 case llvm::Triple::x86:
2839 switch (Triple.getOS()) {
2840 case llvm::Triple::Darwin:
2841 return *(TheTargetCodeGenInfo =
2842 new X86_32TargetCodeGenInfo(Types, true, true));
2843 case llvm::Triple::Cygwin:
2844 case llvm::Triple::MinGW32:
2845 case llvm::Triple::AuroraUX:
2846 case llvm::Triple::DragonFly:
2847 case llvm::Triple::FreeBSD:
2848 case llvm::Triple::OpenBSD:
2849 case llvm::Triple::NetBSD:
2850 return *(TheTargetCodeGenInfo =
2851 new X86_32TargetCodeGenInfo(Types, false, true));
2854 return *(TheTargetCodeGenInfo =
2855 new X86_32TargetCodeGenInfo(Types, false, false));
2858 case llvm::Triple::x86_64:
2859 switch (Triple.getOS()) {
2860 case llvm::Triple::Win32:
2861 case llvm::Triple::MinGW32:
2862 case llvm::Triple::Cygwin:
2863 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types));
2865 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types));