1 //===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the X86 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "X86TargetAsmInfo.h"
15 #include "X86TargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include "llvm/Target/TargetOptions.h"
23 #include "llvm/Target/TargetMachineRegistry.h"
26 /// X86TargetMachineModule - Note that this is used on hosts that cannot link
27 /// in a library unless there are references into the library. In particular,
28 /// it seems that it is not possible to get things to work on Win32 without
29 /// this. Though it is unused, do not remove it.
30 extern "C" int X86TargetMachineModule;
31 int X86TargetMachineModule = 0;
33 // Register the target.
34 static RegisterTarget<X86_32TargetMachine>
35 X("x86", "32-bit X86: Pentium-Pro and above");
36 static RegisterTarget<X86_64TargetMachine>
37 Y("x86-64", "64-bit X86: EM64T and AMD64");
39 // Force static initialization when called from llvm/InitializeAllTargets.h
41 void InitializeX86Target() { }
44 // No assembler printer by default
45 X86TargetMachine::AsmPrinterCtorFn X86TargetMachine::AsmPrinterCtor = 0;
47 const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
48 if (Subtarget.isFlavorIntel())
49 return new X86WinTargetAsmInfo(*this);
51 switch (Subtarget.TargetType) {
52 case X86Subtarget::isDarwin:
53 return new X86DarwinTargetAsmInfo(*this);
54 case X86Subtarget::isELF:
55 return new X86ELFTargetAsmInfo(*this);
56 case X86Subtarget::isMingw:
57 case X86Subtarget::isCygwin:
58 return new X86COFFTargetAsmInfo(*this);
59 case X86Subtarget::isWindows:
60 return new X86WinTargetAsmInfo(*this);
62 return new X86GenericTargetAsmInfo(*this);
66 unsigned X86_32TargetMachine::getJITMatchQuality() {
67 #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
73 unsigned X86_64TargetMachine::getJITMatchQuality() {
74 #if defined(__x86_64__) || defined(_M_AMD64)
80 unsigned X86_32TargetMachine::getModuleMatchQuality(const Module &M) {
81 // We strongly match "i[3-9]86-*".
82 std::string TT = M.getTargetTriple();
83 if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
84 TT[4] == '-' && TT[1] - '3' < 6)
86 // If the target triple is something non-X86, we don't match.
87 if (!TT.empty()) return 0;
89 if (M.getEndianness() == Module::LittleEndian &&
90 M.getPointerSize() == Module::Pointer32)
91 return 10; // Weak match
92 else if (M.getEndianness() != Module::AnyEndianness ||
93 M.getPointerSize() != Module::AnyPointerSize)
94 return 0; // Match for some other target
96 return getJITMatchQuality()/2;
99 unsigned X86_64TargetMachine::getModuleMatchQuality(const Module &M) {
100 // We strongly match "x86_64-*".
101 std::string TT = M.getTargetTriple();
102 if (TT.size() >= 7 && TT[0] == 'x' && TT[1] == '8' && TT[2] == '6' &&
103 TT[3] == '_' && TT[4] == '6' && TT[5] == '4' && TT[6] == '-')
106 // We strongly match "amd64-*".
107 if (TT.size() >= 6 && TT[0] == 'a' && TT[1] == 'm' && TT[2] == 'd' &&
108 TT[3] == '6' && TT[4] == '4' && TT[5] == '-')
111 // If the target triple is something non-X86-64, we don't match.
112 if (!TT.empty()) return 0;
114 if (M.getEndianness() == Module::LittleEndian &&
115 M.getPointerSize() == Module::Pointer64)
116 return 10; // Weak match
117 else if (M.getEndianness() != Module::AnyEndianness ||
118 M.getPointerSize() != Module::AnyPointerSize)
119 return 0; // Match for some other target
121 return getJITMatchQuality()/2;
124 X86_32TargetMachine::X86_32TargetMachine(const Module &M, const std::string &FS)
125 : X86TargetMachine(M, FS, false) {
129 X86_64TargetMachine::X86_64TargetMachine(const Module &M, const std::string &FS)
130 : X86TargetMachine(M, FS, true) {
133 /// X86TargetMachine ctor - Create an ILP32 architecture model
135 X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
137 : Subtarget(M, FS, is64Bit),
138 DataLayout(Subtarget.getDataLayout()),
139 FrameInfo(TargetFrameInfo::StackGrowsDown,
140 Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4),
141 InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) {
142 DefRelocModel = getRelocationModel();
143 // FIXME: Correctly select PIC model for Win64 stuff
144 if (getRelocationModel() == Reloc::Default) {
145 if (Subtarget.isTargetDarwin() ||
146 (Subtarget.isTargetCygMing() && !Subtarget.isTargetWin64()))
147 setRelocationModel(Reloc::DynamicNoPIC);
149 setRelocationModel(Reloc::Static);
152 // ELF doesn't have a distinct dynamic-no-PIC model. Dynamic-no-PIC
153 // is defined as a model for code which may be used in static or
154 // dynamic executables but not necessarily a shared library. On ELF
155 // implement this by using the Static model.
156 if (Subtarget.isTargetELF() &&
157 getRelocationModel() == Reloc::DynamicNoPIC)
158 setRelocationModel(Reloc::Static);
160 if (Subtarget.is64Bit()) {
161 // No DynamicNoPIC support under X86-64.
162 if (getRelocationModel() == Reloc::DynamicNoPIC)
163 setRelocationModel(Reloc::PIC_);
164 // Default X86-64 code model is small.
165 if (getCodeModel() == CodeModel::Default)
166 setCodeModel(CodeModel::Small);
169 if (Subtarget.isTargetCygMing())
170 Subtarget.setPICStyle(PICStyles::WinPIC);
171 else if (Subtarget.isTargetDarwin()) {
172 if (Subtarget.is64Bit())
173 Subtarget.setPICStyle(PICStyles::RIPRel);
175 Subtarget.setPICStyle(PICStyles::Stub);
176 } else if (Subtarget.isTargetELF()) {
177 if (Subtarget.is64Bit())
178 Subtarget.setPICStyle(PICStyles::RIPRel);
180 Subtarget.setPICStyle(PICStyles::GOT);
184 //===----------------------------------------------------------------------===//
185 // Pass Pipeline Configuration
186 //===----------------------------------------------------------------------===//
188 bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
189 CodeGenOpt::Level OptLevel) {
190 // Install an instruction selector.
191 PM.add(createX86ISelDag(*this, OptLevel));
193 // If we're using Fast-ISel, clean up the mess.
195 PM.add(createDeadMachineInstructionElimPass());
197 // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
198 PM.add(createX87FPRegKillInserterPass());
203 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
204 CodeGenOpt::Level OptLevel) {
205 // Calculate and set max stack object alignment early, so we can decide
206 // whether we will need stack realignment (and thus FP).
207 PM.add(createX86MaxStackAlignmentCalculatorPass());
208 return false; // -print-machineinstr shouldn't print after this.
211 bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
212 CodeGenOpt::Level OptLevel) {
213 PM.add(createX86FloatingPointStackifierPass());
214 return true; // -print-machineinstr should print after this.
217 bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM,
218 CodeGenOpt::Level OptLevel,
221 // FIXME: Move this somewhere else!
222 // On Darwin, override 64-bit static relocation to pic_ since the
223 // assembler doesn't support it.
224 if (DefRelocModel == Reloc::Static &&
225 Subtarget.isTargetDarwin() && Subtarget.is64Bit())
226 setRelocationModel(Reloc::PIC_);
228 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
230 PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose));
234 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
235 CodeGenOpt::Level OptLevel,
237 MachineCodeEmitter &MCE) {
238 // FIXME: Move this to TargetJITInfo!
239 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
240 if (DefRelocModel == Reloc::Default &&
241 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit()))
242 setRelocationModel(Reloc::Static);
244 // 64-bit JIT places everything in the same buffer except external functions.
245 // On Darwin, use small code model but hack the call instruction for
246 // externals. Elsewhere, do not assume globals are in the lower 4G.
247 if (Subtarget.is64Bit()) {
248 if (Subtarget.isTargetDarwin())
249 setCodeModel(CodeModel::Small);
251 setCodeModel(CodeModel::Large);
254 PM.add(createX86CodeEmitterPass(*this, MCE));
256 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
258 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
264 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
265 CodeGenOpt::Level OptLevel,
267 JITCodeEmitter &JCE) {
268 // FIXME: Move this to TargetJITInfo!
269 // On Darwin, do not override 64-bit setting made in X86TargetMachine().
270 if (DefRelocModel == Reloc::Default &&
271 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit()))
272 setRelocationModel(Reloc::Static);
274 // 64-bit JIT places everything in the same buffer except external functions.
275 // On Darwin, use small code model but hack the call instruction for
276 // externals. Elsewhere, do not assume globals are in the lower 4G.
277 if (Subtarget.is64Bit()) {
278 if (Subtarget.isTargetDarwin())
279 setCodeModel(CodeModel::Small);
281 setCodeModel(CodeModel::Large);
284 PM.add(createX86JITCodeEmitterPass(*this, JCE));
286 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
288 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
294 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
295 CodeGenOpt::Level OptLevel,
297 MachineCodeEmitter &MCE) {
298 PM.add(createX86CodeEmitterPass(*this, MCE));
300 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
302 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
308 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
309 CodeGenOpt::Level OptLevel,
311 JITCodeEmitter &JCE) {
312 PM.add(createX86JITCodeEmitterPass(*this, JCE));
314 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
316 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
322 /// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
323 /// RIP-relative on this machine, taking into consideration the relocation
324 /// model and subtarget. RIP-relative addresses cannot have a separate
325 /// base or index register.
326 bool X86TargetMachine::symbolicAddressesAreRIPRel() const {
327 return getRelocationModel() != Reloc::Static &&
328 Subtarget.isPICStyleRIPRel();