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35 * @(#)fpu_arith.h 8.1 (Berkeley) 6/11/93
36 * $NetBSD: fpu_arith.h,v 1.3 2000/07/24 04:11:03 mycroft Exp $
41 * Extended-precision arithmetic.
43 * We hold the notion of a `carry register', which may or may not be a
44 * machine carry bit or register. On the SPARC, it is just the machine's
47 * In the worst case, you can compute the carry from x+y as
48 * (unsigned)(x + y) < (unsigned)x
50 * ((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0)
54 /* set up for extended-precision arithemtic */
55 #define FPU_DECL_CARRY
58 * We have three kinds of add:
59 * add with carry: r = x + y + c
60 * add (ignoring current carry) and set carry: c'r = x + y + 0
61 * add with carry and set carry: c'r = x + y + c
62 * The macros use `C' for `use carry' and `S' for `set carry'.
63 * Note that the state of the carry is undefined after ADDC and SUBC,
64 * so if all you have for these is `add with carry and set carry',
67 * The same goes for subtract, except that we compute x - y - c.
69 * Finally, we have a way to get the carry into a `regular' variable,
70 * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero
71 * into carry; GET_CARRY sets its argument to 0 or 1.
73 #define FPU_ADDC(r, x, y) \
74 __asm __volatile("addx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
75 #define FPU_ADDS(r, x, y) \
76 __asm __volatile("addcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
77 #define FPU_ADDCS(r, x, y) \
78 __asm __volatile("addxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
79 #define FPU_SUBC(r, x, y) \
80 __asm __volatile("subx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
81 #define FPU_SUBS(r, x, y) \
82 __asm __volatile("subcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
83 #define FPU_SUBCS(r, x, y) \
84 __asm __volatile("subxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
86 #define FPU_GET_CARRY(r) __asm __volatile("addx %%g0,%%g0,%0" : "=r"(r))
87 #define FPU_SET_CARRY(v) __asm __volatile("addcc %0,-1,%%g0" : : "r"(v))
89 #define FPU_SHL1_BY_ADD /* shift left 1 faster by ADDC than (a<<1)|(b>>31) */