2 * Copyright (c) 2001 by Thomas Moestl <tmm@FreeBSD.org>.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
21 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
23 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
29 #include <sys/types.h>
30 #include <machine/cpufunc.h>
31 #include <machine/frame.h>
32 #include <machine/instr.h>
36 #include "__sparc_utrap_private.h"
40 __emul_insn(struct utrapframe *uf)
50 insn = *(u_int *)uf->uf_pc;
52 switch (IF_OP(insn)) {
54 switch (IF_F3_OP3(insn)) {
56 if (IF_F3_RS1(insn) != 0) {
60 reg = __emul_f3_op2(uf, insn);
61 for (i = 0; i < 64; i++)
62 res += (reg >> i) & 1;
63 __emul_store_reg(uf, IF_F3_RD(insn), res);
71 switch (IF_F3_OP3(insn)) {
73 rd = INSFPdq_RN(IF_F3_RD(insn));
74 addr = (u_long *)__emul_f3_memop_addr(uf, insn);
75 __fpu_setreg64(rd, addr[0]);
76 __fpu_setreg64(rd + 2, addr[1]);
79 rd = INSFPdq_RN(IF_F3_RD(insn));
80 addr = (u_long *)__emul_f3_memop_addr(uf, insn);
81 addr[0] = __fpu_getreg64(rd);
82 addr[1] = __fpu_getreg64(rd + 2);
97 __emul_fetch_reg(struct utrapframe *uf, int reg)
103 else if (reg < IREG_O0) /* global */
104 return (uf->uf_global[reg]);
105 else if (reg < IREG_L0) /* out */
106 return (uf->uf_out[reg - IREG_O0]);
107 else { /* local, in */
109 * The in registers are immediately after the locals in
112 frm = (struct frame *)(uf->uf_out[6] + SPOFF);
113 return (frm->fr_local[reg - IREG_L0]);
118 __emul_store_reg(struct utrapframe *uf, int reg, u_long val)
124 if (reg < IREG_O0) /* global */
125 uf->uf_global[reg] = val;
126 else if (reg < IREG_L0) /* out */
127 uf->uf_out[reg - IREG_O0] = val;
130 * The in registers are immediately after the locals in
133 frm = (struct frame *)(uf->uf_out[6] + SPOFF);
134 frm->fr_local[reg - IREG_L0] = val;
139 __emul_f3_op2(struct utrapframe *uf, u_int insn)
142 if (IF_F3_I(insn) != 0)
143 return (IF_SIMM(insn, 13));
145 return (__emul_fetch_reg(uf, IF_F3_RS2(insn)));
149 __emul_f3_memop_addr(struct utrapframe *uf, u_int insn)
153 addr = __emul_f3_op2(uf, insn) + __emul_fetch_reg(uf, IF_F3_RS1(insn));