3 CRTARCH= ${MACHINE_CPUARCH:C/amd64/x86_64/}
5 CRTSRC= ${SRCTOP}/contrib/llvm-project/compiler-rt/lib/builtins
7 .PATH: ${CRTSRC}/${CRTARCH}
16 SRCF+= apple_versioning
39 SRCF+= enable_execute_stack
70 SRCF+= gcc_personality_v0 # not in upstream
109 SRCF+= trampoline_setup
124 # Avoid using SSE2 instructions on i386, if unsupported.
125 .if ${MACHINE_CPUARCH} == "i386" && empty(MACHINE_CPU:Msse2)
141 # __cpu_model support, only used on x86
142 .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
147 # 128-bit quad precision long double support,
148 # only used on some architectures.
150 .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv"
172 # These are already shipped by libc.a on some architectures.
173 .if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" && \
174 ${MACHINE_CPUARCH} != "riscv"
191 .if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips"
196 # FreeBSD-specific atomic intrinsics.
197 .if ${MACHINE_CPUARCH} == "arm"
198 .PATH: ${SRCTOP}/sys/arm/arm
201 CFLAGS+= -DEMIT_SYNC_ATOMICS
202 .elif ${MACHINE_CPUARCH} == "mips"
203 .PATH: ${SRCTOP}/sys/mips/mips
209 .if "${COMPILER_TYPE}" == "clang" && \
210 (${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpcspe")
212 CFLAGS.atomic.c+= -Wno-atomic-alignment
217 .if ${MACHINE_ARCH:Marmv[67]*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") \
218 && exists(${CRTSRC}/${CRTARCH}/${file}vfp.S)
220 . elif exists(${CRTSRC}/${CRTARCH}/${file}.S)
227 .if ${MACHINE_CPUARCH} == "arm"
229 SRCS+= aeabi_idivmod.S
230 SRCS+= aeabi_ldivmod.S
231 SRCS+= aeabi_memcmp.S
232 SRCS+= aeabi_memcpy.S
233 SRCS+= aeabi_memmove.S
234 SRCS+= aeabi_memset.S
235 SRCS+= aeabi_uidivmod.S
236 SRCS+= aeabi_uldivmod.S
243 SRCS+= sync_synchronize.S
246 # On some archs GCC-6.3 requires bswap32 built-in.
247 .if ${MACHINE_CPUARCH} == "mips" || ${MACHINE_CPUARCH} == "riscv"
252 .if ${MACHINE_ARCH:Mriscv*sf}
253 CFLAGS+= -D__SOFT_FP__