3 CRTARCH= ${MACHINE_CPUARCH:C/amd64/x86_64/}
5 CRTSRC= ${SRCTOP}/contrib/llvm-project/compiler-rt/lib/builtins
7 .PATH: ${CRTSRC}/${CRTARCH}
16 SRCF+= apple_versioning
41 SRCF+= enable_execute_stack
110 SRCF+= trampoline_setup
125 # Enable compiler-rt's atomic implementation only for clang, as it uses clang
126 # specific builtins, and gcc packages usually come with their own libatomic.
127 # Exclude arm which has its own implementations of atomic functions, below.
128 .if "${COMPILER_TYPE}" == "clang" && ${MACHINE_CPUARCH} != "arm"
132 # Avoid using SSE2 instructions on i386, if unsupported.
133 .if ${MACHINE_CPUARCH} == "i386" && empty(MACHINE_CPU:Msse2)
149 # __cpu_model support, only used on x86
150 .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
154 # The fp_mode implementation for amd64 and i386 is shared, while other
155 # architectures use the regular approach.
156 .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
157 SRCS+= i386/fp_mode.c
163 # 128-bit quad precision long double support,
164 # only used on some architectures.
166 .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv"
188 # These are already shipped by libc.a on some architectures.
189 .if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" && \
190 ${MACHINE_CPUARCH} != "riscv"
207 .if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips"
212 # FreeBSD-specific atomic intrinsics.
213 .if ${MACHINE_CPUARCH} == "arm"
214 .PATH: ${SRCTOP}/sys/arm/arm
217 CFLAGS+= -DEMIT_SYNC_ATOMICS
218 .elif ${MACHINE_CPUARCH} == "mips"
219 .PATH: ${SRCTOP}/sys/mips/mips
225 .if ${MACHINE_ARCH:Marmv[67]*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") \
226 && exists(${CRTSRC}/${CRTARCH}/${file}vfp.S)
228 . elif exists(${CRTSRC}/${CRTARCH}/${file}.S)
235 .if ${MACHINE_CPUARCH} == "arm"
237 SRCS+= aeabi_idivmod.S
238 SRCS+= aeabi_ldivmod.S
239 SRCS+= aeabi_memcmp.S
240 SRCS+= aeabi_memcpy.S
241 SRCS+= aeabi_memmove.S
242 SRCS+= aeabi_memset.S
243 SRCS+= aeabi_uidivmod.S
244 SRCS+= aeabi_uldivmod.S
249 SRCS+= sync_synchronize.S
252 .if ${MACHINE_ARCH:Mriscv*sf}
253 CFLAGS+= -D__SOFT_FP__