lib/libpmc/libpmc.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2003-2008 Joseph Koshy
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 #include <sys/cdefs.h>
  30 __FBSDID("$FreeBSD$");
  31
  32 #include <sys/types.h>
  33 #include <sys/param.h>
  34 #include <sys/module.h>
  35 #include <sys/pmc.h>
  36 #include <sys/syscall.h>
  37
  38 #include <ctype.h>
  39 #include <errno.h>
  40 #include <err.h>
  41 #include <fcntl.h>
  42 #include <pmc.h>
  43 #include <stdio.h>
  44 #include <stdlib.h>
  45 #include <string.h>
  46 #include <strings.h>
  47 #include <sysexits.h>
  48 #include <unistd.h>
  49
  50 #include "libpmcinternal.h"
  51
  52 /* Function prototypes */
  53 #if defined(__amd64__) || defined(__i386__)
  54 static int k8_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
  55     struct pmc_op_pmcallocate *_pmc_config);
  56 #endif
  57 #if defined(__amd64__) || defined(__i386__)
  58 static int tsc_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
  59     struct pmc_op_pmcallocate *_pmc_config);
  60 #endif
  61 #if defined(__arm__)
  62 static int armv7_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
  63     struct pmc_op_pmcallocate *_pmc_config);
  64 #endif
  65 #if defined(__aarch64__)
  66 static int arm64_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
  67     struct pmc_op_pmcallocate *_pmc_config);
  68 #endif
  69 #if defined(__mips__)
  70 static int mips_allocate_pmc(enum pmc_event _pe, char* ctrspec,
  71                              struct pmc_op_pmcallocate *_pmc_config);
  72 #endif /* __mips__ */
  73 static int soft_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
  74     struct pmc_op_pmcallocate *_pmc_config);
  75
  76 #if defined(__powerpc__)
  77 static int powerpc_allocate_pmc(enum pmc_event _pe, char* ctrspec,
  78                              struct pmc_op_pmcallocate *_pmc_config);
  79 #endif /* __powerpc__ */
  80
  81 #define PMC_CALL(cmd, params)                           \
  82         syscall(pmc_syscall, PMC_OP_##cmd, (params))
  83
  84 /*
  85  * Event aliases provide a way for the user to ask for generic events
  86  * like "cache-misses", or "instructions-retired".  These aliases are
  87  * mapped to the appropriate canonical event descriptions using a
  88  * lookup table.
  89  */
  90 struct pmc_event_alias {
  91         const char      *pm_alias;
  92         const char      *pm_spec;
  93 };
  94
  95 static const struct pmc_event_alias *pmc_mdep_event_aliases;
  96
  97 /*
  98  * The pmc_event_descr structure maps symbolic names known to the user
  99  * to integer codes used by the PMC KLD.
 100  */
 101 struct pmc_event_descr {
 102         const char      *pm_ev_name;
 103         enum pmc_event  pm_ev_code;
 104 };
 105
 106 /*
 107  * The pmc_class_descr structure maps class name prefixes for
 108  * event names to event tables and other PMC class data.
 109  */
 110 struct pmc_class_descr {
 111         const char      *pm_evc_name;
 112         size_t          pm_evc_name_size;
 113         enum pmc_class  pm_evc_class;
 114         const struct pmc_event_descr *pm_evc_event_table;
 115         size_t          pm_evc_event_table_size;
 116         int             (*pm_evc_allocate_pmc)(enum pmc_event _pe,
 117                             char *_ctrspec, struct pmc_op_pmcallocate *_pa);
 118 };
 119
 120 #define PMC_TABLE_SIZE(N)       (sizeof(N)/sizeof(N[0]))
 121 #define PMC_EVENT_TABLE_SIZE(N) PMC_TABLE_SIZE(N##_event_table)
 122
 123 #undef  __PMC_EV
 124 #define __PMC_EV(C,N) { #N, PMC_EV_ ## C ## _ ## N },
 125
 126 /*
 127  * PMC_CLASSDEP_TABLE(NAME, CLASS)
 128  *
 129  * Define a table mapping event names and aliases to HWPMC event IDs.
 130  */
 131 #define PMC_CLASSDEP_TABLE(N, C)                                \
 132         static const struct pmc_event_descr N##_event_table[] = \
 133         {                                                       \
 134                 __PMC_EV_##C()                                  \
 135         }
 136
 137 PMC_CLASSDEP_TABLE(iaf, IAF);
 138 PMC_CLASSDEP_TABLE(k8, K8);
 139 PMC_CLASSDEP_TABLE(armv7, ARMV7);
 140 PMC_CLASSDEP_TABLE(armv8, ARMV8);
 141 PMC_CLASSDEP_TABLE(beri, BERI);
 142 PMC_CLASSDEP_TABLE(mips24k, MIPS24K);
 143 PMC_CLASSDEP_TABLE(mips74k, MIPS74K);
 144 PMC_CLASSDEP_TABLE(octeon, OCTEON);
 145 PMC_CLASSDEP_TABLE(ppc7450, PPC7450);
 146 PMC_CLASSDEP_TABLE(ppc970, PPC970);
 147 PMC_CLASSDEP_TABLE(power8, POWER8);
 148 PMC_CLASSDEP_TABLE(e500, E500);
 149
 150 static struct pmc_event_descr soft_event_table[PMC_EV_DYN_COUNT];
 151
 152 #undef  __PMC_EV_ALIAS
 153 #define __PMC_EV_ALIAS(N,CODE)  { N, PMC_EV_##CODE },
 154
 155 /*
 156  * TODO: Factor out the __PMC_EV_ARMV7/8 list into a single separate table
 157  * rather than duplicating for each core.
 158  */
 159
 160 static const struct pmc_event_descr cortex_a8_event_table[] =
 161 {
 162         __PMC_EV_ALIAS_ARMV7_CORTEX_A8()
 163         __PMC_EV_ARMV7()
 164 };
 165
 166 static const struct pmc_event_descr cortex_a9_event_table[] =
 167 {
 168         __PMC_EV_ALIAS_ARMV7_CORTEX_A9()
 169         __PMC_EV_ARMV7()
 170 };
 171
 172 static const struct pmc_event_descr cortex_a53_event_table[] =
 173 {
 174         __PMC_EV_ALIAS_ARMV8_CORTEX_A53()
 175         __PMC_EV_ARMV8()
 176 };
 177
 178 static const struct pmc_event_descr cortex_a57_event_table[] =
 179 {
 180         __PMC_EV_ALIAS_ARMV8_CORTEX_A57()
 181         __PMC_EV_ARMV8()
 182 };
 183
 184 static const struct pmc_event_descr cortex_a76_event_table[] =
 185 {
 186         __PMC_EV_ALIAS_ARMV8_CORTEX_A76()
 187         __PMC_EV_ARMV8()
 188 };
 189
 190 static const struct pmc_event_descr tsc_event_table[] =
 191 {
 192         __PMC_EV_ALIAS_TSC()
 193 };
 194
 195 #undef  PMC_CLASS_TABLE_DESC
 196 #define PMC_CLASS_TABLE_DESC(NAME, CLASS, EVENTS, ALLOCATOR)    \
 197 static const struct pmc_class_descr NAME##_class_table_descr =  \
 198         {                                                       \
 199                 .pm_evc_name  = #CLASS "-",                     \
 200                 .pm_evc_name_size = sizeof(#CLASS "-") - 1,     \
 201                 .pm_evc_class = PMC_CLASS_##CLASS ,             \
 202                 .pm_evc_event_table = EVENTS##_event_table ,    \
 203                 .pm_evc_event_table_size =                      \
 204                         PMC_EVENT_TABLE_SIZE(EVENTS),           \
 205                 .pm_evc_allocate_pmc = ALLOCATOR##_allocate_pmc \
 206         }
 207
 208 #if     defined(__i386__) || defined(__amd64__)
 209 PMC_CLASS_TABLE_DESC(k8, K8, k8, k8);
 210 #endif
 211 #if     defined(__i386__) || defined(__amd64__)
 212 PMC_CLASS_TABLE_DESC(tsc, TSC, tsc, tsc);
 213 #endif
 214 #if     defined(__arm__)
 215 PMC_CLASS_TABLE_DESC(cortex_a8, ARMV7, cortex_a8, armv7);
 216 PMC_CLASS_TABLE_DESC(cortex_a9, ARMV7, cortex_a9, armv7);
 217 #endif
 218 #if     defined(__aarch64__)
 219 PMC_CLASS_TABLE_DESC(cortex_a53, ARMV8, cortex_a53, arm64);
 220 PMC_CLASS_TABLE_DESC(cortex_a57, ARMV8, cortex_a57, arm64);
 221 PMC_CLASS_TABLE_DESC(cortex_a76, ARMV8, cortex_a76, arm64);
 222 #endif
 223 #if defined(__mips__)
 224 PMC_CLASS_TABLE_DESC(beri, BERI, beri, mips);
 225 PMC_CLASS_TABLE_DESC(mips24k, MIPS24K, mips24k, mips);
 226 PMC_CLASS_TABLE_DESC(mips74k, MIPS74K, mips74k, mips);
 227 PMC_CLASS_TABLE_DESC(octeon, OCTEON, octeon, mips);
 228 #endif /* __mips__ */
 229 #if defined(__powerpc__)
 230 PMC_CLASS_TABLE_DESC(ppc7450, PPC7450, ppc7450, powerpc);
 231 PMC_CLASS_TABLE_DESC(ppc970, PPC970, ppc970, powerpc);
 232 PMC_CLASS_TABLE_DESC(power8, POWER8, power8, powerpc);
 233 PMC_CLASS_TABLE_DESC(e500, E500, e500, powerpc);
 234 #endif
 235
 236 static struct pmc_class_descr soft_class_table_descr =
 237 {
 238         .pm_evc_name  = "SOFT-",
 239         .pm_evc_name_size = sizeof("SOFT-") - 1,
 240         .pm_evc_class = PMC_CLASS_SOFT,
 241         .pm_evc_event_table = NULL,
 242         .pm_evc_event_table_size = 0,
 243         .pm_evc_allocate_pmc = soft_allocate_pmc
 244 };
 245
 246 #undef  PMC_CLASS_TABLE_DESC
 247
 248 static const struct pmc_class_descr **pmc_class_table;
 249 #define PMC_CLASS_TABLE_SIZE    cpu_info.pm_nclass
 250
 251 /*
 252  * Mapping tables, mapping enumeration values to human readable
 253  * strings.
 254  */
 255
 256 static const char * pmc_capability_names[] = {
 257 #undef  __PMC_CAP
 258 #define __PMC_CAP(N,V,D)        #N ,
 259         __PMC_CAPS()
 260 };
 261
 262 struct pmc_class_map {
 263         enum pmc_class  pm_class;
 264         const char      *pm_name;
 265 };
 266
 267 static const struct pmc_class_map pmc_class_names[] = {
 268 #undef  __PMC_CLASS
 269 #define __PMC_CLASS(S,V,D) { .pm_class = PMC_CLASS_##S, .pm_name = #S } ,
 270         __PMC_CLASSES()
 271 };
 272
 273 struct pmc_cputype_map {
 274         enum pmc_cputype pm_cputype;
 275         const char      *pm_name;
 276 };
 277
 278 static const struct pmc_cputype_map pmc_cputype_names[] = {
 279 #undef  __PMC_CPU
 280 #define __PMC_CPU(S, V, D) { .pm_cputype = PMC_CPU_##S, .pm_name = #S } ,
 281         __PMC_CPUS()
 282 };
 283
 284 static const char * pmc_disposition_names[] = {
 285 #undef  __PMC_DISP
 286 #define __PMC_DISP(D)   #D ,
 287         __PMC_DISPOSITIONS()
 288 };
 289
 290 static const char * pmc_mode_names[] = {
 291 #undef  __PMC_MODE
 292 #define __PMC_MODE(M,N) #M ,
 293         __PMC_MODES()
 294 };
 295
 296 static const char * pmc_state_names[] = {
 297 #undef  __PMC_STATE
 298 #define __PMC_STATE(S) #S ,
 299         __PMC_STATES()
 300 };
 301
 302 /*
 303  * Filled in by pmc_init().
 304  */
 305 static int pmc_syscall = -1;
 306 static struct pmc_cpuinfo cpu_info;
 307 static struct pmc_op_getdyneventinfo soft_event_info;
 308
 309 /* Event masks for events */
 310 struct pmc_masks {
 311         const char      *pm_name;
 312         const uint64_t  pm_value;
 313 };
 314 #define PMCMASK(N,V)    { .pm_name = #N, .pm_value = (V) }
 315 #define NULLMASK        { .pm_name = NULL }
 316
 317 #if defined(__amd64__) || defined(__i386__)
 318 static int
 319 pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint64_t *evmask)
 320 {
 321         const struct pmc_masks *pm;
 322         char *q, *r;
 323         int c;
 324
 325         if (pmask == NULL)      /* no mask keywords */
 326                 return (-1);
 327         q = strchr(p, '=');     /* skip '=' */
 328         if (*++q == '\0')       /* no more data */
 329                 return (-1);
 330         c = 0;                  /* count of mask keywords seen */
 331         while ((r = strsep(&q, "+")) != NULL) {
 332                 for (pm = pmask; pm->pm_name && strcasecmp(r, pm->pm_name);
 333                     pm++)
 334                         ;
 335                 if (pm->pm_name == NULL) /* not found */
 336                         return (-1);
 337                 *evmask |= pm->pm_value;
 338                 c++;
 339         }
 340         return (c);
 341 }
 342 #endif
 343
 344 #define KWMATCH(p,kw)           (strcasecmp((p), (kw)) == 0)
 345 #define KWPREFIXMATCH(p,kw)     (strncasecmp((p), (kw), sizeof((kw)) - 1) == 0)
 346 #define EV_ALIAS(N,S)           { .pm_alias = N, .pm_spec = S }
 347
 348 #if defined(__amd64__) || defined(__i386__)
 349 /*
 350  * AMD K8 PMCs.
 351  *
 352  */
 353
 354 static struct pmc_event_alias k8_aliases[] = {
 355         EV_ALIAS("branches",            "k8-fr-retired-taken-branches"),
 356         EV_ALIAS("branch-mispredicts",
 357             "k8-fr-retired-taken-branches-mispredicted"),
 358         EV_ALIAS("cycles",              "tsc"),
 359         EV_ALIAS("dc-misses",           "k8-dc-miss"),
 360         EV_ALIAS("ic-misses",           "k8-ic-miss"),
 361         EV_ALIAS("instructions",        "k8-fr-retired-x86-instructions"),
 362         EV_ALIAS("interrupts",          "k8-fr-taken-hardware-interrupts"),
 363         EV_ALIAS("unhalted-cycles",     "k8-bu-cpu-clk-unhalted"),
 364         EV_ALIAS(NULL, NULL)
 365 };
 366
 367 #define __K8MASK(N,V) PMCMASK(N,(1 << (V)))
 368
 369 /*
 370  * Parsing tables
 371  */
 372
 373 /* fp dispatched fpu ops */
 374 static const struct pmc_masks k8_mask_fdfo[] = {
 375         __K8MASK(add-pipe-excluding-junk-ops,   0),
 376         __K8MASK(multiply-pipe-excluding-junk-ops,      1),
 377         __K8MASK(store-pipe-excluding-junk-ops, 2),
 378         __K8MASK(add-pipe-junk-ops,             3),
 379         __K8MASK(multiply-pipe-junk-ops,        4),
 380         __K8MASK(store-pipe-junk-ops,           5),
 381         NULLMASK
 382 };
 383
 384 /* ls segment register loads */
 385 static const struct pmc_masks k8_mask_lsrl[] = {
 386         __K8MASK(es,    0),
 387         __K8MASK(cs,    1),
 388         __K8MASK(ss,    2),
 389         __K8MASK(ds,    3),
 390         __K8MASK(fs,    4),
 391         __K8MASK(gs,    5),
 392         __K8MASK(hs,    6),
 393         NULLMASK
 394 };
 395
 396 /* ls locked operation */
 397 static const struct pmc_masks k8_mask_llo[] = {
 398         __K8MASK(locked-instructions,   0),
 399         __K8MASK(cycles-in-request,     1),
 400         __K8MASK(cycles-to-complete,    2),
 401         NULLMASK
 402 };
 403
 404 /* dc refill from {l2,system} and dc copyback */
 405 static const struct pmc_masks k8_mask_dc[] = {
 406         __K8MASK(invalid,       0),
 407         __K8MASK(shared,        1),
 408         __K8MASK(exclusive,     2),
 409         __K8MASK(owner,         3),
 410         __K8MASK(modified,      4),
 411         NULLMASK
 412 };
 413
 414 /* dc one bit ecc error */
 415 static const struct pmc_masks k8_mask_dobee[] = {
 416         __K8MASK(scrubber,      0),
 417         __K8MASK(piggyback,     1),
 418         NULLMASK
 419 };
 420
 421 /* dc dispatched prefetch instructions */
 422 static const struct pmc_masks k8_mask_ddpi[] = {
 423         __K8MASK(load,  0),
 424         __K8MASK(store, 1),
 425         __K8MASK(nta,   2),
 426         NULLMASK
 427 };
 428
 429 /* dc dcache accesses by locks */
 430 static const struct pmc_masks k8_mask_dabl[] = {
 431         __K8MASK(accesses,      0),
 432         __K8MASK(misses,        1),
 433         NULLMASK
 434 };
 435
 436 /* bu internal l2 request */
 437 static const struct pmc_masks k8_mask_bilr[] = {
 438         __K8MASK(ic-fill,       0),
 439         __K8MASK(dc-fill,       1),
 440         __K8MASK(tlb-reload,    2),
 441         __K8MASK(tag-snoop,     3),
 442         __K8MASK(cancelled,     4),
 443         NULLMASK
 444 };
 445
 446 /* bu fill request l2 miss */
 447 static const struct pmc_masks k8_mask_bfrlm[] = {
 448         __K8MASK(ic-fill,       0),
 449         __K8MASK(dc-fill,       1),
 450         __K8MASK(tlb-reload,    2),
 451         NULLMASK
 452 };
 453
 454 /* bu fill into l2 */
 455 static const struct pmc_masks k8_mask_bfil[] = {
 456         __K8MASK(dirty-l2-victim,       0),
 457         __K8MASK(victim-from-l2,        1),
 458         NULLMASK
 459 };
 460
 461 /* fr retired fpu instructions */
 462 static const struct pmc_masks k8_mask_frfi[] = {
 463         __K8MASK(x87,                   0),
 464         __K8MASK(mmx-3dnow,             1),
 465         __K8MASK(packed-sse-sse2,       2),
 466         __K8MASK(scalar-sse-sse2,       3),
 467         NULLMASK
 468 };
 469
 470 /* fr retired fastpath double op instructions */
 471 static const struct pmc_masks k8_mask_frfdoi[] = {
 472         __K8MASK(low-op-pos-0,          0),
 473         __K8MASK(low-op-pos-1,          1),
 474         __K8MASK(low-op-pos-2,          2),
 475         NULLMASK
 476 };
 477
 478 /* fr fpu exceptions */
 479 static const struct pmc_masks k8_mask_ffe[] = {
 480         __K8MASK(x87-reclass-microfaults,       0),
 481         __K8MASK(sse-retype-microfaults,        1),
 482         __K8MASK(sse-reclass-microfaults,       2),
 483         __K8MASK(sse-and-x87-microtraps,        3),
 484         NULLMASK
 485 };
 486
 487 /* nb memory controller page access event */
 488 static const struct pmc_masks k8_mask_nmcpae[] = {
 489         __K8MASK(page-hit,      0),
 490         __K8MASK(page-miss,     1),
 491         __K8MASK(page-conflict, 2),
 492         NULLMASK
 493 };
 494
 495 /* nb memory controller turnaround */
 496 static const struct pmc_masks k8_mask_nmct[] = {
 497         __K8MASK(dimm-turnaround,               0),
 498         __K8MASK(read-to-write-turnaround,      1),
 499         __K8MASK(write-to-read-turnaround,      2),
 500         NULLMASK
 501 };
 502
 503 /* nb memory controller bypass saturation */
 504 static const struct pmc_masks k8_mask_nmcbs[] = {
 505         __K8MASK(memory-controller-hi-pri-bypass,       0),
 506         __K8MASK(memory-controller-lo-pri-bypass,       1),
 507         __K8MASK(dram-controller-interface-bypass,      2),
 508         __K8MASK(dram-controller-queue-bypass,          3),
 509         NULLMASK
 510 };
 511
 512 /* nb sized commands */
 513 static const struct pmc_masks k8_mask_nsc[] = {
 514         __K8MASK(nonpostwrszbyte,       0),
 515         __K8MASK(nonpostwrszdword,      1),
 516         __K8MASK(postwrszbyte,          2),
 517         __K8MASK(postwrszdword,         3),
 518         __K8MASK(rdszbyte,              4),
 519         __K8MASK(rdszdword,             5),
 520         __K8MASK(rdmodwr,               6),
 521         NULLMASK
 522 };
 523
 524 /* nb probe result */
 525 static const struct pmc_masks k8_mask_npr[] = {
 526         __K8MASK(probe-miss,            0),
 527         __K8MASK(probe-hit,             1),
 528         __K8MASK(probe-hit-dirty-no-memory-cancel, 2),
 529         __K8MASK(probe-hit-dirty-with-memory-cancel, 3),
 530         NULLMASK
 531 };
 532
 533 /* nb hypertransport bus bandwidth */
 534 static const struct pmc_masks k8_mask_nhbb[] = { /* HT bus bandwidth */
 535         __K8MASK(command,       0),
 536         __K8MASK(data,  1),
 537         __K8MASK(buffer-release, 2),
 538         __K8MASK(nop,   3),
 539         NULLMASK
 540 };
 541
 542 #undef  __K8MASK
 543
 544 #define K8_KW_COUNT     "count"
 545 #define K8_KW_EDGE      "edge"
 546 #define K8_KW_INV       "inv"
 547 #define K8_KW_MASK      "mask"
 548 #define K8_KW_OS        "os"
 549 #define K8_KW_USR       "usr"
 550
 551 static int
 552 k8_allocate_pmc(enum pmc_event pe, char *ctrspec,
 553     struct pmc_op_pmcallocate *pmc_config)
 554 {
 555         char            *e, *p, *q;
 556         int             n;
 557         uint32_t        count;
 558         uint64_t        evmask;
 559         const struct pmc_masks  *pm, *pmask;
 560
 561         pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
 562         pmc_config->pm_md.pm_amd.pm_amd_config = 0;
 563
 564         pmask = NULL;
 565         evmask = 0;
 566
 567 #define __K8SETMASK(M) pmask = k8_mask_##M
 568
 569         /* setup parsing tables */
 570         switch (pe) {
 571         case PMC_EV_K8_FP_DISPATCHED_FPU_OPS:
 572                 __K8SETMASK(fdfo);
 573                 break;
 574         case PMC_EV_K8_LS_SEGMENT_REGISTER_LOAD:
 575                 __K8SETMASK(lsrl);
 576                 break;
 577         case PMC_EV_K8_LS_LOCKED_OPERATION:
 578                 __K8SETMASK(llo);
 579                 break;
 580         case PMC_EV_K8_DC_REFILL_FROM_L2:
 581         case PMC_EV_K8_DC_REFILL_FROM_SYSTEM:
 582         case PMC_EV_K8_DC_COPYBACK:
 583                 __K8SETMASK(dc);
 584                 break;
 585         case PMC_EV_K8_DC_ONE_BIT_ECC_ERROR:
 586                 __K8SETMASK(dobee);
 587                 break;
 588         case PMC_EV_K8_DC_DISPATCHED_PREFETCH_INSTRUCTIONS:
 589                 __K8SETMASK(ddpi);
 590                 break;
 591         case PMC_EV_K8_DC_DCACHE_ACCESSES_BY_LOCKS:
 592                 __K8SETMASK(dabl);
 593                 break;
 594         case PMC_EV_K8_BU_INTERNAL_L2_REQUEST:
 595                 __K8SETMASK(bilr);
 596                 break;
 597         case PMC_EV_K8_BU_FILL_REQUEST_L2_MISS:
 598                 __K8SETMASK(bfrlm);
 599                 break;
 600         case PMC_EV_K8_BU_FILL_INTO_L2:
 601                 __K8SETMASK(bfil);
 602                 break;
 603         case PMC_EV_K8_FR_RETIRED_FPU_INSTRUCTIONS:
 604                 __K8SETMASK(frfi);
 605                 break;
 606         case PMC_EV_K8_FR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS:
 607                 __K8SETMASK(frfdoi);
 608                 break;
 609         case PMC_EV_K8_FR_FPU_EXCEPTIONS:
 610                 __K8SETMASK(ffe);
 611                 break;
 612         case PMC_EV_K8_NB_MEMORY_CONTROLLER_PAGE_ACCESS_EVENT:
 613                 __K8SETMASK(nmcpae);
 614                 break;
 615         case PMC_EV_K8_NB_MEMORY_CONTROLLER_TURNAROUND:
 616                 __K8SETMASK(nmct);
 617                 break;
 618         case PMC_EV_K8_NB_MEMORY_CONTROLLER_BYPASS_SATURATION:
 619                 __K8SETMASK(nmcbs);
 620                 break;
 621         case PMC_EV_K8_NB_SIZED_COMMANDS:
 622                 __K8SETMASK(nsc);
 623                 break;
 624         case PMC_EV_K8_NB_PROBE_RESULT:
 625                 __K8SETMASK(npr);
 626                 break;
 627         case PMC_EV_K8_NB_HT_BUS0_BANDWIDTH:
 628         case PMC_EV_K8_NB_HT_BUS1_BANDWIDTH:
 629         case PMC_EV_K8_NB_HT_BUS2_BANDWIDTH:
 630                 __K8SETMASK(nhbb);
 631                 break;
 632
 633         default:
 634                 break;          /* no options defined */
 635         }
 636
 637         while ((p = strsep(&ctrspec, ",")) != NULL) {
 638                 if (KWPREFIXMATCH(p, K8_KW_COUNT "=")) {
 639                         q = strchr(p, '=');
 640                         if (*++q == '\0') /* skip '=' */
 641                                 return (-1);
 642
 643                         count = strtol(q, &e, 0);
 644                         if (e == q || *e != '\0')
 645                                 return (-1);
 646
 647                         pmc_config->pm_caps |= PMC_CAP_THRESHOLD;
 648                         pmc_config->pm_md.pm_amd.pm_amd_config |=
 649                             AMD_PMC_TO_COUNTER(count);
 650
 651                 } else if (KWMATCH(p, K8_KW_EDGE)) {
 652                         pmc_config->pm_caps |= PMC_CAP_EDGE;
 653                 } else if (KWMATCH(p, K8_KW_INV)) {
 654                         pmc_config->pm_caps |= PMC_CAP_INVERT;
 655                 } else if (KWPREFIXMATCH(p, K8_KW_MASK "=")) {
 656                         if ((n = pmc_parse_mask(pmask, p, &evmask)) < 0)
 657                                 return (-1);
 658                         pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
 659                 } else if (KWMATCH(p, K8_KW_OS)) {
 660                         pmc_config->pm_caps |= PMC_CAP_SYSTEM;
 661                 } else if (KWMATCH(p, K8_KW_USR)) {
 662                         pmc_config->pm_caps |= PMC_CAP_USER;
 663                 } else
 664                         return (-1);
 665         }
 666
 667         /* other post processing */
 668         switch (pe) {
 669         case PMC_EV_K8_FP_DISPATCHED_FPU_OPS:
 670         case PMC_EV_K8_FP_CYCLES_WITH_NO_FPU_OPS_RETIRED:
 671         case PMC_EV_K8_FP_DISPATCHED_FPU_FAST_FLAG_OPS:
 672         case PMC_EV_K8_FR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS:
 673         case PMC_EV_K8_FR_RETIRED_FPU_INSTRUCTIONS:
 674         case PMC_EV_K8_FR_FPU_EXCEPTIONS:
 675                 /* XXX only available in rev B and later */
 676                 break;
 677         case PMC_EV_K8_DC_DCACHE_ACCESSES_BY_LOCKS:
 678                 /* XXX only available in rev C and later */
 679                 break;
 680         case PMC_EV_K8_LS_LOCKED_OPERATION:
 681                 /* XXX CPU Rev A,B evmask is to be zero */
 682                 if (evmask & (evmask - 1)) /* > 1 bit set */
 683                         return (-1);
 684                 if (evmask == 0) {
 685                         evmask = 0x01; /* Rev C and later: #instrs */
 686                         pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
 687                 }
 688                 break;
 689         default:
 690                 if (evmask == 0 && pmask != NULL) {
 691                         for (pm = pmask; pm->pm_name; pm++)
 692                                 evmask |= pm->pm_value;
 693                         pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
 694                 }
 695         }
 696
 697         if (pmc_config->pm_caps & PMC_CAP_QUALIFIER)
 698                 pmc_config->pm_md.pm_amd.pm_amd_config =
 699                     AMD_PMC_TO_UNITMASK(evmask);
 700
 701         return (0);
 702 }
 703
 704 #endif
 705
 706 #if     defined(__i386__) || defined(__amd64__)
 707 static int
 708 tsc_allocate_pmc(enum pmc_event pe, char *ctrspec,
 709     struct pmc_op_pmcallocate *pmc_config)
 710 {
 711         if (pe != PMC_EV_TSC_TSC)
 712                 return (-1);
 713
 714         /* TSC events must be unqualified. */
 715         if (ctrspec && *ctrspec != '\0')
 716                 return (-1);
 717
 718         pmc_config->pm_md.pm_amd.pm_amd_config = 0;
 719         pmc_config->pm_caps |= PMC_CAP_READ;
 720
 721         return (0);
 722 }
 723 #endif
 724
 725 static struct pmc_event_alias generic_aliases[] = {
 726         EV_ALIAS("instructions",                "SOFT-CLOCK.HARD"),
 727         EV_ALIAS(NULL, NULL)
 728 };
 729
 730 static int
 731 soft_allocate_pmc(enum pmc_event pe, char *ctrspec,
 732     struct pmc_op_pmcallocate *pmc_config)
 733 {
 734         (void)ctrspec;
 735         (void)pmc_config;
 736
 737         if ((int)pe < PMC_EV_SOFT_FIRST || (int)pe > PMC_EV_SOFT_LAST)
 738                 return (-1);
 739
 740         pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
 741         return (0);
 742 }
 743
 744 #if     defined(__arm__)
 745 static struct pmc_event_alias cortex_a8_aliases[] = {
 746         EV_ALIAS("dc-misses",           "L1_DCACHE_REFILL"),
 747         EV_ALIAS("ic-misses",           "L1_ICACHE_REFILL"),
 748         EV_ALIAS("instructions",        "INSTR_EXECUTED"),
 749         EV_ALIAS(NULL, NULL)
 750 };
 751
 752 static struct pmc_event_alias cortex_a9_aliases[] = {
 753         EV_ALIAS("dc-misses",           "L1_DCACHE_REFILL"),
 754         EV_ALIAS("ic-misses",           "L1_ICACHE_REFILL"),
 755         EV_ALIAS("instructions",        "INSTR_EXECUTED"),
 756         EV_ALIAS(NULL, NULL)
 757 };
 758
 759 static int
 760 armv7_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
 761     struct pmc_op_pmcallocate *pmc_config __unused)
 762 {
 763         switch (pe) {
 764         default:
 765                 break;
 766         }
 767
 768         return (0);
 769 }
 770 #endif
 771
 772 #if     defined(__aarch64__)
 773 static struct pmc_event_alias cortex_a53_aliases[] = {
 774         EV_ALIAS(NULL, NULL)
 775 };
 776 static struct pmc_event_alias cortex_a57_aliases[] = {
 777         EV_ALIAS(NULL, NULL)
 778 };
 779 static struct pmc_event_alias cortex_a76_aliases[] = {
 780         EV_ALIAS(NULL, NULL)
 781 };
 782
 783 static int
 784 arm64_allocate_pmc(enum pmc_event pe, char *ctrspec,
 785     struct pmc_op_pmcallocate *pmc_config)
 786 {
 787         char *p;
 788
 789         while ((p = strsep(&ctrspec, ",")) != NULL) {
 790                 if (KWMATCH(p, "os"))
 791                         pmc_config->pm_caps |= PMC_CAP_SYSTEM;
 792                 else if (KWMATCH(p, "usr"))
 793                         pmc_config->pm_caps |= PMC_CAP_USER;
 794                 else
 795                         return (-1);
 796         }
 797
 798         return (0);
 799 }
 800 #endif
 801
 802 #if defined(__mips__)
 803
 804 static struct pmc_event_alias beri_aliases[] = {
 805         EV_ALIAS("instructions",        "INST"),
 806         EV_ALIAS(NULL, NULL)
 807 };
 808
 809 static struct pmc_event_alias mips24k_aliases[] = {
 810         EV_ALIAS("instructions",        "INSTR_EXECUTED"),
 811         EV_ALIAS("branches",            "BRANCH_COMPLETED"),
 812         EV_ALIAS("branch-mispredicts",  "BRANCH_MISPRED"),
 813         EV_ALIAS(NULL, NULL)
 814 };
 815
 816 static struct pmc_event_alias mips74k_aliases[] = {
 817         EV_ALIAS("instructions",        "INSTR_EXECUTED"),
 818         EV_ALIAS("branches",            "BRANCH_INSNS"),
 819         EV_ALIAS("branch-mispredicts",  "MISPREDICTED_BRANCH_INSNS"),
 820         EV_ALIAS(NULL, NULL)
 821 };
 822
 823 static struct pmc_event_alias octeon_aliases[] = {
 824         EV_ALIAS("instructions",        "RET"),
 825         EV_ALIAS("branches",            "BR"),
 826         EV_ALIAS("branch-mispredicts",  "BRMIS"),
 827         EV_ALIAS(NULL, NULL)
 828 };
 829
 830 #define MIPS_KW_OS              "os"
 831 #define MIPS_KW_USR             "usr"
 832 #define MIPS_KW_ANYTHREAD       "anythread"
 833
 834 static int
 835 mips_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
 836                   struct pmc_op_pmcallocate *pmc_config __unused)
 837 {
 838         char *p;
 839
 840         (void) pe;
 841
 842         pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
 843
 844         while ((p = strsep(&ctrspec, ",")) != NULL) {
 845                 if (KWMATCH(p, MIPS_KW_OS))
 846                         pmc_config->pm_caps |= PMC_CAP_SYSTEM;
 847                 else if (KWMATCH(p, MIPS_KW_USR))
 848                         pmc_config->pm_caps |= PMC_CAP_USER;
 849                 else if (KWMATCH(p, MIPS_KW_ANYTHREAD))
 850                         pmc_config->pm_caps |= (PMC_CAP_USER | PMC_CAP_SYSTEM);
 851                 else
 852                         return (-1);
 853         }
 854
 855         return (0);
 856 }
 857
 858 #endif /* __mips__ */
 859
 860 #if defined(__powerpc__)
 861
 862 static struct pmc_event_alias ppc7450_aliases[] = {
 863         EV_ALIAS("instructions",        "INSTR_COMPLETED"),
 864         EV_ALIAS("branches",            "BRANCHES_COMPLETED"),
 865         EV_ALIAS("branch-mispredicts",  "MISPREDICTED_BRANCHES"),
 866         EV_ALIAS(NULL, NULL)
 867 };
 868
 869 static struct pmc_event_alias ppc970_aliases[] = {
 870         EV_ALIAS("instructions", "INSTR_COMPLETED"),
 871         EV_ALIAS("cycles",       "CYCLES"),
 872         EV_ALIAS(NULL, NULL)
 873 };
 874
 875 static struct pmc_event_alias power8_aliases[] = {
 876         EV_ALIAS("instructions", "INSTR_COMPLETED"),
 877         EV_ALIAS("cycles",       "CYCLES"),
 878         EV_ALIAS(NULL, NULL)
 879 };
 880
 881 static struct pmc_event_alias e500_aliases[] = {
 882         EV_ALIAS("instructions", "INSTR_COMPLETED"),
 883         EV_ALIAS("cycles",       "CYCLES"),
 884         EV_ALIAS(NULL, NULL)
 885 };
 886
 887 #define POWERPC_KW_OS           "os"
 888 #define POWERPC_KW_USR          "usr"
 889 #define POWERPC_KW_ANYTHREAD    "anythread"
 890
 891 static int
 892 powerpc_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
 893                      struct pmc_op_pmcallocate *pmc_config __unused)
 894 {
 895         char *p;
 896
 897         (void) pe;
 898
 899         pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
 900
 901         while ((p = strsep(&ctrspec, ",")) != NULL) {
 902                 if (KWMATCH(p, POWERPC_KW_OS))
 903                         pmc_config->pm_caps |= PMC_CAP_SYSTEM;
 904                 else if (KWMATCH(p, POWERPC_KW_USR))
 905                         pmc_config->pm_caps |= PMC_CAP_USER;
 906                 else if (KWMATCH(p, POWERPC_KW_ANYTHREAD))
 907                         pmc_config->pm_caps |= (PMC_CAP_USER | PMC_CAP_SYSTEM);
 908                 else
 909                         return (-1);
 910         }
 911
 912         return (0);
 913 }
 914
 915 #endif /* __powerpc__ */
 916
 917
 918 /*
 919  * Match an event name `name' with its canonical form.
 920  *
 921  * Matches are case insensitive and spaces, periods, underscores and
 922  * hyphen characters are considered to match each other.
 923  *
 924  * Returns 1 for a match, 0 otherwise.
 925  */
 926
 927 static int
 928 pmc_match_event_name(const char *name, const char *canonicalname)
 929 {
 930         int cc, nc;
 931         const unsigned char *c, *n;
 932
 933         c = (const unsigned char *) canonicalname;
 934         n = (const unsigned char *) name;
 935
 936         for (; (nc = *n) && (cc = *c); n++, c++) {
 937
 938                 if ((nc == ' ' || nc == '_' || nc == '-' || nc == '.') &&
 939                     (cc == ' ' || cc == '_' || cc == '-' || cc == '.'))
 940                         continue;
 941
 942                 if (toupper(nc) == toupper(cc))
 943                         continue;
 944
 945
 946                 return (0);
 947         }
 948
 949         if (*n == '\0' && *c == '\0')
 950                 return (1);
 951
 952         return (0);
 953 }
 954
 955 /*
 956  * Match an event name against all the event named supported by a
 957  * PMC class.
 958  *
 959  * Returns an event descriptor pointer on match or NULL otherwise.
 960  */
 961 static const struct pmc_event_descr *
 962 pmc_match_event_class(const char *name,
 963     const struct pmc_class_descr *pcd)
 964 {
 965         size_t n;
 966         const struct pmc_event_descr *ev;
 967
 968         ev = pcd->pm_evc_event_table;
 969         for (n = 0; n < pcd->pm_evc_event_table_size; n++, ev++)
 970                 if (pmc_match_event_name(name, ev->pm_ev_name))
 971                         return (ev);
 972
 973         return (NULL);
 974 }
 975
 976 /*
 977  * API entry points
 978  */
 979
 980 int
 981 pmc_allocate(const char *ctrspec, enum pmc_mode mode,
 982     uint32_t flags, int cpu, pmc_id_t *pmcid,
 983     uint64_t count)
 984 {
 985         size_t n;
 986         int retval;
 987         char *r, *spec_copy;
 988         const char *ctrname;
 989         const struct pmc_event_descr *ev;
 990         const struct pmc_event_alias *alias;
 991         struct pmc_op_pmcallocate pmc_config;
 992         const struct pmc_class_descr *pcd;
 993
 994         spec_copy = NULL;
 995         retval    = -1;
 996
 997         if (mode != PMC_MODE_SS && mode != PMC_MODE_TS &&
 998             mode != PMC_MODE_SC && mode != PMC_MODE_TC) {
 999                 errno = EINVAL;
1000                 goto out;
1001         }
1002         bzero(&pmc_config, sizeof(pmc_config));
1003         pmc_config.pm_cpu   = cpu;
1004         pmc_config.pm_mode  = mode;
1005         pmc_config.pm_flags = flags;
1006         pmc_config.pm_count = count;
1007         if (PMC_IS_SAMPLING_MODE(mode))
1008                 pmc_config.pm_caps |= PMC_CAP_INTERRUPT;
1009
1010         /*
1011          * Try to pull the raw event ID directly from the pmu-events table. If
1012          * this is unsupported on the platform, or the event is not found,
1013          * continue with searching the regular event tables.
1014          */
1015         r = spec_copy = strdup(ctrspec);
1016         ctrname = strsep(&r, ",");
1017         if (pmc_pmu_enabled()) {
1018                 if (pmc_pmu_pmcallocate(ctrname, &pmc_config) == 0)
1019                         goto found;
1020
1021                 /* Otherwise, reset any changes */
1022                 pmc_config.pm_ev = 0;
1023                 pmc_config.pm_caps = 0;
1024                 pmc_config.pm_class = 0;
1025         }
1026         free(spec_copy);
1027         spec_copy = NULL;
1028
1029         /* replace an event alias with the canonical event specifier */
1030         if (pmc_mdep_event_aliases)
1031                 for (alias = pmc_mdep_event_aliases; alias->pm_alias; alias++)
1032                         if (!strcasecmp(ctrspec, alias->pm_alias)) {
1033                                 spec_copy = strdup(alias->pm_spec);
1034                                 break;
1035                         }
1036
1037         if (spec_copy == NULL)
1038                 spec_copy = strdup(ctrspec);
1039
1040         r = spec_copy;
1041         ctrname = strsep(&r, ",");
1042
1043         /*
1044          * If a explicit class prefix was given by the user, restrict the
1045          * search for the event to the specified PMC class.
1046          */
1047         ev = NULL;
1048         for (n = 0; n < PMC_CLASS_TABLE_SIZE; n++) {
1049                 pcd = pmc_class_table[n];
1050                 if (pcd != NULL && strncasecmp(ctrname, pcd->pm_evc_name,
1051                     pcd->pm_evc_name_size) == 0) {
1052                         if ((ev = pmc_match_event_class(ctrname +
1053                             pcd->pm_evc_name_size, pcd)) == NULL) {
1054                                 errno = EINVAL;
1055                                 goto out;
1056                         }
1057                         break;
1058                 }
1059         }
1060
1061         /*
1062          * Otherwise, search for this event in all compatible PMC
1063          * classes.
1064          */
1065         for (n = 0; ev == NULL && n < PMC_CLASS_TABLE_SIZE; n++) {
1066                 pcd = pmc_class_table[n];
1067                 if (pcd != NULL)
1068                         ev = pmc_match_event_class(ctrname, pcd);
1069         }
1070
1071         if (ev == NULL) {
1072                 errno = EINVAL;
1073                 goto out;
1074         }
1075
1076         pmc_config.pm_ev    = ev->pm_ev_code;
1077         pmc_config.pm_class = pcd->pm_evc_class;
1078
1079         if (pcd->pm_evc_allocate_pmc(ev->pm_ev_code, r, &pmc_config) < 0) {
1080                 errno = EINVAL;
1081                 goto out;
1082         }
1083
1084 found:
1085         if (PMC_CALL(PMCALLOCATE, &pmc_config) == 0) {
1086                 *pmcid = pmc_config.pm_pmcid;
1087                 retval = 0;
1088         }
1089 out:
1090         if (spec_copy)
1091                 free(spec_copy);
1092
1093         return (retval);
1094 }
1095
1096 int
1097 pmc_attach(pmc_id_t pmc, pid_t pid)
1098 {
1099         struct pmc_op_pmcattach pmc_attach_args;
1100
1101         pmc_attach_args.pm_pmc = pmc;
1102         pmc_attach_args.pm_pid = pid;
1103
1104         return (PMC_CALL(PMCATTACH, &pmc_attach_args));
1105 }
1106
1107 int
1108 pmc_capabilities(pmc_id_t pmcid, uint32_t *caps)
1109 {
1110         unsigned int i;
1111         enum pmc_class cl;
1112
1113         cl = PMC_ID_TO_CLASS(pmcid);
1114         for (i = 0; i < cpu_info.pm_nclass; i++)
1115                 if (cpu_info.pm_classes[i].pm_class == cl) {
1116                         *caps = cpu_info.pm_classes[i].pm_caps;
1117                         return (0);
1118                 }
1119         errno = EINVAL;
1120         return (-1);
1121 }
1122
1123 int
1124 pmc_configure_logfile(int fd)
1125 {
1126         struct pmc_op_configurelog cla;
1127
1128         cla.pm_logfd = fd;
1129         if (PMC_CALL(CONFIGURELOG, &cla) < 0)
1130                 return (-1);
1131         return (0);
1132 }
1133
1134 int
1135 pmc_cpuinfo(const struct pmc_cpuinfo **pci)
1136 {
1137         if (pmc_syscall == -1) {
1138                 errno = ENXIO;
1139                 return (-1);
1140         }
1141
1142         *pci = &cpu_info;
1143         return (0);
1144 }
1145
1146 int
1147 pmc_detach(pmc_id_t pmc, pid_t pid)
1148 {
1149         struct pmc_op_pmcattach pmc_detach_args;
1150
1151         pmc_detach_args.pm_pmc = pmc;
1152         pmc_detach_args.pm_pid = pid;
1153         return (PMC_CALL(PMCDETACH, &pmc_detach_args));
1154 }
1155
1156 int
1157 pmc_disable(int cpu, int pmc)
1158 {
1159         struct pmc_op_pmcadmin ssa;
1160
1161         ssa.pm_cpu = cpu;
1162         ssa.pm_pmc = pmc;
1163         ssa.pm_state = PMC_STATE_DISABLED;
1164         return (PMC_CALL(PMCADMIN, &ssa));
1165 }
1166
1167 int
1168 pmc_enable(int cpu, int pmc)
1169 {
1170         struct pmc_op_pmcadmin ssa;
1171
1172         ssa.pm_cpu = cpu;
1173         ssa.pm_pmc = pmc;
1174         ssa.pm_state = PMC_STATE_FREE;
1175         return (PMC_CALL(PMCADMIN, &ssa));
1176 }
1177
1178 /*
1179  * Return a list of events known to a given PMC class.  'cl' is the
1180  * PMC class identifier, 'eventnames' is the returned list of 'const
1181  * char *' pointers pointing to the names of the events. 'nevents' is
1182  * the number of event name pointers returned.
1183  *
1184  * The space for 'eventnames' is allocated using malloc(3).  The caller
1185  * is responsible for freeing this space when done.
1186  */
1187 int
1188 pmc_event_names_of_class(enum pmc_class cl, const char ***eventnames,
1189     int *nevents)
1190 {
1191         int count;
1192         const char **names;
1193         const struct pmc_event_descr *ev;
1194
1195         switch (cl)
1196         {
1197         case PMC_CLASS_IAF:
1198                 ev = iaf_event_table;
1199                 count = PMC_EVENT_TABLE_SIZE(iaf);
1200                 break;
1201         case PMC_CLASS_TSC:
1202                 ev = tsc_event_table;
1203                 count = PMC_EVENT_TABLE_SIZE(tsc);
1204                 break;
1205         case PMC_CLASS_K8:
1206                 ev = k8_event_table;
1207                 count = PMC_EVENT_TABLE_SIZE(k8);
1208                 break;
1209         case PMC_CLASS_ARMV7:
1210                 switch (cpu_info.pm_cputype) {
1211                 default:
1212                 case PMC_CPU_ARMV7_CORTEX_A8:
1213                         ev = cortex_a8_event_table;
1214                         count = PMC_EVENT_TABLE_SIZE(cortex_a8);
1215                         break;
1216                 case PMC_CPU_ARMV7_CORTEX_A9:
1217                         ev = cortex_a9_event_table;
1218                         count = PMC_EVENT_TABLE_SIZE(cortex_a9);
1219                         break;
1220                 }
1221                 break;
1222         case PMC_CLASS_ARMV8:
1223                 switch (cpu_info.pm_cputype) {
1224                 default:
1225                 case PMC_CPU_ARMV8_CORTEX_A53:
1226                         ev = cortex_a53_event_table;
1227                         count = PMC_EVENT_TABLE_SIZE(cortex_a53);
1228                         break;
1229                 case PMC_CPU_ARMV8_CORTEX_A57:
1230                         ev = cortex_a57_event_table;
1231                         count = PMC_EVENT_TABLE_SIZE(cortex_a57);
1232                         break;
1233                 case PMC_CPU_ARMV8_CORTEX_A76:
1234                         ev = cortex_a76_event_table;
1235                         count = PMC_EVENT_TABLE_SIZE(cortex_a76);
1236                         break;
1237                 }
1238                 break;
1239         case PMC_CLASS_BERI:
1240                 ev = beri_event_table;
1241                 count = PMC_EVENT_TABLE_SIZE(beri);
1242                 break;
1243         case PMC_CLASS_MIPS24K:
1244                 ev = mips24k_event_table;
1245                 count = PMC_EVENT_TABLE_SIZE(mips24k);
1246                 break;
1247         case PMC_CLASS_MIPS74K:
1248                 ev = mips74k_event_table;
1249                 count = PMC_EVENT_TABLE_SIZE(mips74k);
1250                 break;
1251         case PMC_CLASS_OCTEON:
1252                 ev = octeon_event_table;
1253                 count = PMC_EVENT_TABLE_SIZE(octeon);
1254                 break;
1255         case PMC_CLASS_PPC7450:
1256                 ev = ppc7450_event_table;
1257                 count = PMC_EVENT_TABLE_SIZE(ppc7450);
1258                 break;
1259         case PMC_CLASS_PPC970:
1260                 ev = ppc970_event_table;
1261                 count = PMC_EVENT_TABLE_SIZE(ppc970);
1262                 break;
1263         case PMC_CLASS_POWER8:
1264                 ev = power8_event_table;
1265                 count = PMC_EVENT_TABLE_SIZE(power8);
1266                 break;
1267         case PMC_CLASS_E500:
1268                 ev = e500_event_table;
1269                 count = PMC_EVENT_TABLE_SIZE(e500);
1270                 break;
1271         case PMC_CLASS_SOFT:
1272                 ev = soft_event_table;
1273                 count = soft_event_info.pm_nevent;
1274                 break;
1275         default:
1276                 errno = EINVAL;
1277                 return (-1);
1278         }
1279
1280         if ((names = malloc(count * sizeof(const char *))) == NULL)
1281                 return (-1);
1282
1283         *eventnames = names;
1284         *nevents = count;
1285
1286         for (;count--; ev++, names++)
1287                 *names = ev->pm_ev_name;
1288
1289         return (0);
1290 }
1291
1292 int
1293 pmc_flush_logfile(void)
1294 {
1295         return (PMC_CALL(FLUSHLOG,0));
1296 }
1297
1298 int
1299 pmc_close_logfile(void)
1300 {
1301         return (PMC_CALL(CLOSELOG,0));
1302 }
1303
1304 int
1305 pmc_get_driver_stats(struct pmc_driverstats *ds)
1306 {
1307         struct pmc_op_getdriverstats gms;
1308
1309         if (PMC_CALL(GETDRIVERSTATS, &gms) < 0)
1310                 return (-1);
1311
1312         /* copy out fields in the current userland<->library interface */
1313         ds->pm_intr_ignored    = gms.pm_intr_ignored;
1314         ds->pm_intr_processed  = gms.pm_intr_processed;
1315         ds->pm_intr_bufferfull = gms.pm_intr_bufferfull;
1316         ds->pm_syscalls        = gms.pm_syscalls;
1317         ds->pm_syscall_errors  = gms.pm_syscall_errors;
1318         ds->pm_buffer_requests = gms.pm_buffer_requests;
1319         ds->pm_buffer_requests_failed = gms.pm_buffer_requests_failed;
1320         ds->pm_log_sweeps      = gms.pm_log_sweeps;
1321         return (0);
1322 }
1323
1324 int
1325 pmc_get_msr(pmc_id_t pmc, uint32_t *msr)
1326 {
1327         struct pmc_op_getmsr gm;
1328
1329         gm.pm_pmcid = pmc;
1330         if (PMC_CALL(PMCGETMSR, &gm) < 0)
1331                 return (-1);
1332         *msr = gm.pm_msr;
1333         return (0);
1334 }
1335
1336 int
1337 pmc_init(void)
1338 {
1339         int error, pmc_mod_id;
1340         unsigned int n;
1341         uint32_t abi_version;
1342         struct module_stat pmc_modstat;
1343         struct pmc_op_getcpuinfo op_cpu_info;
1344
1345         if (pmc_syscall != -1) /* already inited */
1346                 return (0);
1347
1348         /* retrieve the system call number from the KLD */
1349         if ((pmc_mod_id = modfind(PMC_MODULE_NAME)) < 0)
1350                 return (-1);
1351
1352         pmc_modstat.version = sizeof(struct module_stat);
1353         if ((error = modstat(pmc_mod_id, &pmc_modstat)) < 0)
1354                 return (-1);
1355
1356         pmc_syscall = pmc_modstat.data.intval;
1357
1358         /* check the kernel module's ABI against our compiled-in version */
1359         abi_version = PMC_VERSION;
1360         if (PMC_CALL(GETMODULEVERSION, &abi_version) < 0)
1361                 return (pmc_syscall = -1);
1362
1363         /* ignore patch & minor numbers for the comparison */
1364         if ((abi_version & 0xFF000000) != (PMC_VERSION & 0xFF000000)) {
1365                 errno  = EPROGMISMATCH;
1366                 return (pmc_syscall = -1);
1367         }
1368
1369         bzero(&op_cpu_info, sizeof(op_cpu_info));
1370         if (PMC_CALL(GETCPUINFO, &op_cpu_info) < 0)
1371                 return (pmc_syscall = -1);
1372
1373         cpu_info.pm_cputype = op_cpu_info.pm_cputype;
1374         cpu_info.pm_ncpu    = op_cpu_info.pm_ncpu;
1375         cpu_info.pm_npmc    = op_cpu_info.pm_npmc;
1376         cpu_info.pm_nclass  = op_cpu_info.pm_nclass;
1377         for (n = 0; n < op_cpu_info.pm_nclass; n++)
1378                 memcpy(&cpu_info.pm_classes[n], &op_cpu_info.pm_classes[n],
1379                     sizeof(cpu_info.pm_classes[n]));
1380
1381         pmc_class_table = malloc(PMC_CLASS_TABLE_SIZE *
1382             sizeof(struct pmc_class_descr *));
1383
1384         if (pmc_class_table == NULL)
1385                 return (-1);
1386
1387         for (n = 0; n < PMC_CLASS_TABLE_SIZE; n++)
1388                 pmc_class_table[n] = NULL;
1389
1390         /*
1391          * Get soft events list.
1392          */
1393         soft_event_info.pm_class = PMC_CLASS_SOFT;
1394         if (PMC_CALL(GETDYNEVENTINFO, &soft_event_info) < 0)
1395                 return (pmc_syscall = -1);
1396
1397         /* Map soft events to static list. */
1398         for (n = 0; n < soft_event_info.pm_nevent; n++) {
1399                 soft_event_table[n].pm_ev_name =
1400                     soft_event_info.pm_events[n].pm_ev_name;
1401                 soft_event_table[n].pm_ev_code =
1402                     soft_event_info.pm_events[n].pm_ev_code;
1403         }
1404         soft_class_table_descr.pm_evc_event_table_size = \
1405             soft_event_info.pm_nevent;
1406         soft_class_table_descr.pm_evc_event_table = \
1407             soft_event_table;
1408
1409         /*
1410          * Fill in the class table.
1411          */
1412         n = 0;
1413
1414         /* Fill soft events information. */
1415         pmc_class_table[n++] = &soft_class_table_descr;
1416 #if defined(__amd64__) || defined(__i386__)
1417         if (cpu_info.pm_cputype != PMC_CPU_GENERIC)
1418                 pmc_class_table[n++] = &tsc_class_table_descr;
1419 #endif
1420
1421 #define PMC_MDEP_INIT(C) pmc_mdep_event_aliases = C##_aliases
1422
1423         /* Configure the event name parser. */
1424         switch (cpu_info.pm_cputype) {
1425 #if defined(__amd64__) || defined(__i386__)
1426         case PMC_CPU_AMD_K8:
1427                 PMC_MDEP_INIT(k8);
1428                 pmc_class_table[n] = &k8_class_table_descr;
1429                 break;
1430 #endif
1431         case PMC_CPU_GENERIC:
1432                 PMC_MDEP_INIT(generic);
1433                 break;
1434 #if defined(__arm__)
1435         case PMC_CPU_ARMV7_CORTEX_A8:
1436                 PMC_MDEP_INIT(cortex_a8);
1437                 pmc_class_table[n] = &cortex_a8_class_table_descr;
1438                 break;
1439         case PMC_CPU_ARMV7_CORTEX_A9:
1440                 PMC_MDEP_INIT(cortex_a9);
1441                 pmc_class_table[n] = &cortex_a9_class_table_descr;
1442                 break;
1443 #endif
1444 #if defined(__aarch64__)
1445         case PMC_CPU_ARMV8_CORTEX_A53:
1446                 PMC_MDEP_INIT(cortex_a53);
1447                 pmc_class_table[n] = &cortex_a53_class_table_descr;
1448                 break;
1449         case PMC_CPU_ARMV8_CORTEX_A57:
1450                 PMC_MDEP_INIT(cortex_a57);
1451                 pmc_class_table[n] = &cortex_a57_class_table_descr;
1452                 break;
1453         case PMC_CPU_ARMV8_CORTEX_A76:
1454                 PMC_MDEP_INIT(cortex_a76);
1455                 pmc_class_table[n] = &cortex_a76_class_table_descr;
1456                 break;
1457 #endif
1458 #if defined(__mips__)
1459         case PMC_CPU_MIPS_BERI:
1460                 PMC_MDEP_INIT(beri);
1461                 pmc_class_table[n] = &beri_class_table_descr;
1462                 break;
1463         case PMC_CPU_MIPS_24K:
1464                 PMC_MDEP_INIT(mips24k);
1465                 pmc_class_table[n] = &mips24k_class_table_descr;
1466                 break;
1467         case PMC_CPU_MIPS_74K:
1468                 PMC_MDEP_INIT(mips74k);
1469                 pmc_class_table[n] = &mips74k_class_table_descr;
1470                 break;
1471         case PMC_CPU_MIPS_OCTEON:
1472                 PMC_MDEP_INIT(octeon);
1473                 pmc_class_table[n] = &octeon_class_table_descr;
1474                 break;
1475 #endif /* __mips__ */
1476 #if defined(__powerpc__)
1477         case PMC_CPU_PPC_7450:
1478                 PMC_MDEP_INIT(ppc7450);
1479                 pmc_class_table[n] = &ppc7450_class_table_descr;
1480                 break;
1481         case PMC_CPU_PPC_970:
1482                 PMC_MDEP_INIT(ppc970);
1483                 pmc_class_table[n] = &ppc970_class_table_descr;
1484                 break;
1485         case PMC_CPU_PPC_POWER8:
1486                 PMC_MDEP_INIT(power8);
1487                 pmc_class_table[n] = &power8_class_table_descr;
1488                 break;
1489         case PMC_CPU_PPC_E500:
1490                 PMC_MDEP_INIT(e500);
1491                 pmc_class_table[n] = &e500_class_table_descr;
1492                 break;
1493 #endif
1494         default:
1495                 /*
1496                  * Some kind of CPU this version of the library knows nothing
1497                  * about.  This shouldn't happen since the abi version check
1498                  * should have caught this.
1499                  */
1500 #if defined(__amd64__) || defined(__i386__)
1501                 break;
1502 #endif
1503                 errno = ENXIO;
1504                 return (pmc_syscall = -1);
1505         }
1506
1507         return (0);
1508 }
1509
1510 const char *
1511 pmc_name_of_capability(enum pmc_caps cap)
1512 {
1513         int i;
1514
1515         /*
1516          * 'cap' should have a single bit set and should be in
1517          * range.
1518          */
1519         if ((cap & (cap - 1)) || cap < PMC_CAP_FIRST ||
1520             cap > PMC_CAP_LAST) {
1521                 errno = EINVAL;
1522                 return (NULL);
1523         }
1524
1525         i = ffs(cap);
1526         return (pmc_capability_names[i - 1]);
1527 }
1528
1529 const char *
1530 pmc_name_of_class(enum pmc_class pc)
1531 {
1532         size_t n;
1533
1534         for (n = 0; n < PMC_TABLE_SIZE(pmc_class_names); n++)
1535                 if (pc == pmc_class_names[n].pm_class)
1536                         return (pmc_class_names[n].pm_name);
1537
1538         errno = EINVAL;
1539         return (NULL);
1540 }
1541
1542 const char *
1543 pmc_name_of_cputype(enum pmc_cputype cp)
1544 {
1545         size_t n;
1546
1547         for (n = 0; n < PMC_TABLE_SIZE(pmc_cputype_names); n++)
1548                 if (cp == pmc_cputype_names[n].pm_cputype)
1549                         return (pmc_cputype_names[n].pm_name);
1550
1551         errno = EINVAL;
1552         return (NULL);
1553 }
1554
1555 const char *
1556 pmc_name_of_disposition(enum pmc_disp pd)
1557 {
1558         if ((int) pd >= PMC_DISP_FIRST &&
1559             pd <= PMC_DISP_LAST)
1560                 return (pmc_disposition_names[pd]);
1561
1562         errno = EINVAL;
1563         return (NULL);
1564 }
1565
1566 const char *
1567 _pmc_name_of_event(enum pmc_event pe, enum pmc_cputype cpu)
1568 {
1569         const struct pmc_event_descr *ev, *evfence;
1570
1571         ev = evfence = NULL;
1572         if (pe >= PMC_EV_K8_FIRST && pe <= PMC_EV_K8_LAST) {
1573                 ev = k8_event_table;
1574                 evfence = k8_event_table + PMC_EVENT_TABLE_SIZE(k8);
1575
1576         } else if (pe >= PMC_EV_ARMV7_FIRST && pe <= PMC_EV_ARMV7_LAST) {
1577                 switch (cpu) {
1578                 case PMC_CPU_ARMV7_CORTEX_A8:
1579                         ev = cortex_a8_event_table;
1580                         evfence = cortex_a8_event_table + PMC_EVENT_TABLE_SIZE(cortex_a8);
1581                         break;
1582                 case PMC_CPU_ARMV7_CORTEX_A9:
1583                         ev = cortex_a9_event_table;
1584                         evfence = cortex_a9_event_table + PMC_EVENT_TABLE_SIZE(cortex_a9);
1585                         break;
1586                 default:        /* Unknown CPU type. */
1587                         break;
1588                 }
1589         } else if (pe >= PMC_EV_ARMV8_FIRST && pe <= PMC_EV_ARMV8_LAST) {
1590                 switch (cpu) {
1591                 case PMC_CPU_ARMV8_CORTEX_A53:
1592                         ev = cortex_a53_event_table;
1593                         evfence = cortex_a53_event_table + PMC_EVENT_TABLE_SIZE(cortex_a53);
1594                         break;
1595                 case PMC_CPU_ARMV8_CORTEX_A57:
1596                         ev = cortex_a57_event_table;
1597                         evfence = cortex_a57_event_table + PMC_EVENT_TABLE_SIZE(cortex_a57);
1598                         break;
1599                 case PMC_CPU_ARMV8_CORTEX_A76:
1600                         ev = cortex_a76_event_table;
1601                         evfence = cortex_a76_event_table + PMC_EVENT_TABLE_SIZE(cortex_a76);
1602                         break;
1603                 default:        /* Unknown CPU type. */
1604                         break;
1605                 }
1606         } else if (pe >= PMC_EV_BERI_FIRST && pe <= PMC_EV_BERI_LAST) {
1607                 ev = beri_event_table;
1608                 evfence = beri_event_table + PMC_EVENT_TABLE_SIZE(beri);
1609         } else if (pe >= PMC_EV_MIPS24K_FIRST && pe <= PMC_EV_MIPS24K_LAST) {
1610                 ev = mips24k_event_table;
1611                 evfence = mips24k_event_table + PMC_EVENT_TABLE_SIZE(mips24k);
1612         } else if (pe >= PMC_EV_MIPS74K_FIRST && pe <= PMC_EV_MIPS74K_LAST) {
1613                 ev = mips74k_event_table;
1614                 evfence = mips74k_event_table + PMC_EVENT_TABLE_SIZE(mips74k);
1615         } else if (pe >= PMC_EV_OCTEON_FIRST && pe <= PMC_EV_OCTEON_LAST) {
1616                 ev = octeon_event_table;
1617                 evfence = octeon_event_table + PMC_EVENT_TABLE_SIZE(octeon);
1618         } else if (pe >= PMC_EV_PPC7450_FIRST && pe <= PMC_EV_PPC7450_LAST) {
1619                 ev = ppc7450_event_table;
1620                 evfence = ppc7450_event_table + PMC_EVENT_TABLE_SIZE(ppc7450);
1621         } else if (pe >= PMC_EV_PPC970_FIRST && pe <= PMC_EV_PPC970_LAST) {
1622                 ev = ppc970_event_table;
1623                 evfence = ppc970_event_table + PMC_EVENT_TABLE_SIZE(ppc970);
1624         } else if (pe >= PMC_EV_POWER8_FIRST && pe <= PMC_EV_POWER8_LAST) {
1625                 ev = power8_event_table;
1626                 evfence = power8_event_table + PMC_EVENT_TABLE_SIZE(power8);
1627         } else if (pe >= PMC_EV_E500_FIRST && pe <= PMC_EV_E500_LAST) {
1628                 ev = e500_event_table;
1629                 evfence = e500_event_table + PMC_EVENT_TABLE_SIZE(e500);
1630         } else if (pe == PMC_EV_TSC_TSC) {
1631                 ev = tsc_event_table;
1632                 evfence = tsc_event_table + PMC_EVENT_TABLE_SIZE(tsc);
1633         } else if ((int)pe >= PMC_EV_SOFT_FIRST && (int)pe <= PMC_EV_SOFT_LAST) {
1634                 ev = soft_event_table;
1635                 evfence = soft_event_table + soft_event_info.pm_nevent;
1636         }
1637
1638         for (; ev != evfence; ev++)
1639                 if (pe == ev->pm_ev_code)
1640                         return (ev->pm_ev_name);
1641
1642         return (NULL);
1643 }
1644
1645 const char *
1646 pmc_name_of_event(enum pmc_event pe)
1647 {
1648         const char *n;
1649
1650         if ((n = _pmc_name_of_event(pe, cpu_info.pm_cputype)) != NULL)
1651                 return (n);
1652
1653         errno = EINVAL;
1654         return (NULL);
1655 }
1656
1657 const char *
1658 pmc_name_of_mode(enum pmc_mode pm)
1659 {
1660         if ((int) pm >= PMC_MODE_FIRST &&
1661             pm <= PMC_MODE_LAST)
1662                 return (pmc_mode_names[pm]);
1663
1664         errno = EINVAL;
1665         return (NULL);
1666 }
1667
1668 const char *
1669 pmc_name_of_state(enum pmc_state ps)
1670 {
1671         if ((int) ps >= PMC_STATE_FIRST &&
1672             ps <= PMC_STATE_LAST)
1673                 return (pmc_state_names[ps]);
1674
1675         errno = EINVAL;
1676         return (NULL);
1677 }
1678
1679 int
1680 pmc_ncpu(void)
1681 {
1682         if (pmc_syscall == -1) {
1683                 errno = ENXIO;
1684                 return (-1);
1685         }
1686
1687         return (cpu_info.pm_ncpu);
1688 }
1689
1690 int
1691 pmc_npmc(int cpu)
1692 {
1693         if (pmc_syscall == -1) {
1694                 errno = ENXIO;
1695                 return (-1);
1696         }
1697
1698         if (cpu < 0 || cpu >= (int) cpu_info.pm_ncpu) {
1699                 errno = EINVAL;
1700                 return (-1);
1701         }
1702
1703         return (cpu_info.pm_npmc);
1704 }
1705
1706 int
1707 pmc_pmcinfo(int cpu, struct pmc_pmcinfo **ppmci)
1708 {
1709         int nbytes, npmc;
1710         struct pmc_op_getpmcinfo *pmci;
1711
1712         if ((npmc = pmc_npmc(cpu)) < 0)
1713                 return (-1);
1714
1715         nbytes = sizeof(struct pmc_op_getpmcinfo) +
1716             npmc * sizeof(struct pmc_info);
1717
1718         if ((pmci = calloc(1, nbytes)) == NULL)
1719                 return (-1);
1720
1721         pmci->pm_cpu  = cpu;
1722
1723         if (PMC_CALL(GETPMCINFO, pmci) < 0) {
1724                 free(pmci);
1725                 return (-1);
1726         }
1727
1728         /* kernel<->library, library<->userland interfaces are identical */
1729         *ppmci = (struct pmc_pmcinfo *) pmci;
1730         return (0);
1731 }
1732
1733 int
1734 pmc_read(pmc_id_t pmc, pmc_value_t *value)
1735 {
1736         struct pmc_op_pmcrw pmc_read_op;
1737
1738         pmc_read_op.pm_pmcid = pmc;
1739         pmc_read_op.pm_flags = PMC_F_OLDVALUE;
1740         pmc_read_op.pm_value = -1;
1741
1742         if (PMC_CALL(PMCRW, &pmc_read_op) < 0)
1743                 return (-1);
1744
1745         *value = pmc_read_op.pm_value;
1746         return (0);
1747 }
1748
1749 int
1750 pmc_release(pmc_id_t pmc)
1751 {
1752         struct pmc_op_simple    pmc_release_args;
1753
1754         pmc_release_args.pm_pmcid = pmc;
1755         return (PMC_CALL(PMCRELEASE, &pmc_release_args));
1756 }
1757
1758 int
1759 pmc_rw(pmc_id_t pmc, pmc_value_t newvalue, pmc_value_t *oldvaluep)
1760 {
1761         struct pmc_op_pmcrw pmc_rw_op;
1762
1763         pmc_rw_op.pm_pmcid = pmc;
1764         pmc_rw_op.pm_flags = PMC_F_NEWVALUE | PMC_F_OLDVALUE;
1765         pmc_rw_op.pm_value = newvalue;
1766
1767         if (PMC_CALL(PMCRW, &pmc_rw_op) < 0)
1768                 return (-1);
1769
1770         *oldvaluep = pmc_rw_op.pm_value;
1771         return (0);
1772 }
1773
1774 int
1775 pmc_set(pmc_id_t pmc, pmc_value_t value)
1776 {
1777         struct pmc_op_pmcsetcount sc;
1778
1779         sc.pm_pmcid = pmc;
1780         sc.pm_count = value;
1781
1782         if (PMC_CALL(PMCSETCOUNT, &sc) < 0)
1783                 return (-1);
1784         return (0);
1785 }
1786
1787 int
1788 pmc_start(pmc_id_t pmc)
1789 {
1790         struct pmc_op_simple    pmc_start_args;
1791
1792         pmc_start_args.pm_pmcid = pmc;
1793         return (PMC_CALL(PMCSTART, &pmc_start_args));
1794 }
1795
1796 int
1797 pmc_stop(pmc_id_t pmc)
1798 {
1799         struct pmc_op_simple    pmc_stop_args;
1800
1801         pmc_stop_args.pm_pmcid = pmc;
1802         return (PMC_CALL(PMCSTOP, &pmc_stop_args));
1803 }
1804
1805 int
1806 pmc_width(pmc_id_t pmcid, uint32_t *width)
1807 {
1808         unsigned int i;
1809         enum pmc_class cl;
1810
1811         cl = PMC_ID_TO_CLASS(pmcid);
1812         for (i = 0; i < cpu_info.pm_nclass; i++)
1813                 if (cpu_info.pm_classes[i].pm_class == cl) {
1814                         *width = cpu_info.pm_classes[i].pm_width;
1815                         return (0);
1816                 }
1817         errno = EINVAL;
1818         return (-1);
1819 }
1820
1821 int
1822 pmc_write(pmc_id_t pmc, pmc_value_t value)
1823 {
1824         struct pmc_op_pmcrw pmc_write_op;
1825
1826         pmc_write_op.pm_pmcid = pmc;
1827         pmc_write_op.pm_flags = PMC_F_NEWVALUE;
1828         pmc_write_op.pm_value = value;
1829         return (PMC_CALL(PMCRW, &pmc_write_op));
1830 }
1831
1832 int
1833 pmc_writelog(uint32_t userdata)
1834 {
1835         struct pmc_op_writelog wl;
1836
1837         wl.pm_userdata = userdata;
1838         return (PMC_CALL(WRITELOG, &wl));
1839 }