2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2003-2008 Joseph Koshy
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/types.h>
33 #include <sys/param.h>
34 #include <sys/module.h>
36 #include <sys/syscall.h>
50 #include "libpmcinternal.h"
52 /* Function prototypes */
53 #if defined(__amd64__) || defined(__i386__)
54 static int k8_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
55 struct pmc_op_pmcallocate *_pmc_config);
57 #if defined(__amd64__) || defined(__i386__)
58 static int tsc_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
59 struct pmc_op_pmcallocate *_pmc_config);
62 #if defined(__XSCALE__)
63 static int xscale_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
64 struct pmc_op_pmcallocate *_pmc_config);
66 static int armv7_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
67 struct pmc_op_pmcallocate *_pmc_config);
69 #if defined(__aarch64__)
70 static int arm64_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
71 struct pmc_op_pmcallocate *_pmc_config);
74 static int mips_allocate_pmc(enum pmc_event _pe, char* ctrspec,
75 struct pmc_op_pmcallocate *_pmc_config);
77 static int soft_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
78 struct pmc_op_pmcallocate *_pmc_config);
80 #if defined(__powerpc__)
81 static int powerpc_allocate_pmc(enum pmc_event _pe, char* ctrspec,
82 struct pmc_op_pmcallocate *_pmc_config);
83 #endif /* __powerpc__ */
85 #define PMC_CALL(cmd, params) \
86 syscall(pmc_syscall, PMC_OP_##cmd, (params))
89 * Event aliases provide a way for the user to ask for generic events
90 * like "cache-misses", or "instructions-retired". These aliases are
91 * mapped to the appropriate canonical event descriptions using a
94 struct pmc_event_alias {
99 static const struct pmc_event_alias *pmc_mdep_event_aliases;
102 * The pmc_event_descr structure maps symbolic names known to the user
103 * to integer codes used by the PMC KLD.
105 struct pmc_event_descr {
106 const char *pm_ev_name;
107 enum pmc_event pm_ev_code;
111 * The pmc_class_descr structure maps class name prefixes for
112 * event names to event tables and other PMC class data.
114 struct pmc_class_descr {
115 const char *pm_evc_name;
116 size_t pm_evc_name_size;
117 enum pmc_class pm_evc_class;
118 const struct pmc_event_descr *pm_evc_event_table;
119 size_t pm_evc_event_table_size;
120 int (*pm_evc_allocate_pmc)(enum pmc_event _pe,
121 char *_ctrspec, struct pmc_op_pmcallocate *_pa);
124 #define PMC_TABLE_SIZE(N) (sizeof(N)/sizeof(N[0]))
125 #define PMC_EVENT_TABLE_SIZE(N) PMC_TABLE_SIZE(N##_event_table)
128 #define __PMC_EV(C,N) { #N, PMC_EV_ ## C ## _ ## N },
131 * PMC_CLASSDEP_TABLE(NAME, CLASS)
133 * Define a table mapping event names and aliases to HWPMC event IDs.
135 #define PMC_CLASSDEP_TABLE(N, C) \
136 static const struct pmc_event_descr N##_event_table[] = \
141 PMC_CLASSDEP_TABLE(iaf, IAF);
142 PMC_CLASSDEP_TABLE(k8, K8);
143 PMC_CLASSDEP_TABLE(xscale, XSCALE);
144 PMC_CLASSDEP_TABLE(armv7, ARMV7);
145 PMC_CLASSDEP_TABLE(armv8, ARMV8);
146 PMC_CLASSDEP_TABLE(beri, BERI);
147 PMC_CLASSDEP_TABLE(mips24k, MIPS24K);
148 PMC_CLASSDEP_TABLE(mips74k, MIPS74K);
149 PMC_CLASSDEP_TABLE(octeon, OCTEON);
150 PMC_CLASSDEP_TABLE(ppc7450, PPC7450);
151 PMC_CLASSDEP_TABLE(ppc970, PPC970);
152 PMC_CLASSDEP_TABLE(power8, POWER8);
153 PMC_CLASSDEP_TABLE(e500, E500);
155 static struct pmc_event_descr soft_event_table[PMC_EV_DYN_COUNT];
157 #undef __PMC_EV_ALIAS
158 #define __PMC_EV_ALIAS(N,CODE) { N, PMC_EV_##CODE },
160 static const struct pmc_event_descr cortex_a8_event_table[] =
162 __PMC_EV_ALIAS_ARMV7_CORTEX_A8()
165 static const struct pmc_event_descr cortex_a9_event_table[] =
167 __PMC_EV_ALIAS_ARMV7_CORTEX_A9()
170 static const struct pmc_event_descr cortex_a53_event_table[] =
172 __PMC_EV_ALIAS_ARMV8_CORTEX_A53()
175 static const struct pmc_event_descr cortex_a57_event_table[] =
177 __PMC_EV_ALIAS_ARMV8_CORTEX_A57()
180 static const struct pmc_event_descr cortex_a76_event_table[] =
182 __PMC_EV_ALIAS_ARMV8_CORTEX_A76()
186 * PMC_MDEP_TABLE(NAME, PRIMARYCLASS, ADDITIONAL_CLASSES...)
188 * Map a CPU to the PMC classes it supports.
190 #define PMC_MDEP_TABLE(N,C,...) \
191 static const enum pmc_class N##_pmc_classes[] = { \
192 PMC_CLASS_##C, __VA_ARGS__ \
195 PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC);
196 PMC_MDEP_TABLE(xscale, XSCALE, PMC_CLASS_SOFT, PMC_CLASS_XSCALE);
197 PMC_MDEP_TABLE(beri, BERI, PMC_CLASS_SOFT, PMC_CLASS_BERI);
198 PMC_MDEP_TABLE(cortex_a8, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7);
199 PMC_MDEP_TABLE(cortex_a9, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7);
200 PMC_MDEP_TABLE(cortex_a53, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
201 PMC_MDEP_TABLE(cortex_a57, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
202 PMC_MDEP_TABLE(cortex_a76, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
203 PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_SOFT, PMC_CLASS_MIPS24K);
204 PMC_MDEP_TABLE(mips74k, MIPS74K, PMC_CLASS_SOFT, PMC_CLASS_MIPS74K);
205 PMC_MDEP_TABLE(octeon, OCTEON, PMC_CLASS_SOFT, PMC_CLASS_OCTEON);
206 PMC_MDEP_TABLE(ppc7450, PPC7450, PMC_CLASS_SOFT, PMC_CLASS_PPC7450, PMC_CLASS_TSC);
207 PMC_MDEP_TABLE(ppc970, PPC970, PMC_CLASS_SOFT, PMC_CLASS_PPC970, PMC_CLASS_TSC);
208 PMC_MDEP_TABLE(power8, POWER8, PMC_CLASS_SOFT, PMC_CLASS_POWER8, PMC_CLASS_TSC);
209 PMC_MDEP_TABLE(e500, E500, PMC_CLASS_SOFT, PMC_CLASS_E500, PMC_CLASS_TSC);
210 PMC_MDEP_TABLE(generic, SOFT, PMC_CLASS_SOFT);
212 static const struct pmc_event_descr tsc_event_table[] =
217 #undef PMC_CLASS_TABLE_DESC
218 #define PMC_CLASS_TABLE_DESC(NAME, CLASS, EVENTS, ALLOCATOR) \
219 static const struct pmc_class_descr NAME##_class_table_descr = \
221 .pm_evc_name = #CLASS "-", \
222 .pm_evc_name_size = sizeof(#CLASS "-") - 1, \
223 .pm_evc_class = PMC_CLASS_##CLASS , \
224 .pm_evc_event_table = EVENTS##_event_table , \
225 .pm_evc_event_table_size = \
226 PMC_EVENT_TABLE_SIZE(EVENTS), \
227 .pm_evc_allocate_pmc = ALLOCATOR##_allocate_pmc \
230 #if defined(__i386__) || defined(__amd64__)
231 PMC_CLASS_TABLE_DESC(k8, K8, k8, k8);
233 #if defined(__i386__) || defined(__amd64__)
234 PMC_CLASS_TABLE_DESC(tsc, TSC, tsc, tsc);
237 #if defined(__XSCALE__)
238 PMC_CLASS_TABLE_DESC(xscale, XSCALE, xscale, xscale);
240 PMC_CLASS_TABLE_DESC(cortex_a8, ARMV7, cortex_a8, armv7);
241 PMC_CLASS_TABLE_DESC(cortex_a9, ARMV7, cortex_a9, armv7);
243 #if defined(__aarch64__)
244 PMC_CLASS_TABLE_DESC(cortex_a53, ARMV8, cortex_a53, arm64);
245 PMC_CLASS_TABLE_DESC(cortex_a57, ARMV8, cortex_a57, arm64);
246 PMC_CLASS_TABLE_DESC(cortex_a76, ARMV8, cortex_a76, arm64);
248 #if defined(__mips__)
249 PMC_CLASS_TABLE_DESC(beri, BERI, beri, mips);
250 PMC_CLASS_TABLE_DESC(mips24k, MIPS24K, mips24k, mips);
251 PMC_CLASS_TABLE_DESC(mips74k, MIPS74K, mips74k, mips);
252 PMC_CLASS_TABLE_DESC(octeon, OCTEON, octeon, mips);
253 #endif /* __mips__ */
254 #if defined(__powerpc__)
255 PMC_CLASS_TABLE_DESC(ppc7450, PPC7450, ppc7450, powerpc);
256 PMC_CLASS_TABLE_DESC(ppc970, PPC970, ppc970, powerpc);
257 PMC_CLASS_TABLE_DESC(power8, POWER8, power8, powerpc);
258 PMC_CLASS_TABLE_DESC(e500, E500, e500, powerpc);
261 static struct pmc_class_descr soft_class_table_descr =
263 .pm_evc_name = "SOFT-",
264 .pm_evc_name_size = sizeof("SOFT-") - 1,
265 .pm_evc_class = PMC_CLASS_SOFT,
266 .pm_evc_event_table = NULL,
267 .pm_evc_event_table_size = 0,
268 .pm_evc_allocate_pmc = soft_allocate_pmc
271 #undef PMC_CLASS_TABLE_DESC
273 static const struct pmc_class_descr **pmc_class_table;
274 #define PMC_CLASS_TABLE_SIZE cpu_info.pm_nclass
276 static const enum pmc_class *pmc_mdep_class_list;
277 static size_t pmc_mdep_class_list_size;
280 * Mapping tables, mapping enumeration values to human readable
284 static const char * pmc_capability_names[] = {
286 #define __PMC_CAP(N,V,D) #N ,
290 struct pmc_class_map {
291 enum pmc_class pm_class;
295 static const struct pmc_class_map pmc_class_names[] = {
297 #define __PMC_CLASS(S,V,D) { .pm_class = PMC_CLASS_##S, .pm_name = #S } ,
301 struct pmc_cputype_map {
302 enum pmc_cputype pm_cputype;
306 static const struct pmc_cputype_map pmc_cputype_names[] = {
308 #define __PMC_CPU(S, V, D) { .pm_cputype = PMC_CPU_##S, .pm_name = #S } ,
312 static const char * pmc_disposition_names[] = {
314 #define __PMC_DISP(D) #D ,
318 static const char * pmc_mode_names[] = {
320 #define __PMC_MODE(M,N) #M ,
324 static const char * pmc_state_names[] = {
326 #define __PMC_STATE(S) #S ,
331 * Filled in by pmc_init().
333 static int pmc_syscall = -1;
334 static struct pmc_cpuinfo cpu_info;
335 static struct pmc_op_getdyneventinfo soft_event_info;
337 /* Event masks for events */
340 const uint64_t pm_value;
342 #define PMCMASK(N,V) { .pm_name = #N, .pm_value = (V) }
343 #define NULLMASK { .pm_name = NULL }
345 #if defined(__amd64__) || defined(__i386__)
347 pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint64_t *evmask)
349 const struct pmc_masks *pm;
353 if (pmask == NULL) /* no mask keywords */
355 q = strchr(p, '='); /* skip '=' */
356 if (*++q == '\0') /* no more data */
358 c = 0; /* count of mask keywords seen */
359 while ((r = strsep(&q, "+")) != NULL) {
360 for (pm = pmask; pm->pm_name && strcasecmp(r, pm->pm_name);
363 if (pm->pm_name == NULL) /* not found */
365 *evmask |= pm->pm_value;
372 #define KWMATCH(p,kw) (strcasecmp((p), (kw)) == 0)
373 #define KWPREFIXMATCH(p,kw) (strncasecmp((p), (kw), sizeof((kw)) - 1) == 0)
374 #define EV_ALIAS(N,S) { .pm_alias = N, .pm_spec = S }
376 #if defined(__amd64__) || defined(__i386__)
382 static struct pmc_event_alias k8_aliases[] = {
383 EV_ALIAS("branches", "k8-fr-retired-taken-branches"),
384 EV_ALIAS("branch-mispredicts",
385 "k8-fr-retired-taken-branches-mispredicted"),
386 EV_ALIAS("cycles", "tsc"),
387 EV_ALIAS("dc-misses", "k8-dc-miss"),
388 EV_ALIAS("ic-misses", "k8-ic-miss"),
389 EV_ALIAS("instructions", "k8-fr-retired-x86-instructions"),
390 EV_ALIAS("interrupts", "k8-fr-taken-hardware-interrupts"),
391 EV_ALIAS("unhalted-cycles", "k8-bu-cpu-clk-unhalted"),
395 #define __K8MASK(N,V) PMCMASK(N,(1 << (V)))
401 /* fp dispatched fpu ops */
402 static const struct pmc_masks k8_mask_fdfo[] = {
403 __K8MASK(add-pipe-excluding-junk-ops, 0),
404 __K8MASK(multiply-pipe-excluding-junk-ops, 1),
405 __K8MASK(store-pipe-excluding-junk-ops, 2),
406 __K8MASK(add-pipe-junk-ops, 3),
407 __K8MASK(multiply-pipe-junk-ops, 4),
408 __K8MASK(store-pipe-junk-ops, 5),
412 /* ls segment register loads */
413 static const struct pmc_masks k8_mask_lsrl[] = {
424 /* ls locked operation */
425 static const struct pmc_masks k8_mask_llo[] = {
426 __K8MASK(locked-instructions, 0),
427 __K8MASK(cycles-in-request, 1),
428 __K8MASK(cycles-to-complete, 2),
432 /* dc refill from {l2,system} and dc copyback */
433 static const struct pmc_masks k8_mask_dc[] = {
434 __K8MASK(invalid, 0),
436 __K8MASK(exclusive, 2),
438 __K8MASK(modified, 4),
442 /* dc one bit ecc error */
443 static const struct pmc_masks k8_mask_dobee[] = {
444 __K8MASK(scrubber, 0),
445 __K8MASK(piggyback, 1),
449 /* dc dispatched prefetch instructions */
450 static const struct pmc_masks k8_mask_ddpi[] = {
457 /* dc dcache accesses by locks */
458 static const struct pmc_masks k8_mask_dabl[] = {
459 __K8MASK(accesses, 0),
464 /* bu internal l2 request */
465 static const struct pmc_masks k8_mask_bilr[] = {
466 __K8MASK(ic-fill, 0),
467 __K8MASK(dc-fill, 1),
468 __K8MASK(tlb-reload, 2),
469 __K8MASK(tag-snoop, 3),
470 __K8MASK(cancelled, 4),
474 /* bu fill request l2 miss */
475 static const struct pmc_masks k8_mask_bfrlm[] = {
476 __K8MASK(ic-fill, 0),
477 __K8MASK(dc-fill, 1),
478 __K8MASK(tlb-reload, 2),
482 /* bu fill into l2 */
483 static const struct pmc_masks k8_mask_bfil[] = {
484 __K8MASK(dirty-l2-victim, 0),
485 __K8MASK(victim-from-l2, 1),
489 /* fr retired fpu instructions */
490 static const struct pmc_masks k8_mask_frfi[] = {
492 __K8MASK(mmx-3dnow, 1),
493 __K8MASK(packed-sse-sse2, 2),
494 __K8MASK(scalar-sse-sse2, 3),
498 /* fr retired fastpath double op instructions */
499 static const struct pmc_masks k8_mask_frfdoi[] = {
500 __K8MASK(low-op-pos-0, 0),
501 __K8MASK(low-op-pos-1, 1),
502 __K8MASK(low-op-pos-2, 2),
506 /* fr fpu exceptions */
507 static const struct pmc_masks k8_mask_ffe[] = {
508 __K8MASK(x87-reclass-microfaults, 0),
509 __K8MASK(sse-retype-microfaults, 1),
510 __K8MASK(sse-reclass-microfaults, 2),
511 __K8MASK(sse-and-x87-microtraps, 3),
515 /* nb memory controller page access event */
516 static const struct pmc_masks k8_mask_nmcpae[] = {
517 __K8MASK(page-hit, 0),
518 __K8MASK(page-miss, 1),
519 __K8MASK(page-conflict, 2),
523 /* nb memory controller turnaround */
524 static const struct pmc_masks k8_mask_nmct[] = {
525 __K8MASK(dimm-turnaround, 0),
526 __K8MASK(read-to-write-turnaround, 1),
527 __K8MASK(write-to-read-turnaround, 2),
531 /* nb memory controller bypass saturation */
532 static const struct pmc_masks k8_mask_nmcbs[] = {
533 __K8MASK(memory-controller-hi-pri-bypass, 0),
534 __K8MASK(memory-controller-lo-pri-bypass, 1),
535 __K8MASK(dram-controller-interface-bypass, 2),
536 __K8MASK(dram-controller-queue-bypass, 3),
540 /* nb sized commands */
541 static const struct pmc_masks k8_mask_nsc[] = {
542 __K8MASK(nonpostwrszbyte, 0),
543 __K8MASK(nonpostwrszdword, 1),
544 __K8MASK(postwrszbyte, 2),
545 __K8MASK(postwrszdword, 3),
546 __K8MASK(rdszbyte, 4),
547 __K8MASK(rdszdword, 5),
548 __K8MASK(rdmodwr, 6),
552 /* nb probe result */
553 static const struct pmc_masks k8_mask_npr[] = {
554 __K8MASK(probe-miss, 0),
555 __K8MASK(probe-hit, 1),
556 __K8MASK(probe-hit-dirty-no-memory-cancel, 2),
557 __K8MASK(probe-hit-dirty-with-memory-cancel, 3),
561 /* nb hypertransport bus bandwidth */
562 static const struct pmc_masks k8_mask_nhbb[] = { /* HT bus bandwidth */
563 __K8MASK(command, 0),
565 __K8MASK(buffer-release, 2),
572 #define K8_KW_COUNT "count"
573 #define K8_KW_EDGE "edge"
574 #define K8_KW_INV "inv"
575 #define K8_KW_MASK "mask"
576 #define K8_KW_OS "os"
577 #define K8_KW_USR "usr"
580 k8_allocate_pmc(enum pmc_event pe, char *ctrspec,
581 struct pmc_op_pmcallocate *pmc_config)
587 const struct pmc_masks *pm, *pmask;
589 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
590 pmc_config->pm_md.pm_amd.pm_amd_config = 0;
595 #define __K8SETMASK(M) pmask = k8_mask_##M
597 /* setup parsing tables */
599 case PMC_EV_K8_FP_DISPATCHED_FPU_OPS:
602 case PMC_EV_K8_LS_SEGMENT_REGISTER_LOAD:
605 case PMC_EV_K8_LS_LOCKED_OPERATION:
608 case PMC_EV_K8_DC_REFILL_FROM_L2:
609 case PMC_EV_K8_DC_REFILL_FROM_SYSTEM:
610 case PMC_EV_K8_DC_COPYBACK:
613 case PMC_EV_K8_DC_ONE_BIT_ECC_ERROR:
616 case PMC_EV_K8_DC_DISPATCHED_PREFETCH_INSTRUCTIONS:
619 case PMC_EV_K8_DC_DCACHE_ACCESSES_BY_LOCKS:
622 case PMC_EV_K8_BU_INTERNAL_L2_REQUEST:
625 case PMC_EV_K8_BU_FILL_REQUEST_L2_MISS:
628 case PMC_EV_K8_BU_FILL_INTO_L2:
631 case PMC_EV_K8_FR_RETIRED_FPU_INSTRUCTIONS:
634 case PMC_EV_K8_FR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS:
637 case PMC_EV_K8_FR_FPU_EXCEPTIONS:
640 case PMC_EV_K8_NB_MEMORY_CONTROLLER_PAGE_ACCESS_EVENT:
643 case PMC_EV_K8_NB_MEMORY_CONTROLLER_TURNAROUND:
646 case PMC_EV_K8_NB_MEMORY_CONTROLLER_BYPASS_SATURATION:
649 case PMC_EV_K8_NB_SIZED_COMMANDS:
652 case PMC_EV_K8_NB_PROBE_RESULT:
655 case PMC_EV_K8_NB_HT_BUS0_BANDWIDTH:
656 case PMC_EV_K8_NB_HT_BUS1_BANDWIDTH:
657 case PMC_EV_K8_NB_HT_BUS2_BANDWIDTH:
662 break; /* no options defined */
665 while ((p = strsep(&ctrspec, ",")) != NULL) {
666 if (KWPREFIXMATCH(p, K8_KW_COUNT "=")) {
668 if (*++q == '\0') /* skip '=' */
671 count = strtol(q, &e, 0);
672 if (e == q || *e != '\0')
675 pmc_config->pm_caps |= PMC_CAP_THRESHOLD;
676 pmc_config->pm_md.pm_amd.pm_amd_config |=
677 AMD_PMC_TO_COUNTER(count);
679 } else if (KWMATCH(p, K8_KW_EDGE)) {
680 pmc_config->pm_caps |= PMC_CAP_EDGE;
681 } else if (KWMATCH(p, K8_KW_INV)) {
682 pmc_config->pm_caps |= PMC_CAP_INVERT;
683 } else if (KWPREFIXMATCH(p, K8_KW_MASK "=")) {
684 if ((n = pmc_parse_mask(pmask, p, &evmask)) < 0)
686 pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
687 } else if (KWMATCH(p, K8_KW_OS)) {
688 pmc_config->pm_caps |= PMC_CAP_SYSTEM;
689 } else if (KWMATCH(p, K8_KW_USR)) {
690 pmc_config->pm_caps |= PMC_CAP_USER;
695 /* other post processing */
697 case PMC_EV_K8_FP_DISPATCHED_FPU_OPS:
698 case PMC_EV_K8_FP_CYCLES_WITH_NO_FPU_OPS_RETIRED:
699 case PMC_EV_K8_FP_DISPATCHED_FPU_FAST_FLAG_OPS:
700 case PMC_EV_K8_FR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS:
701 case PMC_EV_K8_FR_RETIRED_FPU_INSTRUCTIONS:
702 case PMC_EV_K8_FR_FPU_EXCEPTIONS:
703 /* XXX only available in rev B and later */
705 case PMC_EV_K8_DC_DCACHE_ACCESSES_BY_LOCKS:
706 /* XXX only available in rev C and later */
708 case PMC_EV_K8_LS_LOCKED_OPERATION:
709 /* XXX CPU Rev A,B evmask is to be zero */
710 if (evmask & (evmask - 1)) /* > 1 bit set */
713 evmask = 0x01; /* Rev C and later: #instrs */
714 pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
718 if (evmask == 0 && pmask != NULL) {
719 for (pm = pmask; pm->pm_name; pm++)
720 evmask |= pm->pm_value;
721 pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
725 if (pmc_config->pm_caps & PMC_CAP_QUALIFIER)
726 pmc_config->pm_md.pm_amd.pm_amd_config =
727 AMD_PMC_TO_UNITMASK(evmask);
734 #if defined(__i386__) || defined(__amd64__)
736 tsc_allocate_pmc(enum pmc_event pe, char *ctrspec,
737 struct pmc_op_pmcallocate *pmc_config)
739 if (pe != PMC_EV_TSC_TSC)
742 /* TSC events must be unqualified. */
743 if (ctrspec && *ctrspec != '\0')
746 pmc_config->pm_md.pm_amd.pm_amd_config = 0;
747 pmc_config->pm_caps |= PMC_CAP_READ;
753 static struct pmc_event_alias generic_aliases[] = {
754 EV_ALIAS("instructions", "SOFT-CLOCK.HARD"),
759 soft_allocate_pmc(enum pmc_event pe, char *ctrspec,
760 struct pmc_op_pmcallocate *pmc_config)
765 if ((int)pe < PMC_EV_SOFT_FIRST || (int)pe > PMC_EV_SOFT_LAST)
768 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
773 #if defined(__XSCALE__)
775 static struct pmc_event_alias xscale_aliases[] = {
776 EV_ALIAS("branches", "BRANCH_RETIRED"),
777 EV_ALIAS("branch-mispredicts", "BRANCH_MISPRED"),
778 EV_ALIAS("dc-misses", "DC_MISS"),
779 EV_ALIAS("ic-misses", "IC_MISS"),
780 EV_ALIAS("instructions", "INSTR_RETIRED"),
784 xscale_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
785 struct pmc_op_pmcallocate *pmc_config __unused)
796 static struct pmc_event_alias cortex_a8_aliases[] = {
797 EV_ALIAS("dc-misses", "L1_DCACHE_REFILL"),
798 EV_ALIAS("ic-misses", "L1_ICACHE_REFILL"),
799 EV_ALIAS("instructions", "INSTR_EXECUTED"),
803 static struct pmc_event_alias cortex_a9_aliases[] = {
804 EV_ALIAS("dc-misses", "L1_DCACHE_REFILL"),
805 EV_ALIAS("ic-misses", "L1_ICACHE_REFILL"),
806 EV_ALIAS("instructions", "INSTR_EXECUTED"),
811 armv7_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
812 struct pmc_op_pmcallocate *pmc_config __unused)
823 #if defined(__aarch64__)
824 static struct pmc_event_alias cortex_a53_aliases[] = {
827 static struct pmc_event_alias cortex_a57_aliases[] = {
830 static struct pmc_event_alias cortex_a76_aliases[] = {
834 arm64_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
835 struct pmc_op_pmcallocate *pmc_config __unused)
846 #if defined(__mips__)
848 static struct pmc_event_alias beri_aliases[] = {
849 EV_ALIAS("instructions", "INST"),
853 static struct pmc_event_alias mips24k_aliases[] = {
854 EV_ALIAS("instructions", "INSTR_EXECUTED"),
855 EV_ALIAS("branches", "BRANCH_COMPLETED"),
856 EV_ALIAS("branch-mispredicts", "BRANCH_MISPRED"),
860 static struct pmc_event_alias mips74k_aliases[] = {
861 EV_ALIAS("instructions", "INSTR_EXECUTED"),
862 EV_ALIAS("branches", "BRANCH_INSNS"),
863 EV_ALIAS("branch-mispredicts", "MISPREDICTED_BRANCH_INSNS"),
867 static struct pmc_event_alias octeon_aliases[] = {
868 EV_ALIAS("instructions", "RET"),
869 EV_ALIAS("branches", "BR"),
870 EV_ALIAS("branch-mispredicts", "BRMIS"),
874 #define MIPS_KW_OS "os"
875 #define MIPS_KW_USR "usr"
876 #define MIPS_KW_ANYTHREAD "anythread"
879 mips_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
880 struct pmc_op_pmcallocate *pmc_config __unused)
886 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
888 while ((p = strsep(&ctrspec, ",")) != NULL) {
889 if (KWMATCH(p, MIPS_KW_OS))
890 pmc_config->pm_caps |= PMC_CAP_SYSTEM;
891 else if (KWMATCH(p, MIPS_KW_USR))
892 pmc_config->pm_caps |= PMC_CAP_USER;
893 else if (KWMATCH(p, MIPS_KW_ANYTHREAD))
894 pmc_config->pm_caps |= (PMC_CAP_USER | PMC_CAP_SYSTEM);
902 #endif /* __mips__ */
904 #if defined(__powerpc__)
906 static struct pmc_event_alias ppc7450_aliases[] = {
907 EV_ALIAS("instructions", "INSTR_COMPLETED"),
908 EV_ALIAS("branches", "BRANCHES_COMPLETED"),
909 EV_ALIAS("branch-mispredicts", "MISPREDICTED_BRANCHES"),
913 static struct pmc_event_alias ppc970_aliases[] = {
914 EV_ALIAS("instructions", "INSTR_COMPLETED"),
915 EV_ALIAS("cycles", "CYCLES"),
919 static struct pmc_event_alias power8_aliases[] = {
920 EV_ALIAS("instructions", "INSTR_COMPLETED"),
921 EV_ALIAS("cycles", "CYCLES"),
925 static struct pmc_event_alias e500_aliases[] = {
926 EV_ALIAS("instructions", "INSTR_COMPLETED"),
927 EV_ALIAS("cycles", "CYCLES"),
931 #define POWERPC_KW_OS "os"
932 #define POWERPC_KW_USR "usr"
933 #define POWERPC_KW_ANYTHREAD "anythread"
936 powerpc_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
937 struct pmc_op_pmcallocate *pmc_config __unused)
943 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
945 while ((p = strsep(&ctrspec, ",")) != NULL) {
946 if (KWMATCH(p, POWERPC_KW_OS))
947 pmc_config->pm_caps |= PMC_CAP_SYSTEM;
948 else if (KWMATCH(p, POWERPC_KW_USR))
949 pmc_config->pm_caps |= PMC_CAP_USER;
950 else if (KWMATCH(p, POWERPC_KW_ANYTHREAD))
951 pmc_config->pm_caps |= (PMC_CAP_USER | PMC_CAP_SYSTEM);
959 #endif /* __powerpc__ */
963 * Match an event name `name' with its canonical form.
965 * Matches are case insensitive and spaces, periods, underscores and
966 * hyphen characters are considered to match each other.
968 * Returns 1 for a match, 0 otherwise.
972 pmc_match_event_name(const char *name, const char *canonicalname)
975 const unsigned char *c, *n;
977 c = (const unsigned char *) canonicalname;
978 n = (const unsigned char *) name;
980 for (; (nc = *n) && (cc = *c); n++, c++) {
982 if ((nc == ' ' || nc == '_' || nc == '-' || nc == '.') &&
983 (cc == ' ' || cc == '_' || cc == '-' || cc == '.'))
986 if (toupper(nc) == toupper(cc))
993 if (*n == '\0' && *c == '\0')
1000 * Match an event name against all the event named supported by a
1003 * Returns an event descriptor pointer on match or NULL otherwise.
1005 static const struct pmc_event_descr *
1006 pmc_match_event_class(const char *name,
1007 const struct pmc_class_descr *pcd)
1010 const struct pmc_event_descr *ev;
1012 ev = pcd->pm_evc_event_table;
1013 for (n = 0; n < pcd->pm_evc_event_table_size; n++, ev++)
1014 if (pmc_match_event_name(name, ev->pm_ev_name))
1021 pmc_mdep_is_compatible_class(enum pmc_class pc)
1025 for (n = 0; n < pmc_mdep_class_list_size; n++)
1026 if (pmc_mdep_class_list[n] == pc)
1036 pmc_allocate(const char *ctrspec, enum pmc_mode mode,
1037 uint32_t flags, int cpu, pmc_id_t *pmcid,
1042 char *r, *spec_copy;
1043 const char *ctrname;
1044 const struct pmc_event_descr *ev;
1045 const struct pmc_event_alias *alias;
1046 struct pmc_op_pmcallocate pmc_config;
1047 const struct pmc_class_descr *pcd;
1052 if (mode != PMC_MODE_SS && mode != PMC_MODE_TS &&
1053 mode != PMC_MODE_SC && mode != PMC_MODE_TC) {
1057 bzero(&pmc_config, sizeof(pmc_config));
1058 pmc_config.pm_cpu = cpu;
1059 pmc_config.pm_mode = mode;
1060 pmc_config.pm_flags = flags;
1061 pmc_config.pm_count = count;
1062 if (PMC_IS_SAMPLING_MODE(mode))
1063 pmc_config.pm_caps |= PMC_CAP_INTERRUPT;
1065 * Can we pull this straight from the pmu table?
1067 r = spec_copy = strdup(ctrspec);
1068 ctrname = strsep(&r, ",");
1069 if (pmc_pmu_enabled()) {
1070 if (pmc_pmu_pmcallocate(ctrname, &pmc_config) == 0) {
1071 if (PMC_CALL(PMCALLOCATE, &pmc_config) < 0) {
1075 *pmcid = pmc_config.pm_pmcid;
1078 errx(EX_USAGE, "ERROR: pmc_pmu_allocate failed, check for ctrname %s\n", ctrname);
1084 /* replace an event alias with the canonical event specifier */
1085 if (pmc_mdep_event_aliases)
1086 for (alias = pmc_mdep_event_aliases; alias->pm_alias; alias++)
1087 if (!strcasecmp(ctrspec, alias->pm_alias)) {
1088 spec_copy = strdup(alias->pm_spec);
1092 if (spec_copy == NULL)
1093 spec_copy = strdup(ctrspec);
1096 ctrname = strsep(&r, ",");
1099 * If a explicit class prefix was given by the user, restrict the
1100 * search for the event to the specified PMC class.
1103 for (n = 0; n < PMC_CLASS_TABLE_SIZE; n++) {
1104 pcd = pmc_class_table[n];
1105 if (pcd && pmc_mdep_is_compatible_class(pcd->pm_evc_class) &&
1106 strncasecmp(ctrname, pcd->pm_evc_name,
1107 pcd->pm_evc_name_size) == 0) {
1108 if ((ev = pmc_match_event_class(ctrname +
1109 pcd->pm_evc_name_size, pcd)) == NULL) {
1118 * Otherwise, search for this event in all compatible PMC
1121 for (n = 0; ev == NULL && n < PMC_CLASS_TABLE_SIZE; n++) {
1122 pcd = pmc_class_table[n];
1123 if (pcd && pmc_mdep_is_compatible_class(pcd->pm_evc_class))
1124 ev = pmc_match_event_class(ctrname, pcd);
1132 pmc_config.pm_ev = ev->pm_ev_code;
1133 pmc_config.pm_class = pcd->pm_evc_class;
1135 if (pcd->pm_evc_allocate_pmc(ev->pm_ev_code, r, &pmc_config) < 0) {
1140 if (PMC_CALL(PMCALLOCATE, &pmc_config) < 0)
1143 *pmcid = pmc_config.pm_pmcid;
1155 pmc_attach(pmc_id_t pmc, pid_t pid)
1157 struct pmc_op_pmcattach pmc_attach_args;
1159 pmc_attach_args.pm_pmc = pmc;
1160 pmc_attach_args.pm_pid = pid;
1162 return (PMC_CALL(PMCATTACH, &pmc_attach_args));
1166 pmc_capabilities(pmc_id_t pmcid, uint32_t *caps)
1171 cl = PMC_ID_TO_CLASS(pmcid);
1172 for (i = 0; i < cpu_info.pm_nclass; i++)
1173 if (cpu_info.pm_classes[i].pm_class == cl) {
1174 *caps = cpu_info.pm_classes[i].pm_caps;
1182 pmc_configure_logfile(int fd)
1184 struct pmc_op_configurelog cla;
1187 if (PMC_CALL(CONFIGURELOG, &cla) < 0)
1193 pmc_cpuinfo(const struct pmc_cpuinfo **pci)
1195 if (pmc_syscall == -1) {
1205 pmc_detach(pmc_id_t pmc, pid_t pid)
1207 struct pmc_op_pmcattach pmc_detach_args;
1209 pmc_detach_args.pm_pmc = pmc;
1210 pmc_detach_args.pm_pid = pid;
1211 return (PMC_CALL(PMCDETACH, &pmc_detach_args));
1215 pmc_disable(int cpu, int pmc)
1217 struct pmc_op_pmcadmin ssa;
1221 ssa.pm_state = PMC_STATE_DISABLED;
1222 return (PMC_CALL(PMCADMIN, &ssa));
1226 pmc_enable(int cpu, int pmc)
1228 struct pmc_op_pmcadmin ssa;
1232 ssa.pm_state = PMC_STATE_FREE;
1233 return (PMC_CALL(PMCADMIN, &ssa));
1237 * Return a list of events known to a given PMC class. 'cl' is the
1238 * PMC class identifier, 'eventnames' is the returned list of 'const
1239 * char *' pointers pointing to the names of the events. 'nevents' is
1240 * the number of event name pointers returned.
1242 * The space for 'eventnames' is allocated using malloc(3). The caller
1243 * is responsible for freeing this space when done.
1246 pmc_event_names_of_class(enum pmc_class cl, const char ***eventnames,
1251 const struct pmc_event_descr *ev;
1256 ev = iaf_event_table;
1257 count = PMC_EVENT_TABLE_SIZE(iaf);
1260 ev = tsc_event_table;
1261 count = PMC_EVENT_TABLE_SIZE(tsc);
1264 ev = k8_event_table;
1265 count = PMC_EVENT_TABLE_SIZE(k8);
1267 case PMC_CLASS_XSCALE:
1268 ev = xscale_event_table;
1269 count = PMC_EVENT_TABLE_SIZE(xscale);
1271 case PMC_CLASS_ARMV7:
1272 switch (cpu_info.pm_cputype) {
1274 case PMC_CPU_ARMV7_CORTEX_A8:
1275 ev = cortex_a8_event_table;
1276 count = PMC_EVENT_TABLE_SIZE(cortex_a8);
1278 case PMC_CPU_ARMV7_CORTEX_A9:
1279 ev = cortex_a9_event_table;
1280 count = PMC_EVENT_TABLE_SIZE(cortex_a9);
1284 case PMC_CLASS_ARMV8:
1285 switch (cpu_info.pm_cputype) {
1287 case PMC_CPU_ARMV8_CORTEX_A53:
1288 ev = cortex_a53_event_table;
1289 count = PMC_EVENT_TABLE_SIZE(cortex_a53);
1291 case PMC_CPU_ARMV8_CORTEX_A57:
1292 ev = cortex_a57_event_table;
1293 count = PMC_EVENT_TABLE_SIZE(cortex_a57);
1295 case PMC_CPU_ARMV8_CORTEX_A76:
1296 ev = cortex_a76_event_table;
1297 count = PMC_EVENT_TABLE_SIZE(cortex_a76);
1301 case PMC_CLASS_BERI:
1302 ev = beri_event_table;
1303 count = PMC_EVENT_TABLE_SIZE(beri);
1305 case PMC_CLASS_MIPS24K:
1306 ev = mips24k_event_table;
1307 count = PMC_EVENT_TABLE_SIZE(mips24k);
1309 case PMC_CLASS_MIPS74K:
1310 ev = mips74k_event_table;
1311 count = PMC_EVENT_TABLE_SIZE(mips74k);
1313 case PMC_CLASS_OCTEON:
1314 ev = octeon_event_table;
1315 count = PMC_EVENT_TABLE_SIZE(octeon);
1317 case PMC_CLASS_PPC7450:
1318 ev = ppc7450_event_table;
1319 count = PMC_EVENT_TABLE_SIZE(ppc7450);
1321 case PMC_CLASS_PPC970:
1322 ev = ppc970_event_table;
1323 count = PMC_EVENT_TABLE_SIZE(ppc970);
1325 case PMC_CLASS_POWER8:
1326 ev = power8_event_table;
1327 count = PMC_EVENT_TABLE_SIZE(power8);
1329 case PMC_CLASS_E500:
1330 ev = e500_event_table;
1331 count = PMC_EVENT_TABLE_SIZE(e500);
1333 case PMC_CLASS_SOFT:
1334 ev = soft_event_table;
1335 count = soft_event_info.pm_nevent;
1342 if ((names = malloc(count * sizeof(const char *))) == NULL)
1345 *eventnames = names;
1348 for (;count--; ev++, names++)
1349 *names = ev->pm_ev_name;
1355 pmc_flush_logfile(void)
1357 return (PMC_CALL(FLUSHLOG,0));
1361 pmc_close_logfile(void)
1363 return (PMC_CALL(CLOSELOG,0));
1367 pmc_get_driver_stats(struct pmc_driverstats *ds)
1369 struct pmc_op_getdriverstats gms;
1371 if (PMC_CALL(GETDRIVERSTATS, &gms) < 0)
1374 /* copy out fields in the current userland<->library interface */
1375 ds->pm_intr_ignored = gms.pm_intr_ignored;
1376 ds->pm_intr_processed = gms.pm_intr_processed;
1377 ds->pm_intr_bufferfull = gms.pm_intr_bufferfull;
1378 ds->pm_syscalls = gms.pm_syscalls;
1379 ds->pm_syscall_errors = gms.pm_syscall_errors;
1380 ds->pm_buffer_requests = gms.pm_buffer_requests;
1381 ds->pm_buffer_requests_failed = gms.pm_buffer_requests_failed;
1382 ds->pm_log_sweeps = gms.pm_log_sweeps;
1387 pmc_get_msr(pmc_id_t pmc, uint32_t *msr)
1389 struct pmc_op_getmsr gm;
1392 if (PMC_CALL(PMCGETMSR, &gm) < 0)
1401 int error, pmc_mod_id;
1403 uint32_t abi_version;
1404 struct module_stat pmc_modstat;
1405 struct pmc_op_getcpuinfo op_cpu_info;
1406 #if defined(__amd64__) || defined(__i386__)
1407 int cpu_has_iaf_counters;
1411 if (pmc_syscall != -1) /* already inited */
1414 /* retrieve the system call number from the KLD */
1415 if ((pmc_mod_id = modfind(PMC_MODULE_NAME)) < 0)
1418 pmc_modstat.version = sizeof(struct module_stat);
1419 if ((error = modstat(pmc_mod_id, &pmc_modstat)) < 0)
1422 pmc_syscall = pmc_modstat.data.intval;
1424 /* check the kernel module's ABI against our compiled-in version */
1425 abi_version = PMC_VERSION;
1426 if (PMC_CALL(GETMODULEVERSION, &abi_version) < 0)
1427 return (pmc_syscall = -1);
1429 /* ignore patch & minor numbers for the comparison */
1430 if ((abi_version & 0xFF000000) != (PMC_VERSION & 0xFF000000)) {
1431 errno = EPROGMISMATCH;
1432 return (pmc_syscall = -1);
1435 bzero(&op_cpu_info, sizeof(op_cpu_info));
1436 if (PMC_CALL(GETCPUINFO, &op_cpu_info) < 0)
1437 return (pmc_syscall = -1);
1439 cpu_info.pm_cputype = op_cpu_info.pm_cputype;
1440 cpu_info.pm_ncpu = op_cpu_info.pm_ncpu;
1441 cpu_info.pm_npmc = op_cpu_info.pm_npmc;
1442 cpu_info.pm_nclass = op_cpu_info.pm_nclass;
1443 for (n = 0; n < op_cpu_info.pm_nclass; n++)
1444 memcpy(&cpu_info.pm_classes[n], &op_cpu_info.pm_classes[n],
1445 sizeof(cpu_info.pm_classes[n]));
1447 pmc_class_table = malloc(PMC_CLASS_TABLE_SIZE *
1448 sizeof(struct pmc_class_descr *));
1450 if (pmc_class_table == NULL)
1453 for (n = 0; n < PMC_CLASS_TABLE_SIZE; n++)
1454 pmc_class_table[n] = NULL;
1457 * Get soft events list.
1459 soft_event_info.pm_class = PMC_CLASS_SOFT;
1460 if (PMC_CALL(GETDYNEVENTINFO, &soft_event_info) < 0)
1461 return (pmc_syscall = -1);
1463 /* Map soft events to static list. */
1464 for (n = 0; n < soft_event_info.pm_nevent; n++) {
1465 soft_event_table[n].pm_ev_name =
1466 soft_event_info.pm_events[n].pm_ev_name;
1467 soft_event_table[n].pm_ev_code =
1468 soft_event_info.pm_events[n].pm_ev_code;
1470 soft_class_table_descr.pm_evc_event_table_size = \
1471 soft_event_info.pm_nevent;
1472 soft_class_table_descr.pm_evc_event_table = \
1476 * Fill in the class table.
1480 /* Fill soft events information. */
1481 pmc_class_table[n++] = &soft_class_table_descr;
1482 #if defined(__amd64__) || defined(__i386__)
1483 if (cpu_info.pm_cputype != PMC_CPU_GENERIC)
1484 pmc_class_table[n++] = &tsc_class_table_descr;
1487 * Check if this CPU has fixed function counters.
1489 cpu_has_iaf_counters = 0;
1490 for (t = 0; t < cpu_info.pm_nclass; t++)
1491 if (cpu_info.pm_classes[t].pm_class == PMC_CLASS_IAF &&
1492 cpu_info.pm_classes[t].pm_num > 0)
1493 cpu_has_iaf_counters = 1;
1496 #define PMC_MDEP_INIT(C) do { \
1497 pmc_mdep_event_aliases = C##_aliases; \
1498 pmc_mdep_class_list = C##_pmc_classes; \
1499 pmc_mdep_class_list_size = \
1500 PMC_TABLE_SIZE(C##_pmc_classes); \
1503 #define PMC_MDEP_INIT_INTEL_V2(C) do { \
1505 pmc_class_table[n++] = &iaf_class_table_descr; \
1506 if (!cpu_has_iaf_counters) \
1507 pmc_mdep_event_aliases = \
1508 C##_aliases_without_iaf; \
1509 pmc_class_table[n] = &C##_class_table_descr; \
1512 /* Configure the event name parser. */
1513 switch (cpu_info.pm_cputype) {
1514 #if defined(__amd64__) || defined(__i386__)
1515 case PMC_CPU_AMD_K8:
1517 pmc_class_table[n] = &k8_class_table_descr;
1520 case PMC_CPU_GENERIC:
1521 PMC_MDEP_INIT(generic);
1523 #if defined(__arm__)
1524 #if defined(__XSCALE__)
1525 case PMC_CPU_INTEL_XSCALE:
1526 PMC_MDEP_INIT(xscale);
1527 pmc_class_table[n] = &xscale_class_table_descr;
1530 case PMC_CPU_ARMV7_CORTEX_A8:
1531 PMC_MDEP_INIT(cortex_a8);
1532 pmc_class_table[n] = &cortex_a8_class_table_descr;
1534 case PMC_CPU_ARMV7_CORTEX_A9:
1535 PMC_MDEP_INIT(cortex_a9);
1536 pmc_class_table[n] = &cortex_a9_class_table_descr;
1539 #if defined(__aarch64__)
1540 case PMC_CPU_ARMV8_CORTEX_A53:
1541 PMC_MDEP_INIT(cortex_a53);
1542 pmc_class_table[n] = &cortex_a53_class_table_descr;
1544 case PMC_CPU_ARMV8_CORTEX_A57:
1545 PMC_MDEP_INIT(cortex_a57);
1546 pmc_class_table[n] = &cortex_a57_class_table_descr;
1548 case PMC_CPU_ARMV8_CORTEX_A76:
1549 PMC_MDEP_INIT(cortex_a76);
1550 pmc_class_table[n] = &cortex_a76_class_table_descr;
1553 #if defined(__mips__)
1554 case PMC_CPU_MIPS_BERI:
1555 PMC_MDEP_INIT(beri);
1556 pmc_class_table[n] = &beri_class_table_descr;
1558 case PMC_CPU_MIPS_24K:
1559 PMC_MDEP_INIT(mips24k);
1560 pmc_class_table[n] = &mips24k_class_table_descr;
1562 case PMC_CPU_MIPS_74K:
1563 PMC_MDEP_INIT(mips74k);
1564 pmc_class_table[n] = &mips74k_class_table_descr;
1566 case PMC_CPU_MIPS_OCTEON:
1567 PMC_MDEP_INIT(octeon);
1568 pmc_class_table[n] = &octeon_class_table_descr;
1570 #endif /* __mips__ */
1571 #if defined(__powerpc__)
1572 case PMC_CPU_PPC_7450:
1573 PMC_MDEP_INIT(ppc7450);
1574 pmc_class_table[n] = &ppc7450_class_table_descr;
1576 case PMC_CPU_PPC_970:
1577 PMC_MDEP_INIT(ppc970);
1578 pmc_class_table[n] = &ppc970_class_table_descr;
1580 case PMC_CPU_PPC_POWER8:
1581 PMC_MDEP_INIT(power8);
1582 pmc_class_table[n] = &power8_class_table_descr;
1584 case PMC_CPU_PPC_E500:
1585 PMC_MDEP_INIT(e500);
1586 pmc_class_table[n] = &e500_class_table_descr;
1591 * Some kind of CPU this version of the library knows nothing
1592 * about. This shouldn't happen since the abi version check
1593 * should have caught this.
1595 #if defined(__amd64__) || defined(__i386__)
1599 return (pmc_syscall = -1);
1606 pmc_name_of_capability(enum pmc_caps cap)
1611 * 'cap' should have a single bit set and should be in
1614 if ((cap & (cap - 1)) || cap < PMC_CAP_FIRST ||
1615 cap > PMC_CAP_LAST) {
1621 return (pmc_capability_names[i - 1]);
1625 pmc_name_of_class(enum pmc_class pc)
1629 for (n = 0; n < PMC_TABLE_SIZE(pmc_class_names); n++)
1630 if (pc == pmc_class_names[n].pm_class)
1631 return (pmc_class_names[n].pm_name);
1638 pmc_name_of_cputype(enum pmc_cputype cp)
1642 for (n = 0; n < PMC_TABLE_SIZE(pmc_cputype_names); n++)
1643 if (cp == pmc_cputype_names[n].pm_cputype)
1644 return (pmc_cputype_names[n].pm_name);
1651 pmc_name_of_disposition(enum pmc_disp pd)
1653 if ((int) pd >= PMC_DISP_FIRST &&
1654 pd <= PMC_DISP_LAST)
1655 return (pmc_disposition_names[pd]);
1662 _pmc_name_of_event(enum pmc_event pe, enum pmc_cputype cpu)
1664 const struct pmc_event_descr *ev, *evfence;
1666 ev = evfence = NULL;
1667 if (pe >= PMC_EV_K8_FIRST && pe <= PMC_EV_K8_LAST) {
1668 ev = k8_event_table;
1669 evfence = k8_event_table + PMC_EVENT_TABLE_SIZE(k8);
1670 } else if (pe >= PMC_EV_XSCALE_FIRST && pe <= PMC_EV_XSCALE_LAST) {
1671 ev = xscale_event_table;
1672 evfence = xscale_event_table + PMC_EVENT_TABLE_SIZE(xscale);
1673 } else if (pe >= PMC_EV_ARMV7_FIRST && pe <= PMC_EV_ARMV7_LAST) {
1675 case PMC_CPU_ARMV7_CORTEX_A8:
1676 ev = cortex_a8_event_table;
1677 evfence = cortex_a8_event_table + PMC_EVENT_TABLE_SIZE(cortex_a8);
1679 case PMC_CPU_ARMV7_CORTEX_A9:
1680 ev = cortex_a9_event_table;
1681 evfence = cortex_a9_event_table + PMC_EVENT_TABLE_SIZE(cortex_a9);
1683 default: /* Unknown CPU type. */
1686 } else if (pe >= PMC_EV_ARMV8_FIRST && pe <= PMC_EV_ARMV8_LAST) {
1688 case PMC_CPU_ARMV8_CORTEX_A53:
1689 ev = cortex_a53_event_table;
1690 evfence = cortex_a53_event_table + PMC_EVENT_TABLE_SIZE(cortex_a53);
1692 case PMC_CPU_ARMV8_CORTEX_A57:
1693 ev = cortex_a57_event_table;
1694 evfence = cortex_a57_event_table + PMC_EVENT_TABLE_SIZE(cortex_a57);
1696 case PMC_CPU_ARMV8_CORTEX_A76:
1697 ev = cortex_a76_event_table;
1698 evfence = cortex_a76_event_table + PMC_EVENT_TABLE_SIZE(cortex_a76);
1700 default: /* Unknown CPU type. */
1703 } else if (pe >= PMC_EV_BERI_FIRST && pe <= PMC_EV_BERI_LAST) {
1704 ev = beri_event_table;
1705 evfence = beri_event_table + PMC_EVENT_TABLE_SIZE(beri);
1706 } else if (pe >= PMC_EV_MIPS24K_FIRST && pe <= PMC_EV_MIPS24K_LAST) {
1707 ev = mips24k_event_table;
1708 evfence = mips24k_event_table + PMC_EVENT_TABLE_SIZE(mips24k);
1709 } else if (pe >= PMC_EV_MIPS74K_FIRST && pe <= PMC_EV_MIPS74K_LAST) {
1710 ev = mips74k_event_table;
1711 evfence = mips74k_event_table + PMC_EVENT_TABLE_SIZE(mips74k);
1712 } else if (pe >= PMC_EV_OCTEON_FIRST && pe <= PMC_EV_OCTEON_LAST) {
1713 ev = octeon_event_table;
1714 evfence = octeon_event_table + PMC_EVENT_TABLE_SIZE(octeon);
1715 } else if (pe >= PMC_EV_PPC7450_FIRST && pe <= PMC_EV_PPC7450_LAST) {
1716 ev = ppc7450_event_table;
1717 evfence = ppc7450_event_table + PMC_EVENT_TABLE_SIZE(ppc7450);
1718 } else if (pe >= PMC_EV_PPC970_FIRST && pe <= PMC_EV_PPC970_LAST) {
1719 ev = ppc970_event_table;
1720 evfence = ppc970_event_table + PMC_EVENT_TABLE_SIZE(ppc970);
1721 } else if (pe >= PMC_EV_POWER8_FIRST && pe <= PMC_EV_POWER8_LAST) {
1722 ev = power8_event_table;
1723 evfence = power8_event_table + PMC_EVENT_TABLE_SIZE(power8);
1724 } else if (pe >= PMC_EV_E500_FIRST && pe <= PMC_EV_E500_LAST) {
1725 ev = e500_event_table;
1726 evfence = e500_event_table + PMC_EVENT_TABLE_SIZE(e500);
1727 } else if (pe == PMC_EV_TSC_TSC) {
1728 ev = tsc_event_table;
1729 evfence = tsc_event_table + PMC_EVENT_TABLE_SIZE(tsc);
1730 } else if ((int)pe >= PMC_EV_SOFT_FIRST && (int)pe <= PMC_EV_SOFT_LAST) {
1731 ev = soft_event_table;
1732 evfence = soft_event_table + soft_event_info.pm_nevent;
1735 for (; ev != evfence; ev++)
1736 if (pe == ev->pm_ev_code)
1737 return (ev->pm_ev_name);
1743 pmc_name_of_event(enum pmc_event pe)
1747 if ((n = _pmc_name_of_event(pe, cpu_info.pm_cputype)) != NULL)
1755 pmc_name_of_mode(enum pmc_mode pm)
1757 if ((int) pm >= PMC_MODE_FIRST &&
1758 pm <= PMC_MODE_LAST)
1759 return (pmc_mode_names[pm]);
1766 pmc_name_of_state(enum pmc_state ps)
1768 if ((int) ps >= PMC_STATE_FIRST &&
1769 ps <= PMC_STATE_LAST)
1770 return (pmc_state_names[ps]);
1779 if (pmc_syscall == -1) {
1784 return (cpu_info.pm_ncpu);
1790 if (pmc_syscall == -1) {
1795 if (cpu < 0 || cpu >= (int) cpu_info.pm_ncpu) {
1800 return (cpu_info.pm_npmc);
1804 pmc_pmcinfo(int cpu, struct pmc_pmcinfo **ppmci)
1807 struct pmc_op_getpmcinfo *pmci;
1809 if ((npmc = pmc_npmc(cpu)) < 0)
1812 nbytes = sizeof(struct pmc_op_getpmcinfo) +
1813 npmc * sizeof(struct pmc_info);
1815 if ((pmci = calloc(1, nbytes)) == NULL)
1820 if (PMC_CALL(GETPMCINFO, pmci) < 0) {
1825 /* kernel<->library, library<->userland interfaces are identical */
1826 *ppmci = (struct pmc_pmcinfo *) pmci;
1831 pmc_read(pmc_id_t pmc, pmc_value_t *value)
1833 struct pmc_op_pmcrw pmc_read_op;
1835 pmc_read_op.pm_pmcid = pmc;
1836 pmc_read_op.pm_flags = PMC_F_OLDVALUE;
1837 pmc_read_op.pm_value = -1;
1839 if (PMC_CALL(PMCRW, &pmc_read_op) < 0)
1842 *value = pmc_read_op.pm_value;
1847 pmc_release(pmc_id_t pmc)
1849 struct pmc_op_simple pmc_release_args;
1851 pmc_release_args.pm_pmcid = pmc;
1852 return (PMC_CALL(PMCRELEASE, &pmc_release_args));
1856 pmc_rw(pmc_id_t pmc, pmc_value_t newvalue, pmc_value_t *oldvaluep)
1858 struct pmc_op_pmcrw pmc_rw_op;
1860 pmc_rw_op.pm_pmcid = pmc;
1861 pmc_rw_op.pm_flags = PMC_F_NEWVALUE | PMC_F_OLDVALUE;
1862 pmc_rw_op.pm_value = newvalue;
1864 if (PMC_CALL(PMCRW, &pmc_rw_op) < 0)
1867 *oldvaluep = pmc_rw_op.pm_value;
1872 pmc_set(pmc_id_t pmc, pmc_value_t value)
1874 struct pmc_op_pmcsetcount sc;
1877 sc.pm_count = value;
1879 if (PMC_CALL(PMCSETCOUNT, &sc) < 0)
1885 pmc_start(pmc_id_t pmc)
1887 struct pmc_op_simple pmc_start_args;
1889 pmc_start_args.pm_pmcid = pmc;
1890 return (PMC_CALL(PMCSTART, &pmc_start_args));
1894 pmc_stop(pmc_id_t pmc)
1896 struct pmc_op_simple pmc_stop_args;
1898 pmc_stop_args.pm_pmcid = pmc;
1899 return (PMC_CALL(PMCSTOP, &pmc_stop_args));
1903 pmc_width(pmc_id_t pmcid, uint32_t *width)
1908 cl = PMC_ID_TO_CLASS(pmcid);
1909 for (i = 0; i < cpu_info.pm_nclass; i++)
1910 if (cpu_info.pm_classes[i].pm_class == cl) {
1911 *width = cpu_info.pm_classes[i].pm_width;
1919 pmc_write(pmc_id_t pmc, pmc_value_t value)
1921 struct pmc_op_pmcrw pmc_write_op;
1923 pmc_write_op.pm_pmcid = pmc;
1924 pmc_write_op.pm_flags = PMC_F_NEWVALUE;
1925 pmc_write_op.pm_value = value;
1926 return (PMC_CALL(PMCRW, &pmc_write_op));
1930 pmc_writelog(uint32_t userdata)
1932 struct pmc_op_writelog wl;
1934 wl.pm_userdata = userdata;
1935 return (PMC_CALL(WRITELOG, &wl));