2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2003-2008 Joseph Koshy
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/types.h>
33 #include <sys/param.h>
34 #include <sys/module.h>
36 #include <sys/syscall.h>
50 #include "libpmcinternal.h"
52 /* Function prototypes */
53 #if defined(__amd64__) || defined(__i386__)
54 static int k8_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
55 struct pmc_op_pmcallocate *_pmc_config);
57 #if defined(__amd64__) || defined(__i386__)
58 static int tsc_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
59 struct pmc_op_pmcallocate *_pmc_config);
62 #if defined(__XSCALE__)
63 static int xscale_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
64 struct pmc_op_pmcallocate *_pmc_config);
66 static int armv7_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
67 struct pmc_op_pmcallocate *_pmc_config);
69 #if defined(__aarch64__)
70 static int arm64_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
71 struct pmc_op_pmcallocate *_pmc_config);
74 static int mips_allocate_pmc(enum pmc_event _pe, char* ctrspec,
75 struct pmc_op_pmcallocate *_pmc_config);
77 static int soft_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
78 struct pmc_op_pmcallocate *_pmc_config);
80 #if defined(__powerpc__)
81 static int powerpc_allocate_pmc(enum pmc_event _pe, char* ctrspec,
82 struct pmc_op_pmcallocate *_pmc_config);
83 #endif /* __powerpc__ */
85 #define PMC_CALL(cmd, params) \
86 syscall(pmc_syscall, PMC_OP_##cmd, (params))
89 * Event aliases provide a way for the user to ask for generic events
90 * like "cache-misses", or "instructions-retired". These aliases are
91 * mapped to the appropriate canonical event descriptions using a
94 struct pmc_event_alias {
99 static const struct pmc_event_alias *pmc_mdep_event_aliases;
102 * The pmc_event_descr structure maps symbolic names known to the user
103 * to integer codes used by the PMC KLD.
105 struct pmc_event_descr {
106 const char *pm_ev_name;
107 enum pmc_event pm_ev_code;
111 * The pmc_class_descr structure maps class name prefixes for
112 * event names to event tables and other PMC class data.
114 struct pmc_class_descr {
115 const char *pm_evc_name;
116 size_t pm_evc_name_size;
117 enum pmc_class pm_evc_class;
118 const struct pmc_event_descr *pm_evc_event_table;
119 size_t pm_evc_event_table_size;
120 int (*pm_evc_allocate_pmc)(enum pmc_event _pe,
121 char *_ctrspec, struct pmc_op_pmcallocate *_pa);
124 #define PMC_TABLE_SIZE(N) (sizeof(N)/sizeof(N[0]))
125 #define PMC_EVENT_TABLE_SIZE(N) PMC_TABLE_SIZE(N##_event_table)
128 #define __PMC_EV(C,N) { #N, PMC_EV_ ## C ## _ ## N },
131 * PMC_CLASSDEP_TABLE(NAME, CLASS)
133 * Define a table mapping event names and aliases to HWPMC event IDs.
135 #define PMC_CLASSDEP_TABLE(N, C) \
136 static const struct pmc_event_descr N##_event_table[] = \
141 PMC_CLASSDEP_TABLE(iaf, IAF);
142 PMC_CLASSDEP_TABLE(k8, K8);
143 PMC_CLASSDEP_TABLE(xscale, XSCALE);
144 PMC_CLASSDEP_TABLE(armv7, ARMV7);
145 PMC_CLASSDEP_TABLE(armv8, ARMV8);
146 PMC_CLASSDEP_TABLE(beri, BERI);
147 PMC_CLASSDEP_TABLE(mips24k, MIPS24K);
148 PMC_CLASSDEP_TABLE(mips74k, MIPS74K);
149 PMC_CLASSDEP_TABLE(octeon, OCTEON);
150 PMC_CLASSDEP_TABLE(ppc7450, PPC7450);
151 PMC_CLASSDEP_TABLE(ppc970, PPC970);
152 PMC_CLASSDEP_TABLE(e500, E500);
154 static struct pmc_event_descr soft_event_table[PMC_EV_DYN_COUNT];
156 #undef __PMC_EV_ALIAS
157 #define __PMC_EV_ALIAS(N,CODE) { N, PMC_EV_##CODE },
159 static const struct pmc_event_descr cortex_a8_event_table[] =
161 __PMC_EV_ALIAS_ARMV7_CORTEX_A8()
164 static const struct pmc_event_descr cortex_a9_event_table[] =
166 __PMC_EV_ALIAS_ARMV7_CORTEX_A9()
169 static const struct pmc_event_descr cortex_a53_event_table[] =
171 __PMC_EV_ALIAS_ARMV8_CORTEX_A53()
174 static const struct pmc_event_descr cortex_a57_event_table[] =
176 __PMC_EV_ALIAS_ARMV8_CORTEX_A57()
180 * PMC_MDEP_TABLE(NAME, PRIMARYCLASS, ADDITIONAL_CLASSES...)
182 * Map a CPU to the PMC classes it supports.
184 #define PMC_MDEP_TABLE(N,C,...) \
185 static const enum pmc_class N##_pmc_classes[] = { \
186 PMC_CLASS_##C, __VA_ARGS__ \
189 PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC);
190 PMC_MDEP_TABLE(xscale, XSCALE, PMC_CLASS_SOFT, PMC_CLASS_XSCALE);
191 PMC_MDEP_TABLE(beri, BERI, PMC_CLASS_SOFT, PMC_CLASS_BERI);
192 PMC_MDEP_TABLE(cortex_a8, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7);
193 PMC_MDEP_TABLE(cortex_a9, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7);
194 PMC_MDEP_TABLE(cortex_a53, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
195 PMC_MDEP_TABLE(cortex_a57, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8);
196 PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_SOFT, PMC_CLASS_MIPS24K);
197 PMC_MDEP_TABLE(mips74k, MIPS74K, PMC_CLASS_SOFT, PMC_CLASS_MIPS74K);
198 PMC_MDEP_TABLE(octeon, OCTEON, PMC_CLASS_SOFT, PMC_CLASS_OCTEON);
199 PMC_MDEP_TABLE(ppc7450, PPC7450, PMC_CLASS_SOFT, PMC_CLASS_PPC7450, PMC_CLASS_TSC);
200 PMC_MDEP_TABLE(ppc970, PPC970, PMC_CLASS_SOFT, PMC_CLASS_PPC970, PMC_CLASS_TSC);
201 PMC_MDEP_TABLE(e500, E500, PMC_CLASS_SOFT, PMC_CLASS_E500, PMC_CLASS_TSC);
202 PMC_MDEP_TABLE(generic, SOFT, PMC_CLASS_SOFT);
204 static const struct pmc_event_descr tsc_event_table[] =
209 #undef PMC_CLASS_TABLE_DESC
210 #define PMC_CLASS_TABLE_DESC(NAME, CLASS, EVENTS, ALLOCATOR) \
211 static const struct pmc_class_descr NAME##_class_table_descr = \
213 .pm_evc_name = #CLASS "-", \
214 .pm_evc_name_size = sizeof(#CLASS "-") - 1, \
215 .pm_evc_class = PMC_CLASS_##CLASS , \
216 .pm_evc_event_table = EVENTS##_event_table , \
217 .pm_evc_event_table_size = \
218 PMC_EVENT_TABLE_SIZE(EVENTS), \
219 .pm_evc_allocate_pmc = ALLOCATOR##_allocate_pmc \
222 #if defined(__i386__) || defined(__amd64__)
223 PMC_CLASS_TABLE_DESC(k8, K8, k8, k8);
225 #if defined(__i386__) || defined(__amd64__)
226 PMC_CLASS_TABLE_DESC(tsc, TSC, tsc, tsc);
229 #if defined(__XSCALE__)
230 PMC_CLASS_TABLE_DESC(xscale, XSCALE, xscale, xscale);
232 PMC_CLASS_TABLE_DESC(cortex_a8, ARMV7, cortex_a8, armv7);
233 PMC_CLASS_TABLE_DESC(cortex_a9, ARMV7, cortex_a9, armv7);
235 #if defined(__aarch64__)
236 PMC_CLASS_TABLE_DESC(cortex_a53, ARMV8, cortex_a53, arm64);
237 PMC_CLASS_TABLE_DESC(cortex_a57, ARMV8, cortex_a57, arm64);
239 #if defined(__mips__)
240 PMC_CLASS_TABLE_DESC(beri, BERI, beri, mips);
241 PMC_CLASS_TABLE_DESC(mips24k, MIPS24K, mips24k, mips);
242 PMC_CLASS_TABLE_DESC(mips74k, MIPS74K, mips74k, mips);
243 PMC_CLASS_TABLE_DESC(octeon, OCTEON, octeon, mips);
244 #endif /* __mips__ */
245 #if defined(__powerpc__)
246 PMC_CLASS_TABLE_DESC(ppc7450, PPC7450, ppc7450, powerpc);
247 PMC_CLASS_TABLE_DESC(ppc970, PPC970, ppc970, powerpc);
248 PMC_CLASS_TABLE_DESC(e500, E500, e500, powerpc);
251 static struct pmc_class_descr soft_class_table_descr =
253 .pm_evc_name = "SOFT-",
254 .pm_evc_name_size = sizeof("SOFT-") - 1,
255 .pm_evc_class = PMC_CLASS_SOFT,
256 .pm_evc_event_table = NULL,
257 .pm_evc_event_table_size = 0,
258 .pm_evc_allocate_pmc = soft_allocate_pmc
261 #undef PMC_CLASS_TABLE_DESC
263 static const struct pmc_class_descr **pmc_class_table;
264 #define PMC_CLASS_TABLE_SIZE cpu_info.pm_nclass
266 static const enum pmc_class *pmc_mdep_class_list;
267 static size_t pmc_mdep_class_list_size;
270 * Mapping tables, mapping enumeration values to human readable
274 static const char * pmc_capability_names[] = {
276 #define __PMC_CAP(N,V,D) #N ,
280 struct pmc_class_map {
281 enum pmc_class pm_class;
285 static const struct pmc_class_map pmc_class_names[] = {
287 #define __PMC_CLASS(S,V,D) { .pm_class = PMC_CLASS_##S, .pm_name = #S } ,
291 struct pmc_cputype_map {
292 enum pmc_cputype pm_cputype;
296 static const struct pmc_cputype_map pmc_cputype_names[] = {
298 #define __PMC_CPU(S, V, D) { .pm_cputype = PMC_CPU_##S, .pm_name = #S } ,
302 static const char * pmc_disposition_names[] = {
304 #define __PMC_DISP(D) #D ,
308 static const char * pmc_mode_names[] = {
310 #define __PMC_MODE(M,N) #M ,
314 static const char * pmc_state_names[] = {
316 #define __PMC_STATE(S) #S ,
321 * Filled in by pmc_init().
323 static int pmc_syscall = -1;
324 static struct pmc_cpuinfo cpu_info;
325 static struct pmc_op_getdyneventinfo soft_event_info;
327 /* Event masks for events */
330 const uint64_t pm_value;
332 #define PMCMASK(N,V) { .pm_name = #N, .pm_value = (V) }
333 #define NULLMASK { .pm_name = NULL }
335 #if defined(__amd64__) || defined(__i386__)
337 pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint64_t *evmask)
339 const struct pmc_masks *pm;
343 if (pmask == NULL) /* no mask keywords */
345 q = strchr(p, '='); /* skip '=' */
346 if (*++q == '\0') /* no more data */
348 c = 0; /* count of mask keywords seen */
349 while ((r = strsep(&q, "+")) != NULL) {
350 for (pm = pmask; pm->pm_name && strcasecmp(r, pm->pm_name);
353 if (pm->pm_name == NULL) /* not found */
355 *evmask |= pm->pm_value;
362 #define KWMATCH(p,kw) (strcasecmp((p), (kw)) == 0)
363 #define KWPREFIXMATCH(p,kw) (strncasecmp((p), (kw), sizeof((kw)) - 1) == 0)
364 #define EV_ALIAS(N,S) { .pm_alias = N, .pm_spec = S }
366 #if defined(__amd64__) || defined(__i386__)
372 static struct pmc_event_alias k8_aliases[] = {
373 EV_ALIAS("branches", "k8-fr-retired-taken-branches"),
374 EV_ALIAS("branch-mispredicts",
375 "k8-fr-retired-taken-branches-mispredicted"),
376 EV_ALIAS("cycles", "tsc"),
377 EV_ALIAS("dc-misses", "k8-dc-miss"),
378 EV_ALIAS("ic-misses", "k8-ic-miss"),
379 EV_ALIAS("instructions", "k8-fr-retired-x86-instructions"),
380 EV_ALIAS("interrupts", "k8-fr-taken-hardware-interrupts"),
381 EV_ALIAS("unhalted-cycles", "k8-bu-cpu-clk-unhalted"),
385 #define __K8MASK(N,V) PMCMASK(N,(1 << (V)))
391 /* fp dispatched fpu ops */
392 static const struct pmc_masks k8_mask_fdfo[] = {
393 __K8MASK(add-pipe-excluding-junk-ops, 0),
394 __K8MASK(multiply-pipe-excluding-junk-ops, 1),
395 __K8MASK(store-pipe-excluding-junk-ops, 2),
396 __K8MASK(add-pipe-junk-ops, 3),
397 __K8MASK(multiply-pipe-junk-ops, 4),
398 __K8MASK(store-pipe-junk-ops, 5),
402 /* ls segment register loads */
403 static const struct pmc_masks k8_mask_lsrl[] = {
414 /* ls locked operation */
415 static const struct pmc_masks k8_mask_llo[] = {
416 __K8MASK(locked-instructions, 0),
417 __K8MASK(cycles-in-request, 1),
418 __K8MASK(cycles-to-complete, 2),
422 /* dc refill from {l2,system} and dc copyback */
423 static const struct pmc_masks k8_mask_dc[] = {
424 __K8MASK(invalid, 0),
426 __K8MASK(exclusive, 2),
428 __K8MASK(modified, 4),
432 /* dc one bit ecc error */
433 static const struct pmc_masks k8_mask_dobee[] = {
434 __K8MASK(scrubber, 0),
435 __K8MASK(piggyback, 1),
439 /* dc dispatched prefetch instructions */
440 static const struct pmc_masks k8_mask_ddpi[] = {
447 /* dc dcache accesses by locks */
448 static const struct pmc_masks k8_mask_dabl[] = {
449 __K8MASK(accesses, 0),
454 /* bu internal l2 request */
455 static const struct pmc_masks k8_mask_bilr[] = {
456 __K8MASK(ic-fill, 0),
457 __K8MASK(dc-fill, 1),
458 __K8MASK(tlb-reload, 2),
459 __K8MASK(tag-snoop, 3),
460 __K8MASK(cancelled, 4),
464 /* bu fill request l2 miss */
465 static const struct pmc_masks k8_mask_bfrlm[] = {
466 __K8MASK(ic-fill, 0),
467 __K8MASK(dc-fill, 1),
468 __K8MASK(tlb-reload, 2),
472 /* bu fill into l2 */
473 static const struct pmc_masks k8_mask_bfil[] = {
474 __K8MASK(dirty-l2-victim, 0),
475 __K8MASK(victim-from-l2, 1),
479 /* fr retired fpu instructions */
480 static const struct pmc_masks k8_mask_frfi[] = {
482 __K8MASK(mmx-3dnow, 1),
483 __K8MASK(packed-sse-sse2, 2),
484 __K8MASK(scalar-sse-sse2, 3),
488 /* fr retired fastpath double op instructions */
489 static const struct pmc_masks k8_mask_frfdoi[] = {
490 __K8MASK(low-op-pos-0, 0),
491 __K8MASK(low-op-pos-1, 1),
492 __K8MASK(low-op-pos-2, 2),
496 /* fr fpu exceptions */
497 static const struct pmc_masks k8_mask_ffe[] = {
498 __K8MASK(x87-reclass-microfaults, 0),
499 __K8MASK(sse-retype-microfaults, 1),
500 __K8MASK(sse-reclass-microfaults, 2),
501 __K8MASK(sse-and-x87-microtraps, 3),
505 /* nb memory controller page access event */
506 static const struct pmc_masks k8_mask_nmcpae[] = {
507 __K8MASK(page-hit, 0),
508 __K8MASK(page-miss, 1),
509 __K8MASK(page-conflict, 2),
513 /* nb memory controller turnaround */
514 static const struct pmc_masks k8_mask_nmct[] = {
515 __K8MASK(dimm-turnaround, 0),
516 __K8MASK(read-to-write-turnaround, 1),
517 __K8MASK(write-to-read-turnaround, 2),
521 /* nb memory controller bypass saturation */
522 static const struct pmc_masks k8_mask_nmcbs[] = {
523 __K8MASK(memory-controller-hi-pri-bypass, 0),
524 __K8MASK(memory-controller-lo-pri-bypass, 1),
525 __K8MASK(dram-controller-interface-bypass, 2),
526 __K8MASK(dram-controller-queue-bypass, 3),
530 /* nb sized commands */
531 static const struct pmc_masks k8_mask_nsc[] = {
532 __K8MASK(nonpostwrszbyte, 0),
533 __K8MASK(nonpostwrszdword, 1),
534 __K8MASK(postwrszbyte, 2),
535 __K8MASK(postwrszdword, 3),
536 __K8MASK(rdszbyte, 4),
537 __K8MASK(rdszdword, 5),
538 __K8MASK(rdmodwr, 6),
542 /* nb probe result */
543 static const struct pmc_masks k8_mask_npr[] = {
544 __K8MASK(probe-miss, 0),
545 __K8MASK(probe-hit, 1),
546 __K8MASK(probe-hit-dirty-no-memory-cancel, 2),
547 __K8MASK(probe-hit-dirty-with-memory-cancel, 3),
551 /* nb hypertransport bus bandwidth */
552 static const struct pmc_masks k8_mask_nhbb[] = { /* HT bus bandwidth */
553 __K8MASK(command, 0),
555 __K8MASK(buffer-release, 2),
562 #define K8_KW_COUNT "count"
563 #define K8_KW_EDGE "edge"
564 #define K8_KW_INV "inv"
565 #define K8_KW_MASK "mask"
566 #define K8_KW_OS "os"
567 #define K8_KW_USR "usr"
570 k8_allocate_pmc(enum pmc_event pe, char *ctrspec,
571 struct pmc_op_pmcallocate *pmc_config)
577 const struct pmc_masks *pm, *pmask;
579 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
580 pmc_config->pm_md.pm_amd.pm_amd_config = 0;
585 #define __K8SETMASK(M) pmask = k8_mask_##M
587 /* setup parsing tables */
589 case PMC_EV_K8_FP_DISPATCHED_FPU_OPS:
592 case PMC_EV_K8_LS_SEGMENT_REGISTER_LOAD:
595 case PMC_EV_K8_LS_LOCKED_OPERATION:
598 case PMC_EV_K8_DC_REFILL_FROM_L2:
599 case PMC_EV_K8_DC_REFILL_FROM_SYSTEM:
600 case PMC_EV_K8_DC_COPYBACK:
603 case PMC_EV_K8_DC_ONE_BIT_ECC_ERROR:
606 case PMC_EV_K8_DC_DISPATCHED_PREFETCH_INSTRUCTIONS:
609 case PMC_EV_K8_DC_DCACHE_ACCESSES_BY_LOCKS:
612 case PMC_EV_K8_BU_INTERNAL_L2_REQUEST:
615 case PMC_EV_K8_BU_FILL_REQUEST_L2_MISS:
618 case PMC_EV_K8_BU_FILL_INTO_L2:
621 case PMC_EV_K8_FR_RETIRED_FPU_INSTRUCTIONS:
624 case PMC_EV_K8_FR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS:
627 case PMC_EV_K8_FR_FPU_EXCEPTIONS:
630 case PMC_EV_K8_NB_MEMORY_CONTROLLER_PAGE_ACCESS_EVENT:
633 case PMC_EV_K8_NB_MEMORY_CONTROLLER_TURNAROUND:
636 case PMC_EV_K8_NB_MEMORY_CONTROLLER_BYPASS_SATURATION:
639 case PMC_EV_K8_NB_SIZED_COMMANDS:
642 case PMC_EV_K8_NB_PROBE_RESULT:
645 case PMC_EV_K8_NB_HT_BUS0_BANDWIDTH:
646 case PMC_EV_K8_NB_HT_BUS1_BANDWIDTH:
647 case PMC_EV_K8_NB_HT_BUS2_BANDWIDTH:
652 break; /* no options defined */
655 while ((p = strsep(&ctrspec, ",")) != NULL) {
656 if (KWPREFIXMATCH(p, K8_KW_COUNT "=")) {
658 if (*++q == '\0') /* skip '=' */
661 count = strtol(q, &e, 0);
662 if (e == q || *e != '\0')
665 pmc_config->pm_caps |= PMC_CAP_THRESHOLD;
666 pmc_config->pm_md.pm_amd.pm_amd_config |=
667 AMD_PMC_TO_COUNTER(count);
669 } else if (KWMATCH(p, K8_KW_EDGE)) {
670 pmc_config->pm_caps |= PMC_CAP_EDGE;
671 } else if (KWMATCH(p, K8_KW_INV)) {
672 pmc_config->pm_caps |= PMC_CAP_INVERT;
673 } else if (KWPREFIXMATCH(p, K8_KW_MASK "=")) {
674 if ((n = pmc_parse_mask(pmask, p, &evmask)) < 0)
676 pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
677 } else if (KWMATCH(p, K8_KW_OS)) {
678 pmc_config->pm_caps |= PMC_CAP_SYSTEM;
679 } else if (KWMATCH(p, K8_KW_USR)) {
680 pmc_config->pm_caps |= PMC_CAP_USER;
685 /* other post processing */
687 case PMC_EV_K8_FP_DISPATCHED_FPU_OPS:
688 case PMC_EV_K8_FP_CYCLES_WITH_NO_FPU_OPS_RETIRED:
689 case PMC_EV_K8_FP_DISPATCHED_FPU_FAST_FLAG_OPS:
690 case PMC_EV_K8_FR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS:
691 case PMC_EV_K8_FR_RETIRED_FPU_INSTRUCTIONS:
692 case PMC_EV_K8_FR_FPU_EXCEPTIONS:
693 /* XXX only available in rev B and later */
695 case PMC_EV_K8_DC_DCACHE_ACCESSES_BY_LOCKS:
696 /* XXX only available in rev C and later */
698 case PMC_EV_K8_LS_LOCKED_OPERATION:
699 /* XXX CPU Rev A,B evmask is to be zero */
700 if (evmask & (evmask - 1)) /* > 1 bit set */
703 evmask = 0x01; /* Rev C and later: #instrs */
704 pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
708 if (evmask == 0 && pmask != NULL) {
709 for (pm = pmask; pm->pm_name; pm++)
710 evmask |= pm->pm_value;
711 pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
715 if (pmc_config->pm_caps & PMC_CAP_QUALIFIER)
716 pmc_config->pm_md.pm_amd.pm_amd_config =
717 AMD_PMC_TO_UNITMASK(evmask);
724 #if defined(__i386__) || defined(__amd64__)
726 tsc_allocate_pmc(enum pmc_event pe, char *ctrspec,
727 struct pmc_op_pmcallocate *pmc_config)
729 if (pe != PMC_EV_TSC_TSC)
732 /* TSC events must be unqualified. */
733 if (ctrspec && *ctrspec != '\0')
736 pmc_config->pm_md.pm_amd.pm_amd_config = 0;
737 pmc_config->pm_caps |= PMC_CAP_READ;
743 static struct pmc_event_alias generic_aliases[] = {
744 EV_ALIAS("instructions", "SOFT-CLOCK.HARD"),
749 soft_allocate_pmc(enum pmc_event pe, char *ctrspec,
750 struct pmc_op_pmcallocate *pmc_config)
755 if ((int)pe < PMC_EV_SOFT_FIRST || (int)pe > PMC_EV_SOFT_LAST)
758 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
763 #if defined(__XSCALE__)
765 static struct pmc_event_alias xscale_aliases[] = {
766 EV_ALIAS("branches", "BRANCH_RETIRED"),
767 EV_ALIAS("branch-mispredicts", "BRANCH_MISPRED"),
768 EV_ALIAS("dc-misses", "DC_MISS"),
769 EV_ALIAS("ic-misses", "IC_MISS"),
770 EV_ALIAS("instructions", "INSTR_RETIRED"),
774 xscale_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
775 struct pmc_op_pmcallocate *pmc_config __unused)
786 static struct pmc_event_alias cortex_a8_aliases[] = {
787 EV_ALIAS("dc-misses", "L1_DCACHE_REFILL"),
788 EV_ALIAS("ic-misses", "L1_ICACHE_REFILL"),
789 EV_ALIAS("instructions", "INSTR_EXECUTED"),
793 static struct pmc_event_alias cortex_a9_aliases[] = {
794 EV_ALIAS("dc-misses", "L1_DCACHE_REFILL"),
795 EV_ALIAS("ic-misses", "L1_ICACHE_REFILL"),
796 EV_ALIAS("instructions", "INSTR_EXECUTED"),
801 armv7_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
802 struct pmc_op_pmcallocate *pmc_config __unused)
813 #if defined(__aarch64__)
814 static struct pmc_event_alias cortex_a53_aliases[] = {
817 static struct pmc_event_alias cortex_a57_aliases[] = {
821 arm64_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
822 struct pmc_op_pmcallocate *pmc_config __unused)
833 #if defined(__mips__)
835 static struct pmc_event_alias beri_aliases[] = {
836 EV_ALIAS("instructions", "INST"),
840 static struct pmc_event_alias mips24k_aliases[] = {
841 EV_ALIAS("instructions", "INSTR_EXECUTED"),
842 EV_ALIAS("branches", "BRANCH_COMPLETED"),
843 EV_ALIAS("branch-mispredicts", "BRANCH_MISPRED"),
847 static struct pmc_event_alias mips74k_aliases[] = {
848 EV_ALIAS("instructions", "INSTR_EXECUTED"),
849 EV_ALIAS("branches", "BRANCH_INSNS"),
850 EV_ALIAS("branch-mispredicts", "MISPREDICTED_BRANCH_INSNS"),
854 static struct pmc_event_alias octeon_aliases[] = {
855 EV_ALIAS("instructions", "RET"),
856 EV_ALIAS("branches", "BR"),
857 EV_ALIAS("branch-mispredicts", "BRMIS"),
861 #define MIPS_KW_OS "os"
862 #define MIPS_KW_USR "usr"
863 #define MIPS_KW_ANYTHREAD "anythread"
866 mips_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
867 struct pmc_op_pmcallocate *pmc_config __unused)
873 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
875 while ((p = strsep(&ctrspec, ",")) != NULL) {
876 if (KWMATCH(p, MIPS_KW_OS))
877 pmc_config->pm_caps |= PMC_CAP_SYSTEM;
878 else if (KWMATCH(p, MIPS_KW_USR))
879 pmc_config->pm_caps |= PMC_CAP_USER;
880 else if (KWMATCH(p, MIPS_KW_ANYTHREAD))
881 pmc_config->pm_caps |= (PMC_CAP_USER | PMC_CAP_SYSTEM);
889 #endif /* __mips__ */
891 #if defined(__powerpc__)
893 static struct pmc_event_alias ppc7450_aliases[] = {
894 EV_ALIAS("instructions", "INSTR_COMPLETED"),
895 EV_ALIAS("branches", "BRANCHES_COMPLETED"),
896 EV_ALIAS("branch-mispredicts", "MISPREDICTED_BRANCHES"),
900 static struct pmc_event_alias ppc970_aliases[] = {
901 EV_ALIAS("instructions", "INSTR_COMPLETED"),
902 EV_ALIAS("cycles", "CYCLES"),
906 static struct pmc_event_alias e500_aliases[] = {
907 EV_ALIAS("instructions", "INSTR_COMPLETED"),
908 EV_ALIAS("cycles", "CYCLES"),
912 #define POWERPC_KW_OS "os"
913 #define POWERPC_KW_USR "usr"
914 #define POWERPC_KW_ANYTHREAD "anythread"
917 powerpc_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
918 struct pmc_op_pmcallocate *pmc_config __unused)
924 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
926 while ((p = strsep(&ctrspec, ",")) != NULL) {
927 if (KWMATCH(p, POWERPC_KW_OS))
928 pmc_config->pm_caps |= PMC_CAP_SYSTEM;
929 else if (KWMATCH(p, POWERPC_KW_USR))
930 pmc_config->pm_caps |= PMC_CAP_USER;
931 else if (KWMATCH(p, POWERPC_KW_ANYTHREAD))
932 pmc_config->pm_caps |= (PMC_CAP_USER | PMC_CAP_SYSTEM);
940 #endif /* __powerpc__ */
944 * Match an event name `name' with its canonical form.
946 * Matches are case insensitive and spaces, periods, underscores and
947 * hyphen characters are considered to match each other.
949 * Returns 1 for a match, 0 otherwise.
953 pmc_match_event_name(const char *name, const char *canonicalname)
956 const unsigned char *c, *n;
958 c = (const unsigned char *) canonicalname;
959 n = (const unsigned char *) name;
961 for (; (nc = *n) && (cc = *c); n++, c++) {
963 if ((nc == ' ' || nc == '_' || nc == '-' || nc == '.') &&
964 (cc == ' ' || cc == '_' || cc == '-' || cc == '.'))
967 if (toupper(nc) == toupper(cc))
974 if (*n == '\0' && *c == '\0')
981 * Match an event name against all the event named supported by a
984 * Returns an event descriptor pointer on match or NULL otherwise.
986 static const struct pmc_event_descr *
987 pmc_match_event_class(const char *name,
988 const struct pmc_class_descr *pcd)
991 const struct pmc_event_descr *ev;
993 ev = pcd->pm_evc_event_table;
994 for (n = 0; n < pcd->pm_evc_event_table_size; n++, ev++)
995 if (pmc_match_event_name(name, ev->pm_ev_name))
1002 pmc_mdep_is_compatible_class(enum pmc_class pc)
1006 for (n = 0; n < pmc_mdep_class_list_size; n++)
1007 if (pmc_mdep_class_list[n] == pc)
1017 pmc_allocate(const char *ctrspec, enum pmc_mode mode,
1018 uint32_t flags, int cpu, pmc_id_t *pmcid,
1023 char *r, *spec_copy;
1024 const char *ctrname;
1025 const struct pmc_event_descr *ev;
1026 const struct pmc_event_alias *alias;
1027 struct pmc_op_pmcallocate pmc_config;
1028 const struct pmc_class_descr *pcd;
1033 if (mode != PMC_MODE_SS && mode != PMC_MODE_TS &&
1034 mode != PMC_MODE_SC && mode != PMC_MODE_TC) {
1038 bzero(&pmc_config, sizeof(pmc_config));
1039 pmc_config.pm_cpu = cpu;
1040 pmc_config.pm_mode = mode;
1041 pmc_config.pm_flags = flags;
1042 pmc_config.pm_count = count;
1043 if (PMC_IS_SAMPLING_MODE(mode))
1044 pmc_config.pm_caps |= PMC_CAP_INTERRUPT;
1046 * Can we pull this straight from the pmu table?
1048 r = spec_copy = strdup(ctrspec);
1049 ctrname = strsep(&r, ",");
1050 if (pmc_pmu_enabled()) {
1051 if (pmc_pmu_pmcallocate(ctrname, &pmc_config) == 0) {
1052 if (PMC_CALL(PMCALLOCATE, &pmc_config) < 0) {
1056 *pmcid = pmc_config.pm_pmcid;
1059 errx(EX_USAGE, "ERROR: pmc_pmu_allocate failed, check for ctrname %s\n", ctrname);
1065 /* replace an event alias with the canonical event specifier */
1066 if (pmc_mdep_event_aliases)
1067 for (alias = pmc_mdep_event_aliases; alias->pm_alias; alias++)
1068 if (!strcasecmp(ctrspec, alias->pm_alias)) {
1069 spec_copy = strdup(alias->pm_spec);
1073 if (spec_copy == NULL)
1074 spec_copy = strdup(ctrspec);
1077 ctrname = strsep(&r, ",");
1080 * If a explicit class prefix was given by the user, restrict the
1081 * search for the event to the specified PMC class.
1084 for (n = 0; n < PMC_CLASS_TABLE_SIZE; n++) {
1085 pcd = pmc_class_table[n];
1086 if (pcd && pmc_mdep_is_compatible_class(pcd->pm_evc_class) &&
1087 strncasecmp(ctrname, pcd->pm_evc_name,
1088 pcd->pm_evc_name_size) == 0) {
1089 if ((ev = pmc_match_event_class(ctrname +
1090 pcd->pm_evc_name_size, pcd)) == NULL) {
1099 * Otherwise, search for this event in all compatible PMC
1102 for (n = 0; ev == NULL && n < PMC_CLASS_TABLE_SIZE; n++) {
1103 pcd = pmc_class_table[n];
1104 if (pcd && pmc_mdep_is_compatible_class(pcd->pm_evc_class))
1105 ev = pmc_match_event_class(ctrname, pcd);
1113 pmc_config.pm_ev = ev->pm_ev_code;
1114 pmc_config.pm_class = pcd->pm_evc_class;
1116 if (pcd->pm_evc_allocate_pmc(ev->pm_ev_code, r, &pmc_config) < 0) {
1121 if (PMC_CALL(PMCALLOCATE, &pmc_config) < 0)
1124 *pmcid = pmc_config.pm_pmcid;
1136 pmc_attach(pmc_id_t pmc, pid_t pid)
1138 struct pmc_op_pmcattach pmc_attach_args;
1140 pmc_attach_args.pm_pmc = pmc;
1141 pmc_attach_args.pm_pid = pid;
1143 return (PMC_CALL(PMCATTACH, &pmc_attach_args));
1147 pmc_capabilities(pmc_id_t pmcid, uint32_t *caps)
1152 cl = PMC_ID_TO_CLASS(pmcid);
1153 for (i = 0; i < cpu_info.pm_nclass; i++)
1154 if (cpu_info.pm_classes[i].pm_class == cl) {
1155 *caps = cpu_info.pm_classes[i].pm_caps;
1163 pmc_configure_logfile(int fd)
1165 struct pmc_op_configurelog cla;
1168 if (PMC_CALL(CONFIGURELOG, &cla) < 0)
1174 pmc_cpuinfo(const struct pmc_cpuinfo **pci)
1176 if (pmc_syscall == -1) {
1186 pmc_detach(pmc_id_t pmc, pid_t pid)
1188 struct pmc_op_pmcattach pmc_detach_args;
1190 pmc_detach_args.pm_pmc = pmc;
1191 pmc_detach_args.pm_pid = pid;
1192 return (PMC_CALL(PMCDETACH, &pmc_detach_args));
1196 pmc_disable(int cpu, int pmc)
1198 struct pmc_op_pmcadmin ssa;
1202 ssa.pm_state = PMC_STATE_DISABLED;
1203 return (PMC_CALL(PMCADMIN, &ssa));
1207 pmc_enable(int cpu, int pmc)
1209 struct pmc_op_pmcadmin ssa;
1213 ssa.pm_state = PMC_STATE_FREE;
1214 return (PMC_CALL(PMCADMIN, &ssa));
1218 * Return a list of events known to a given PMC class. 'cl' is the
1219 * PMC class identifier, 'eventnames' is the returned list of 'const
1220 * char *' pointers pointing to the names of the events. 'nevents' is
1221 * the number of event name pointers returned.
1223 * The space for 'eventnames' is allocated using malloc(3). The caller
1224 * is responsible for freeing this space when done.
1227 pmc_event_names_of_class(enum pmc_class cl, const char ***eventnames,
1232 const struct pmc_event_descr *ev;
1237 ev = iaf_event_table;
1238 count = PMC_EVENT_TABLE_SIZE(iaf);
1241 ev = tsc_event_table;
1242 count = PMC_EVENT_TABLE_SIZE(tsc);
1245 ev = k8_event_table;
1246 count = PMC_EVENT_TABLE_SIZE(k8);
1248 case PMC_CLASS_XSCALE:
1249 ev = xscale_event_table;
1250 count = PMC_EVENT_TABLE_SIZE(xscale);
1252 case PMC_CLASS_ARMV7:
1253 switch (cpu_info.pm_cputype) {
1255 case PMC_CPU_ARMV7_CORTEX_A8:
1256 ev = cortex_a8_event_table;
1257 count = PMC_EVENT_TABLE_SIZE(cortex_a8);
1259 case PMC_CPU_ARMV7_CORTEX_A9:
1260 ev = cortex_a9_event_table;
1261 count = PMC_EVENT_TABLE_SIZE(cortex_a9);
1265 case PMC_CLASS_ARMV8:
1266 switch (cpu_info.pm_cputype) {
1268 case PMC_CPU_ARMV8_CORTEX_A53:
1269 ev = cortex_a53_event_table;
1270 count = PMC_EVENT_TABLE_SIZE(cortex_a53);
1272 case PMC_CPU_ARMV8_CORTEX_A57:
1273 ev = cortex_a57_event_table;
1274 count = PMC_EVENT_TABLE_SIZE(cortex_a57);
1278 case PMC_CLASS_BERI:
1279 ev = beri_event_table;
1280 count = PMC_EVENT_TABLE_SIZE(beri);
1282 case PMC_CLASS_MIPS24K:
1283 ev = mips24k_event_table;
1284 count = PMC_EVENT_TABLE_SIZE(mips24k);
1286 case PMC_CLASS_MIPS74K:
1287 ev = mips74k_event_table;
1288 count = PMC_EVENT_TABLE_SIZE(mips74k);
1290 case PMC_CLASS_OCTEON:
1291 ev = octeon_event_table;
1292 count = PMC_EVENT_TABLE_SIZE(octeon);
1294 case PMC_CLASS_PPC7450:
1295 ev = ppc7450_event_table;
1296 count = PMC_EVENT_TABLE_SIZE(ppc7450);
1298 case PMC_CLASS_PPC970:
1299 ev = ppc970_event_table;
1300 count = PMC_EVENT_TABLE_SIZE(ppc970);
1302 case PMC_CLASS_E500:
1303 ev = e500_event_table;
1304 count = PMC_EVENT_TABLE_SIZE(e500);
1306 case PMC_CLASS_SOFT:
1307 ev = soft_event_table;
1308 count = soft_event_info.pm_nevent;
1315 if ((names = malloc(count * sizeof(const char *))) == NULL)
1318 *eventnames = names;
1321 for (;count--; ev++, names++)
1322 *names = ev->pm_ev_name;
1328 pmc_flush_logfile(void)
1330 return (PMC_CALL(FLUSHLOG,0));
1334 pmc_close_logfile(void)
1336 return (PMC_CALL(CLOSELOG,0));
1340 pmc_get_driver_stats(struct pmc_driverstats *ds)
1342 struct pmc_op_getdriverstats gms;
1344 if (PMC_CALL(GETDRIVERSTATS, &gms) < 0)
1347 /* copy out fields in the current userland<->library interface */
1348 ds->pm_intr_ignored = gms.pm_intr_ignored;
1349 ds->pm_intr_processed = gms.pm_intr_processed;
1350 ds->pm_intr_bufferfull = gms.pm_intr_bufferfull;
1351 ds->pm_syscalls = gms.pm_syscalls;
1352 ds->pm_syscall_errors = gms.pm_syscall_errors;
1353 ds->pm_buffer_requests = gms.pm_buffer_requests;
1354 ds->pm_buffer_requests_failed = gms.pm_buffer_requests_failed;
1355 ds->pm_log_sweeps = gms.pm_log_sweeps;
1360 pmc_get_msr(pmc_id_t pmc, uint32_t *msr)
1362 struct pmc_op_getmsr gm;
1365 if (PMC_CALL(PMCGETMSR, &gm) < 0)
1374 int error, pmc_mod_id;
1376 uint32_t abi_version;
1377 struct module_stat pmc_modstat;
1378 struct pmc_op_getcpuinfo op_cpu_info;
1379 #if defined(__amd64__) || defined(__i386__)
1380 int cpu_has_iaf_counters;
1384 if (pmc_syscall != -1) /* already inited */
1387 /* retrieve the system call number from the KLD */
1388 if ((pmc_mod_id = modfind(PMC_MODULE_NAME)) < 0)
1391 pmc_modstat.version = sizeof(struct module_stat);
1392 if ((error = modstat(pmc_mod_id, &pmc_modstat)) < 0)
1395 pmc_syscall = pmc_modstat.data.intval;
1397 /* check the kernel module's ABI against our compiled-in version */
1398 abi_version = PMC_VERSION;
1399 if (PMC_CALL(GETMODULEVERSION, &abi_version) < 0)
1400 return (pmc_syscall = -1);
1402 /* ignore patch & minor numbers for the comparison */
1403 if ((abi_version & 0xFF000000) != (PMC_VERSION & 0xFF000000)) {
1404 errno = EPROGMISMATCH;
1405 return (pmc_syscall = -1);
1408 bzero(&op_cpu_info, sizeof(op_cpu_info));
1409 if (PMC_CALL(GETCPUINFO, &op_cpu_info) < 0)
1410 return (pmc_syscall = -1);
1412 cpu_info.pm_cputype = op_cpu_info.pm_cputype;
1413 cpu_info.pm_ncpu = op_cpu_info.pm_ncpu;
1414 cpu_info.pm_npmc = op_cpu_info.pm_npmc;
1415 cpu_info.pm_nclass = op_cpu_info.pm_nclass;
1416 for (n = 0; n < op_cpu_info.pm_nclass; n++)
1417 memcpy(&cpu_info.pm_classes[n], &op_cpu_info.pm_classes[n],
1418 sizeof(cpu_info.pm_classes[n]));
1420 pmc_class_table = malloc(PMC_CLASS_TABLE_SIZE *
1421 sizeof(struct pmc_class_descr *));
1423 if (pmc_class_table == NULL)
1426 for (n = 0; n < PMC_CLASS_TABLE_SIZE; n++)
1427 pmc_class_table[n] = NULL;
1430 * Get soft events list.
1432 soft_event_info.pm_class = PMC_CLASS_SOFT;
1433 if (PMC_CALL(GETDYNEVENTINFO, &soft_event_info) < 0)
1434 return (pmc_syscall = -1);
1436 /* Map soft events to static list. */
1437 for (n = 0; n < soft_event_info.pm_nevent; n++) {
1438 soft_event_table[n].pm_ev_name =
1439 soft_event_info.pm_events[n].pm_ev_name;
1440 soft_event_table[n].pm_ev_code =
1441 soft_event_info.pm_events[n].pm_ev_code;
1443 soft_class_table_descr.pm_evc_event_table_size = \
1444 soft_event_info.pm_nevent;
1445 soft_class_table_descr.pm_evc_event_table = \
1449 * Fill in the class table.
1453 /* Fill soft events information. */
1454 pmc_class_table[n++] = &soft_class_table_descr;
1455 #if defined(__amd64__) || defined(__i386__)
1456 if (cpu_info.pm_cputype != PMC_CPU_GENERIC)
1457 pmc_class_table[n++] = &tsc_class_table_descr;
1460 * Check if this CPU has fixed function counters.
1462 cpu_has_iaf_counters = 0;
1463 for (t = 0; t < cpu_info.pm_nclass; t++)
1464 if (cpu_info.pm_classes[t].pm_class == PMC_CLASS_IAF &&
1465 cpu_info.pm_classes[t].pm_num > 0)
1466 cpu_has_iaf_counters = 1;
1469 #define PMC_MDEP_INIT(C) do { \
1470 pmc_mdep_event_aliases = C##_aliases; \
1471 pmc_mdep_class_list = C##_pmc_classes; \
1472 pmc_mdep_class_list_size = \
1473 PMC_TABLE_SIZE(C##_pmc_classes); \
1476 #define PMC_MDEP_INIT_INTEL_V2(C) do { \
1478 pmc_class_table[n++] = &iaf_class_table_descr; \
1479 if (!cpu_has_iaf_counters) \
1480 pmc_mdep_event_aliases = \
1481 C##_aliases_without_iaf; \
1482 pmc_class_table[n] = &C##_class_table_descr; \
1485 /* Configure the event name parser. */
1486 switch (cpu_info.pm_cputype) {
1487 #if defined(__amd64__) || defined(__i386__)
1488 case PMC_CPU_AMD_K8:
1490 pmc_class_table[n] = &k8_class_table_descr;
1493 case PMC_CPU_GENERIC:
1494 PMC_MDEP_INIT(generic);
1496 #if defined(__arm__)
1497 #if defined(__XSCALE__)
1498 case PMC_CPU_INTEL_XSCALE:
1499 PMC_MDEP_INIT(xscale);
1500 pmc_class_table[n] = &xscale_class_table_descr;
1503 case PMC_CPU_ARMV7_CORTEX_A8:
1504 PMC_MDEP_INIT(cortex_a8);
1505 pmc_class_table[n] = &cortex_a8_class_table_descr;
1507 case PMC_CPU_ARMV7_CORTEX_A9:
1508 PMC_MDEP_INIT(cortex_a9);
1509 pmc_class_table[n] = &cortex_a9_class_table_descr;
1512 #if defined(__aarch64__)
1513 case PMC_CPU_ARMV8_CORTEX_A53:
1514 PMC_MDEP_INIT(cortex_a53);
1515 pmc_class_table[n] = &cortex_a53_class_table_descr;
1517 case PMC_CPU_ARMV8_CORTEX_A57:
1518 PMC_MDEP_INIT(cortex_a57);
1519 pmc_class_table[n] = &cortex_a57_class_table_descr;
1522 #if defined(__mips__)
1523 case PMC_CPU_MIPS_BERI:
1524 PMC_MDEP_INIT(beri);
1525 pmc_class_table[n] = &beri_class_table_descr;
1527 case PMC_CPU_MIPS_24K:
1528 PMC_MDEP_INIT(mips24k);
1529 pmc_class_table[n] = &mips24k_class_table_descr;
1531 case PMC_CPU_MIPS_74K:
1532 PMC_MDEP_INIT(mips74k);
1533 pmc_class_table[n] = &mips74k_class_table_descr;
1535 case PMC_CPU_MIPS_OCTEON:
1536 PMC_MDEP_INIT(octeon);
1537 pmc_class_table[n] = &octeon_class_table_descr;
1539 #endif /* __mips__ */
1540 #if defined(__powerpc__)
1541 case PMC_CPU_PPC_7450:
1542 PMC_MDEP_INIT(ppc7450);
1543 pmc_class_table[n] = &ppc7450_class_table_descr;
1545 case PMC_CPU_PPC_970:
1546 PMC_MDEP_INIT(ppc970);
1547 pmc_class_table[n] = &ppc970_class_table_descr;
1549 case PMC_CPU_PPC_E500:
1550 PMC_MDEP_INIT(e500);
1551 pmc_class_table[n] = &e500_class_table_descr;
1556 * Some kind of CPU this version of the library knows nothing
1557 * about. This shouldn't happen since the abi version check
1558 * should have caught this.
1560 #if defined(__amd64__) || defined(__i386__)
1564 return (pmc_syscall = -1);
1571 pmc_name_of_capability(enum pmc_caps cap)
1576 * 'cap' should have a single bit set and should be in
1579 if ((cap & (cap - 1)) || cap < PMC_CAP_FIRST ||
1580 cap > PMC_CAP_LAST) {
1586 return (pmc_capability_names[i - 1]);
1590 pmc_name_of_class(enum pmc_class pc)
1594 for (n = 0; n < PMC_TABLE_SIZE(pmc_class_names); n++)
1595 if (pc == pmc_class_names[n].pm_class)
1596 return (pmc_class_names[n].pm_name);
1603 pmc_name_of_cputype(enum pmc_cputype cp)
1607 for (n = 0; n < PMC_TABLE_SIZE(pmc_cputype_names); n++)
1608 if (cp == pmc_cputype_names[n].pm_cputype)
1609 return (pmc_cputype_names[n].pm_name);
1616 pmc_name_of_disposition(enum pmc_disp pd)
1618 if ((int) pd >= PMC_DISP_FIRST &&
1619 pd <= PMC_DISP_LAST)
1620 return (pmc_disposition_names[pd]);
1627 _pmc_name_of_event(enum pmc_event pe, enum pmc_cputype cpu)
1629 const struct pmc_event_descr *ev, *evfence;
1631 ev = evfence = NULL;
1632 if (pe >= PMC_EV_K8_FIRST && pe <= PMC_EV_K8_LAST) {
1633 ev = k8_event_table;
1634 evfence = k8_event_table + PMC_EVENT_TABLE_SIZE(k8);
1635 } else if (pe >= PMC_EV_XSCALE_FIRST && pe <= PMC_EV_XSCALE_LAST) {
1636 ev = xscale_event_table;
1637 evfence = xscale_event_table + PMC_EVENT_TABLE_SIZE(xscale);
1638 } else if (pe >= PMC_EV_ARMV7_FIRST && pe <= PMC_EV_ARMV7_LAST) {
1640 case PMC_CPU_ARMV7_CORTEX_A8:
1641 ev = cortex_a8_event_table;
1642 evfence = cortex_a8_event_table + PMC_EVENT_TABLE_SIZE(cortex_a8);
1644 case PMC_CPU_ARMV7_CORTEX_A9:
1645 ev = cortex_a9_event_table;
1646 evfence = cortex_a9_event_table + PMC_EVENT_TABLE_SIZE(cortex_a9);
1648 default: /* Unknown CPU type. */
1651 } else if (pe >= PMC_EV_ARMV8_FIRST && pe <= PMC_EV_ARMV8_LAST) {
1653 case PMC_CPU_ARMV8_CORTEX_A53:
1654 ev = cortex_a53_event_table;
1655 evfence = cortex_a53_event_table + PMC_EVENT_TABLE_SIZE(cortex_a53);
1657 case PMC_CPU_ARMV8_CORTEX_A57:
1658 ev = cortex_a57_event_table;
1659 evfence = cortex_a57_event_table + PMC_EVENT_TABLE_SIZE(cortex_a57);
1661 default: /* Unknown CPU type. */
1664 } else if (pe >= PMC_EV_BERI_FIRST && pe <= PMC_EV_BERI_LAST) {
1665 ev = beri_event_table;
1666 evfence = beri_event_table + PMC_EVENT_TABLE_SIZE(beri);
1667 } else if (pe >= PMC_EV_MIPS24K_FIRST && pe <= PMC_EV_MIPS24K_LAST) {
1668 ev = mips24k_event_table;
1669 evfence = mips24k_event_table + PMC_EVENT_TABLE_SIZE(mips24k);
1670 } else if (pe >= PMC_EV_MIPS74K_FIRST && pe <= PMC_EV_MIPS74K_LAST) {
1671 ev = mips74k_event_table;
1672 evfence = mips74k_event_table + PMC_EVENT_TABLE_SIZE(mips74k);
1673 } else if (pe >= PMC_EV_OCTEON_FIRST && pe <= PMC_EV_OCTEON_LAST) {
1674 ev = octeon_event_table;
1675 evfence = octeon_event_table + PMC_EVENT_TABLE_SIZE(octeon);
1676 } else if (pe >= PMC_EV_PPC7450_FIRST && pe <= PMC_EV_PPC7450_LAST) {
1677 ev = ppc7450_event_table;
1678 evfence = ppc7450_event_table + PMC_EVENT_TABLE_SIZE(ppc7450);
1679 } else if (pe >= PMC_EV_PPC970_FIRST && pe <= PMC_EV_PPC970_LAST) {
1680 ev = ppc970_event_table;
1681 evfence = ppc970_event_table + PMC_EVENT_TABLE_SIZE(ppc970);
1682 } else if (pe >= PMC_EV_E500_FIRST && pe <= PMC_EV_E500_LAST) {
1683 ev = e500_event_table;
1684 evfence = e500_event_table + PMC_EVENT_TABLE_SIZE(e500);
1685 } else if (pe == PMC_EV_TSC_TSC) {
1686 ev = tsc_event_table;
1687 evfence = tsc_event_table + PMC_EVENT_TABLE_SIZE(tsc);
1688 } else if ((int)pe >= PMC_EV_SOFT_FIRST && (int)pe <= PMC_EV_SOFT_LAST) {
1689 ev = soft_event_table;
1690 evfence = soft_event_table + soft_event_info.pm_nevent;
1693 for (; ev != evfence; ev++)
1694 if (pe == ev->pm_ev_code)
1695 return (ev->pm_ev_name);
1701 pmc_name_of_event(enum pmc_event pe)
1705 if ((n = _pmc_name_of_event(pe, cpu_info.pm_cputype)) != NULL)
1713 pmc_name_of_mode(enum pmc_mode pm)
1715 if ((int) pm >= PMC_MODE_FIRST &&
1716 pm <= PMC_MODE_LAST)
1717 return (pmc_mode_names[pm]);
1724 pmc_name_of_state(enum pmc_state ps)
1726 if ((int) ps >= PMC_STATE_FIRST &&
1727 ps <= PMC_STATE_LAST)
1728 return (pmc_state_names[ps]);
1737 if (pmc_syscall == -1) {
1742 return (cpu_info.pm_ncpu);
1748 if (pmc_syscall == -1) {
1753 if (cpu < 0 || cpu >= (int) cpu_info.pm_ncpu) {
1758 return (cpu_info.pm_npmc);
1762 pmc_pmcinfo(int cpu, struct pmc_pmcinfo **ppmci)
1765 struct pmc_op_getpmcinfo *pmci;
1767 if ((npmc = pmc_npmc(cpu)) < 0)
1770 nbytes = sizeof(struct pmc_op_getpmcinfo) +
1771 npmc * sizeof(struct pmc_info);
1773 if ((pmci = calloc(1, nbytes)) == NULL)
1778 if (PMC_CALL(GETPMCINFO, pmci) < 0) {
1783 /* kernel<->library, library<->userland interfaces are identical */
1784 *ppmci = (struct pmc_pmcinfo *) pmci;
1789 pmc_read(pmc_id_t pmc, pmc_value_t *value)
1791 struct pmc_op_pmcrw pmc_read_op;
1793 pmc_read_op.pm_pmcid = pmc;
1794 pmc_read_op.pm_flags = PMC_F_OLDVALUE;
1795 pmc_read_op.pm_value = -1;
1797 if (PMC_CALL(PMCRW, &pmc_read_op) < 0)
1800 *value = pmc_read_op.pm_value;
1805 pmc_release(pmc_id_t pmc)
1807 struct pmc_op_simple pmc_release_args;
1809 pmc_release_args.pm_pmcid = pmc;
1810 return (PMC_CALL(PMCRELEASE, &pmc_release_args));
1814 pmc_rw(pmc_id_t pmc, pmc_value_t newvalue, pmc_value_t *oldvaluep)
1816 struct pmc_op_pmcrw pmc_rw_op;
1818 pmc_rw_op.pm_pmcid = pmc;
1819 pmc_rw_op.pm_flags = PMC_F_NEWVALUE | PMC_F_OLDVALUE;
1820 pmc_rw_op.pm_value = newvalue;
1822 if (PMC_CALL(PMCRW, &pmc_rw_op) < 0)
1825 *oldvaluep = pmc_rw_op.pm_value;
1830 pmc_set(pmc_id_t pmc, pmc_value_t value)
1832 struct pmc_op_pmcsetcount sc;
1835 sc.pm_count = value;
1837 if (PMC_CALL(PMCSETCOUNT, &sc) < 0)
1843 pmc_start(pmc_id_t pmc)
1845 struct pmc_op_simple pmc_start_args;
1847 pmc_start_args.pm_pmcid = pmc;
1848 return (PMC_CALL(PMCSTART, &pmc_start_args));
1852 pmc_stop(pmc_id_t pmc)
1854 struct pmc_op_simple pmc_stop_args;
1856 pmc_stop_args.pm_pmcid = pmc;
1857 return (PMC_CALL(PMCSTOP, &pmc_stop_args));
1861 pmc_width(pmc_id_t pmcid, uint32_t *width)
1866 cl = PMC_ID_TO_CLASS(pmcid);
1867 for (i = 0; i < cpu_info.pm_nclass; i++)
1868 if (cpu_info.pm_classes[i].pm_class == cl) {
1869 *width = cpu_info.pm_classes[i].pm_width;
1877 pmc_write(pmc_id_t pmc, pmc_value_t value)
1879 struct pmc_op_pmcrw pmc_write_op;
1881 pmc_write_op.pm_pmcid = pmc;
1882 pmc_write_op.pm_flags = PMC_F_NEWVALUE;
1883 pmc_write_op.pm_value = value;
1884 return (PMC_CALL(PMCRW, &pmc_write_op));
1888 pmc_writelog(uint32_t userdata)
1890 struct pmc_op_writelog wl;
1892 wl.pm_userdata = userdata;
1893 return (PMC_CALL(WRITELOG, &wl));