2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2003-2008 Joseph Koshy
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/types.h>
33 #include <sys/param.h>
34 #include <sys/module.h>
36 #include <sys/syscall.h>
50 #include "libpmcinternal.h"
52 /* Function prototypes */
53 #if defined(__amd64__) || defined(__i386__)
54 static int k8_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
55 struct pmc_op_pmcallocate *_pmc_config);
57 #if defined(__amd64__) || defined(__i386__)
58 static int tsc_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
59 struct pmc_op_pmcallocate *_pmc_config);
62 static int armv7_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
63 struct pmc_op_pmcallocate *_pmc_config);
65 #if defined(__aarch64__)
66 static int arm64_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
67 struct pmc_op_pmcallocate *_pmc_config);
70 static int mips_allocate_pmc(enum pmc_event _pe, char* ctrspec,
71 struct pmc_op_pmcallocate *_pmc_config);
73 static int soft_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
74 struct pmc_op_pmcallocate *_pmc_config);
76 #if defined(__powerpc__)
77 static int powerpc_allocate_pmc(enum pmc_event _pe, char* ctrspec,
78 struct pmc_op_pmcallocate *_pmc_config);
79 #endif /* __powerpc__ */
81 #define PMC_CALL(cmd, params) \
82 syscall(pmc_syscall, PMC_OP_##cmd, (params))
85 * Event aliases provide a way for the user to ask for generic events
86 * like "cache-misses", or "instructions-retired". These aliases are
87 * mapped to the appropriate canonical event descriptions using a
90 struct pmc_event_alias {
95 static const struct pmc_event_alias *pmc_mdep_event_aliases;
98 * The pmc_event_descr structure maps symbolic names known to the user
99 * to integer codes used by the PMC KLD.
101 struct pmc_event_descr {
102 const char *pm_ev_name;
103 enum pmc_event pm_ev_code;
107 * The pmc_class_descr structure maps class name prefixes for
108 * event names to event tables and other PMC class data.
110 struct pmc_class_descr {
111 const char *pm_evc_name;
112 size_t pm_evc_name_size;
113 enum pmc_class pm_evc_class;
114 const struct pmc_event_descr *pm_evc_event_table;
115 size_t pm_evc_event_table_size;
116 int (*pm_evc_allocate_pmc)(enum pmc_event _pe,
117 char *_ctrspec, struct pmc_op_pmcallocate *_pa);
120 #define PMC_TABLE_SIZE(N) (sizeof(N)/sizeof(N[0]))
121 #define PMC_EVENT_TABLE_SIZE(N) PMC_TABLE_SIZE(N##_event_table)
124 #define __PMC_EV(C,N) { #N, PMC_EV_ ## C ## _ ## N },
127 * PMC_CLASSDEP_TABLE(NAME, CLASS)
129 * Define a table mapping event names and aliases to HWPMC event IDs.
131 #define PMC_CLASSDEP_TABLE(N, C) \
132 static const struct pmc_event_descr N##_event_table[] = \
137 PMC_CLASSDEP_TABLE(iaf, IAF);
138 PMC_CLASSDEP_TABLE(k8, K8);
139 PMC_CLASSDEP_TABLE(armv7, ARMV7);
140 PMC_CLASSDEP_TABLE(armv8, ARMV8);
141 PMC_CLASSDEP_TABLE(beri, BERI);
142 PMC_CLASSDEP_TABLE(mips24k, MIPS24K);
143 PMC_CLASSDEP_TABLE(mips74k, MIPS74K);
144 PMC_CLASSDEP_TABLE(octeon, OCTEON);
145 PMC_CLASSDEP_TABLE(ppc7450, PPC7450);
146 PMC_CLASSDEP_TABLE(ppc970, PPC970);
147 PMC_CLASSDEP_TABLE(power8, POWER8);
148 PMC_CLASSDEP_TABLE(e500, E500);
150 static struct pmc_event_descr soft_event_table[PMC_EV_DYN_COUNT];
152 #undef __PMC_EV_ALIAS
153 #define __PMC_EV_ALIAS(N,CODE) { N, PMC_EV_##CODE },
155 static const struct pmc_event_descr cortex_a8_event_table[] =
157 __PMC_EV_ALIAS_ARMV7_CORTEX_A8()
160 static const struct pmc_event_descr cortex_a9_event_table[] =
162 __PMC_EV_ALIAS_ARMV7_CORTEX_A9()
165 static const struct pmc_event_descr cortex_a53_event_table[] =
167 __PMC_EV_ALIAS_ARMV8_CORTEX_A53()
170 static const struct pmc_event_descr cortex_a57_event_table[] =
172 __PMC_EV_ALIAS_ARMV8_CORTEX_A57()
175 static const struct pmc_event_descr cortex_a76_event_table[] =
177 __PMC_EV_ALIAS_ARMV8_CORTEX_A76()
180 static const struct pmc_event_descr tsc_event_table[] =
185 #undef PMC_CLASS_TABLE_DESC
186 #define PMC_CLASS_TABLE_DESC(NAME, CLASS, EVENTS, ALLOCATOR) \
187 static const struct pmc_class_descr NAME##_class_table_descr = \
189 .pm_evc_name = #CLASS "-", \
190 .pm_evc_name_size = sizeof(#CLASS "-") - 1, \
191 .pm_evc_class = PMC_CLASS_##CLASS , \
192 .pm_evc_event_table = EVENTS##_event_table , \
193 .pm_evc_event_table_size = \
194 PMC_EVENT_TABLE_SIZE(EVENTS), \
195 .pm_evc_allocate_pmc = ALLOCATOR##_allocate_pmc \
198 #if defined(__i386__) || defined(__amd64__)
199 PMC_CLASS_TABLE_DESC(k8, K8, k8, k8);
201 #if defined(__i386__) || defined(__amd64__)
202 PMC_CLASS_TABLE_DESC(tsc, TSC, tsc, tsc);
205 PMC_CLASS_TABLE_DESC(cortex_a8, ARMV7, cortex_a8, armv7);
206 PMC_CLASS_TABLE_DESC(cortex_a9, ARMV7, cortex_a9, armv7);
208 #if defined(__aarch64__)
209 PMC_CLASS_TABLE_DESC(cortex_a53, ARMV8, cortex_a53, arm64);
210 PMC_CLASS_TABLE_DESC(cortex_a57, ARMV8, cortex_a57, arm64);
211 PMC_CLASS_TABLE_DESC(cortex_a76, ARMV8, cortex_a76, arm64);
213 #if defined(__mips__)
214 PMC_CLASS_TABLE_DESC(beri, BERI, beri, mips);
215 PMC_CLASS_TABLE_DESC(mips24k, MIPS24K, mips24k, mips);
216 PMC_CLASS_TABLE_DESC(mips74k, MIPS74K, mips74k, mips);
217 PMC_CLASS_TABLE_DESC(octeon, OCTEON, octeon, mips);
218 #endif /* __mips__ */
219 #if defined(__powerpc__)
220 PMC_CLASS_TABLE_DESC(ppc7450, PPC7450, ppc7450, powerpc);
221 PMC_CLASS_TABLE_DESC(ppc970, PPC970, ppc970, powerpc);
222 PMC_CLASS_TABLE_DESC(power8, POWER8, power8, powerpc);
223 PMC_CLASS_TABLE_DESC(e500, E500, e500, powerpc);
226 static struct pmc_class_descr soft_class_table_descr =
228 .pm_evc_name = "SOFT-",
229 .pm_evc_name_size = sizeof("SOFT-") - 1,
230 .pm_evc_class = PMC_CLASS_SOFT,
231 .pm_evc_event_table = NULL,
232 .pm_evc_event_table_size = 0,
233 .pm_evc_allocate_pmc = soft_allocate_pmc
236 #undef PMC_CLASS_TABLE_DESC
238 static const struct pmc_class_descr **pmc_class_table;
239 #define PMC_CLASS_TABLE_SIZE cpu_info.pm_nclass
242 * Mapping tables, mapping enumeration values to human readable
246 static const char * pmc_capability_names[] = {
248 #define __PMC_CAP(N,V,D) #N ,
252 struct pmc_class_map {
253 enum pmc_class pm_class;
257 static const struct pmc_class_map pmc_class_names[] = {
259 #define __PMC_CLASS(S,V,D) { .pm_class = PMC_CLASS_##S, .pm_name = #S } ,
263 struct pmc_cputype_map {
264 enum pmc_cputype pm_cputype;
268 static const struct pmc_cputype_map pmc_cputype_names[] = {
270 #define __PMC_CPU(S, V, D) { .pm_cputype = PMC_CPU_##S, .pm_name = #S } ,
274 static const char * pmc_disposition_names[] = {
276 #define __PMC_DISP(D) #D ,
280 static const char * pmc_mode_names[] = {
282 #define __PMC_MODE(M,N) #M ,
286 static const char * pmc_state_names[] = {
288 #define __PMC_STATE(S) #S ,
293 * Filled in by pmc_init().
295 static int pmc_syscall = -1;
296 static struct pmc_cpuinfo cpu_info;
297 static struct pmc_op_getdyneventinfo soft_event_info;
299 /* Event masks for events */
302 const uint64_t pm_value;
304 #define PMCMASK(N,V) { .pm_name = #N, .pm_value = (V) }
305 #define NULLMASK { .pm_name = NULL }
307 #if defined(__amd64__) || defined(__i386__)
309 pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint64_t *evmask)
311 const struct pmc_masks *pm;
315 if (pmask == NULL) /* no mask keywords */
317 q = strchr(p, '='); /* skip '=' */
318 if (*++q == '\0') /* no more data */
320 c = 0; /* count of mask keywords seen */
321 while ((r = strsep(&q, "+")) != NULL) {
322 for (pm = pmask; pm->pm_name && strcasecmp(r, pm->pm_name);
325 if (pm->pm_name == NULL) /* not found */
327 *evmask |= pm->pm_value;
334 #define KWMATCH(p,kw) (strcasecmp((p), (kw)) == 0)
335 #define KWPREFIXMATCH(p,kw) (strncasecmp((p), (kw), sizeof((kw)) - 1) == 0)
336 #define EV_ALIAS(N,S) { .pm_alias = N, .pm_spec = S }
338 #if defined(__amd64__) || defined(__i386__)
344 static struct pmc_event_alias k8_aliases[] = {
345 EV_ALIAS("branches", "k8-fr-retired-taken-branches"),
346 EV_ALIAS("branch-mispredicts",
347 "k8-fr-retired-taken-branches-mispredicted"),
348 EV_ALIAS("cycles", "tsc"),
349 EV_ALIAS("dc-misses", "k8-dc-miss"),
350 EV_ALIAS("ic-misses", "k8-ic-miss"),
351 EV_ALIAS("instructions", "k8-fr-retired-x86-instructions"),
352 EV_ALIAS("interrupts", "k8-fr-taken-hardware-interrupts"),
353 EV_ALIAS("unhalted-cycles", "k8-bu-cpu-clk-unhalted"),
357 #define __K8MASK(N,V) PMCMASK(N,(1 << (V)))
363 /* fp dispatched fpu ops */
364 static const struct pmc_masks k8_mask_fdfo[] = {
365 __K8MASK(add-pipe-excluding-junk-ops, 0),
366 __K8MASK(multiply-pipe-excluding-junk-ops, 1),
367 __K8MASK(store-pipe-excluding-junk-ops, 2),
368 __K8MASK(add-pipe-junk-ops, 3),
369 __K8MASK(multiply-pipe-junk-ops, 4),
370 __K8MASK(store-pipe-junk-ops, 5),
374 /* ls segment register loads */
375 static const struct pmc_masks k8_mask_lsrl[] = {
386 /* ls locked operation */
387 static const struct pmc_masks k8_mask_llo[] = {
388 __K8MASK(locked-instructions, 0),
389 __K8MASK(cycles-in-request, 1),
390 __K8MASK(cycles-to-complete, 2),
394 /* dc refill from {l2,system} and dc copyback */
395 static const struct pmc_masks k8_mask_dc[] = {
396 __K8MASK(invalid, 0),
398 __K8MASK(exclusive, 2),
400 __K8MASK(modified, 4),
404 /* dc one bit ecc error */
405 static const struct pmc_masks k8_mask_dobee[] = {
406 __K8MASK(scrubber, 0),
407 __K8MASK(piggyback, 1),
411 /* dc dispatched prefetch instructions */
412 static const struct pmc_masks k8_mask_ddpi[] = {
419 /* dc dcache accesses by locks */
420 static const struct pmc_masks k8_mask_dabl[] = {
421 __K8MASK(accesses, 0),
426 /* bu internal l2 request */
427 static const struct pmc_masks k8_mask_bilr[] = {
428 __K8MASK(ic-fill, 0),
429 __K8MASK(dc-fill, 1),
430 __K8MASK(tlb-reload, 2),
431 __K8MASK(tag-snoop, 3),
432 __K8MASK(cancelled, 4),
436 /* bu fill request l2 miss */
437 static const struct pmc_masks k8_mask_bfrlm[] = {
438 __K8MASK(ic-fill, 0),
439 __K8MASK(dc-fill, 1),
440 __K8MASK(tlb-reload, 2),
444 /* bu fill into l2 */
445 static const struct pmc_masks k8_mask_bfil[] = {
446 __K8MASK(dirty-l2-victim, 0),
447 __K8MASK(victim-from-l2, 1),
451 /* fr retired fpu instructions */
452 static const struct pmc_masks k8_mask_frfi[] = {
454 __K8MASK(mmx-3dnow, 1),
455 __K8MASK(packed-sse-sse2, 2),
456 __K8MASK(scalar-sse-sse2, 3),
460 /* fr retired fastpath double op instructions */
461 static const struct pmc_masks k8_mask_frfdoi[] = {
462 __K8MASK(low-op-pos-0, 0),
463 __K8MASK(low-op-pos-1, 1),
464 __K8MASK(low-op-pos-2, 2),
468 /* fr fpu exceptions */
469 static const struct pmc_masks k8_mask_ffe[] = {
470 __K8MASK(x87-reclass-microfaults, 0),
471 __K8MASK(sse-retype-microfaults, 1),
472 __K8MASK(sse-reclass-microfaults, 2),
473 __K8MASK(sse-and-x87-microtraps, 3),
477 /* nb memory controller page access event */
478 static const struct pmc_masks k8_mask_nmcpae[] = {
479 __K8MASK(page-hit, 0),
480 __K8MASK(page-miss, 1),
481 __K8MASK(page-conflict, 2),
485 /* nb memory controller turnaround */
486 static const struct pmc_masks k8_mask_nmct[] = {
487 __K8MASK(dimm-turnaround, 0),
488 __K8MASK(read-to-write-turnaround, 1),
489 __K8MASK(write-to-read-turnaround, 2),
493 /* nb memory controller bypass saturation */
494 static const struct pmc_masks k8_mask_nmcbs[] = {
495 __K8MASK(memory-controller-hi-pri-bypass, 0),
496 __K8MASK(memory-controller-lo-pri-bypass, 1),
497 __K8MASK(dram-controller-interface-bypass, 2),
498 __K8MASK(dram-controller-queue-bypass, 3),
502 /* nb sized commands */
503 static const struct pmc_masks k8_mask_nsc[] = {
504 __K8MASK(nonpostwrszbyte, 0),
505 __K8MASK(nonpostwrszdword, 1),
506 __K8MASK(postwrszbyte, 2),
507 __K8MASK(postwrszdword, 3),
508 __K8MASK(rdszbyte, 4),
509 __K8MASK(rdszdword, 5),
510 __K8MASK(rdmodwr, 6),
514 /* nb probe result */
515 static const struct pmc_masks k8_mask_npr[] = {
516 __K8MASK(probe-miss, 0),
517 __K8MASK(probe-hit, 1),
518 __K8MASK(probe-hit-dirty-no-memory-cancel, 2),
519 __K8MASK(probe-hit-dirty-with-memory-cancel, 3),
523 /* nb hypertransport bus bandwidth */
524 static const struct pmc_masks k8_mask_nhbb[] = { /* HT bus bandwidth */
525 __K8MASK(command, 0),
527 __K8MASK(buffer-release, 2),
534 #define K8_KW_COUNT "count"
535 #define K8_KW_EDGE "edge"
536 #define K8_KW_INV "inv"
537 #define K8_KW_MASK "mask"
538 #define K8_KW_OS "os"
539 #define K8_KW_USR "usr"
542 k8_allocate_pmc(enum pmc_event pe, char *ctrspec,
543 struct pmc_op_pmcallocate *pmc_config)
549 const struct pmc_masks *pm, *pmask;
551 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
552 pmc_config->pm_md.pm_amd.pm_amd_config = 0;
557 #define __K8SETMASK(M) pmask = k8_mask_##M
559 /* setup parsing tables */
561 case PMC_EV_K8_FP_DISPATCHED_FPU_OPS:
564 case PMC_EV_K8_LS_SEGMENT_REGISTER_LOAD:
567 case PMC_EV_K8_LS_LOCKED_OPERATION:
570 case PMC_EV_K8_DC_REFILL_FROM_L2:
571 case PMC_EV_K8_DC_REFILL_FROM_SYSTEM:
572 case PMC_EV_K8_DC_COPYBACK:
575 case PMC_EV_K8_DC_ONE_BIT_ECC_ERROR:
578 case PMC_EV_K8_DC_DISPATCHED_PREFETCH_INSTRUCTIONS:
581 case PMC_EV_K8_DC_DCACHE_ACCESSES_BY_LOCKS:
584 case PMC_EV_K8_BU_INTERNAL_L2_REQUEST:
587 case PMC_EV_K8_BU_FILL_REQUEST_L2_MISS:
590 case PMC_EV_K8_BU_FILL_INTO_L2:
593 case PMC_EV_K8_FR_RETIRED_FPU_INSTRUCTIONS:
596 case PMC_EV_K8_FR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS:
599 case PMC_EV_K8_FR_FPU_EXCEPTIONS:
602 case PMC_EV_K8_NB_MEMORY_CONTROLLER_PAGE_ACCESS_EVENT:
605 case PMC_EV_K8_NB_MEMORY_CONTROLLER_TURNAROUND:
608 case PMC_EV_K8_NB_MEMORY_CONTROLLER_BYPASS_SATURATION:
611 case PMC_EV_K8_NB_SIZED_COMMANDS:
614 case PMC_EV_K8_NB_PROBE_RESULT:
617 case PMC_EV_K8_NB_HT_BUS0_BANDWIDTH:
618 case PMC_EV_K8_NB_HT_BUS1_BANDWIDTH:
619 case PMC_EV_K8_NB_HT_BUS2_BANDWIDTH:
624 break; /* no options defined */
627 while ((p = strsep(&ctrspec, ",")) != NULL) {
628 if (KWPREFIXMATCH(p, K8_KW_COUNT "=")) {
630 if (*++q == '\0') /* skip '=' */
633 count = strtol(q, &e, 0);
634 if (e == q || *e != '\0')
637 pmc_config->pm_caps |= PMC_CAP_THRESHOLD;
638 pmc_config->pm_md.pm_amd.pm_amd_config |=
639 AMD_PMC_TO_COUNTER(count);
641 } else if (KWMATCH(p, K8_KW_EDGE)) {
642 pmc_config->pm_caps |= PMC_CAP_EDGE;
643 } else if (KWMATCH(p, K8_KW_INV)) {
644 pmc_config->pm_caps |= PMC_CAP_INVERT;
645 } else if (KWPREFIXMATCH(p, K8_KW_MASK "=")) {
646 if ((n = pmc_parse_mask(pmask, p, &evmask)) < 0)
648 pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
649 } else if (KWMATCH(p, K8_KW_OS)) {
650 pmc_config->pm_caps |= PMC_CAP_SYSTEM;
651 } else if (KWMATCH(p, K8_KW_USR)) {
652 pmc_config->pm_caps |= PMC_CAP_USER;
657 /* other post processing */
659 case PMC_EV_K8_FP_DISPATCHED_FPU_OPS:
660 case PMC_EV_K8_FP_CYCLES_WITH_NO_FPU_OPS_RETIRED:
661 case PMC_EV_K8_FP_DISPATCHED_FPU_FAST_FLAG_OPS:
662 case PMC_EV_K8_FR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS:
663 case PMC_EV_K8_FR_RETIRED_FPU_INSTRUCTIONS:
664 case PMC_EV_K8_FR_FPU_EXCEPTIONS:
665 /* XXX only available in rev B and later */
667 case PMC_EV_K8_DC_DCACHE_ACCESSES_BY_LOCKS:
668 /* XXX only available in rev C and later */
670 case PMC_EV_K8_LS_LOCKED_OPERATION:
671 /* XXX CPU Rev A,B evmask is to be zero */
672 if (evmask & (evmask - 1)) /* > 1 bit set */
675 evmask = 0x01; /* Rev C and later: #instrs */
676 pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
680 if (evmask == 0 && pmask != NULL) {
681 for (pm = pmask; pm->pm_name; pm++)
682 evmask |= pm->pm_value;
683 pmc_config->pm_caps |= PMC_CAP_QUALIFIER;
687 if (pmc_config->pm_caps & PMC_CAP_QUALIFIER)
688 pmc_config->pm_md.pm_amd.pm_amd_config =
689 AMD_PMC_TO_UNITMASK(evmask);
696 #if defined(__i386__) || defined(__amd64__)
698 tsc_allocate_pmc(enum pmc_event pe, char *ctrspec,
699 struct pmc_op_pmcallocate *pmc_config)
701 if (pe != PMC_EV_TSC_TSC)
704 /* TSC events must be unqualified. */
705 if (ctrspec && *ctrspec != '\0')
708 pmc_config->pm_md.pm_amd.pm_amd_config = 0;
709 pmc_config->pm_caps |= PMC_CAP_READ;
715 static struct pmc_event_alias generic_aliases[] = {
716 EV_ALIAS("instructions", "SOFT-CLOCK.HARD"),
721 soft_allocate_pmc(enum pmc_event pe, char *ctrspec,
722 struct pmc_op_pmcallocate *pmc_config)
727 if ((int)pe < PMC_EV_SOFT_FIRST || (int)pe > PMC_EV_SOFT_LAST)
730 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
735 static struct pmc_event_alias cortex_a8_aliases[] = {
736 EV_ALIAS("dc-misses", "L1_DCACHE_REFILL"),
737 EV_ALIAS("ic-misses", "L1_ICACHE_REFILL"),
738 EV_ALIAS("instructions", "INSTR_EXECUTED"),
742 static struct pmc_event_alias cortex_a9_aliases[] = {
743 EV_ALIAS("dc-misses", "L1_DCACHE_REFILL"),
744 EV_ALIAS("ic-misses", "L1_ICACHE_REFILL"),
745 EV_ALIAS("instructions", "INSTR_EXECUTED"),
750 armv7_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
751 struct pmc_op_pmcallocate *pmc_config __unused)
762 #if defined(__aarch64__)
763 static struct pmc_event_alias cortex_a53_aliases[] = {
766 static struct pmc_event_alias cortex_a57_aliases[] = {
769 static struct pmc_event_alias cortex_a76_aliases[] = {
773 arm64_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
774 struct pmc_op_pmcallocate *pmc_config __unused)
785 #if defined(__mips__)
787 static struct pmc_event_alias beri_aliases[] = {
788 EV_ALIAS("instructions", "INST"),
792 static struct pmc_event_alias mips24k_aliases[] = {
793 EV_ALIAS("instructions", "INSTR_EXECUTED"),
794 EV_ALIAS("branches", "BRANCH_COMPLETED"),
795 EV_ALIAS("branch-mispredicts", "BRANCH_MISPRED"),
799 static struct pmc_event_alias mips74k_aliases[] = {
800 EV_ALIAS("instructions", "INSTR_EXECUTED"),
801 EV_ALIAS("branches", "BRANCH_INSNS"),
802 EV_ALIAS("branch-mispredicts", "MISPREDICTED_BRANCH_INSNS"),
806 static struct pmc_event_alias octeon_aliases[] = {
807 EV_ALIAS("instructions", "RET"),
808 EV_ALIAS("branches", "BR"),
809 EV_ALIAS("branch-mispredicts", "BRMIS"),
813 #define MIPS_KW_OS "os"
814 #define MIPS_KW_USR "usr"
815 #define MIPS_KW_ANYTHREAD "anythread"
818 mips_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
819 struct pmc_op_pmcallocate *pmc_config __unused)
825 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
827 while ((p = strsep(&ctrspec, ",")) != NULL) {
828 if (KWMATCH(p, MIPS_KW_OS))
829 pmc_config->pm_caps |= PMC_CAP_SYSTEM;
830 else if (KWMATCH(p, MIPS_KW_USR))
831 pmc_config->pm_caps |= PMC_CAP_USER;
832 else if (KWMATCH(p, MIPS_KW_ANYTHREAD))
833 pmc_config->pm_caps |= (PMC_CAP_USER | PMC_CAP_SYSTEM);
841 #endif /* __mips__ */
843 #if defined(__powerpc__)
845 static struct pmc_event_alias ppc7450_aliases[] = {
846 EV_ALIAS("instructions", "INSTR_COMPLETED"),
847 EV_ALIAS("branches", "BRANCHES_COMPLETED"),
848 EV_ALIAS("branch-mispredicts", "MISPREDICTED_BRANCHES"),
852 static struct pmc_event_alias ppc970_aliases[] = {
853 EV_ALIAS("instructions", "INSTR_COMPLETED"),
854 EV_ALIAS("cycles", "CYCLES"),
858 static struct pmc_event_alias power8_aliases[] = {
859 EV_ALIAS("instructions", "INSTR_COMPLETED"),
860 EV_ALIAS("cycles", "CYCLES"),
864 static struct pmc_event_alias e500_aliases[] = {
865 EV_ALIAS("instructions", "INSTR_COMPLETED"),
866 EV_ALIAS("cycles", "CYCLES"),
870 #define POWERPC_KW_OS "os"
871 #define POWERPC_KW_USR "usr"
872 #define POWERPC_KW_ANYTHREAD "anythread"
875 powerpc_allocate_pmc(enum pmc_event pe, char *ctrspec __unused,
876 struct pmc_op_pmcallocate *pmc_config __unused)
882 pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
884 while ((p = strsep(&ctrspec, ",")) != NULL) {
885 if (KWMATCH(p, POWERPC_KW_OS))
886 pmc_config->pm_caps |= PMC_CAP_SYSTEM;
887 else if (KWMATCH(p, POWERPC_KW_USR))
888 pmc_config->pm_caps |= PMC_CAP_USER;
889 else if (KWMATCH(p, POWERPC_KW_ANYTHREAD))
890 pmc_config->pm_caps |= (PMC_CAP_USER | PMC_CAP_SYSTEM);
898 #endif /* __powerpc__ */
902 * Match an event name `name' with its canonical form.
904 * Matches are case insensitive and spaces, periods, underscores and
905 * hyphen characters are considered to match each other.
907 * Returns 1 for a match, 0 otherwise.
911 pmc_match_event_name(const char *name, const char *canonicalname)
914 const unsigned char *c, *n;
916 c = (const unsigned char *) canonicalname;
917 n = (const unsigned char *) name;
919 for (; (nc = *n) && (cc = *c); n++, c++) {
921 if ((nc == ' ' || nc == '_' || nc == '-' || nc == '.') &&
922 (cc == ' ' || cc == '_' || cc == '-' || cc == '.'))
925 if (toupper(nc) == toupper(cc))
932 if (*n == '\0' && *c == '\0')
939 * Match an event name against all the event named supported by a
942 * Returns an event descriptor pointer on match or NULL otherwise.
944 static const struct pmc_event_descr *
945 pmc_match_event_class(const char *name,
946 const struct pmc_class_descr *pcd)
949 const struct pmc_event_descr *ev;
951 ev = pcd->pm_evc_event_table;
952 for (n = 0; n < pcd->pm_evc_event_table_size; n++, ev++)
953 if (pmc_match_event_name(name, ev->pm_ev_name))
964 pmc_allocate(const char *ctrspec, enum pmc_mode mode,
965 uint32_t flags, int cpu, pmc_id_t *pmcid,
972 const struct pmc_event_descr *ev;
973 const struct pmc_event_alias *alias;
974 struct pmc_op_pmcallocate pmc_config;
975 const struct pmc_class_descr *pcd;
980 if (mode != PMC_MODE_SS && mode != PMC_MODE_TS &&
981 mode != PMC_MODE_SC && mode != PMC_MODE_TC) {
985 bzero(&pmc_config, sizeof(pmc_config));
986 pmc_config.pm_cpu = cpu;
987 pmc_config.pm_mode = mode;
988 pmc_config.pm_flags = flags;
989 pmc_config.pm_count = count;
990 if (PMC_IS_SAMPLING_MODE(mode))
991 pmc_config.pm_caps |= PMC_CAP_INTERRUPT;
994 * Try to pull the raw event ID directly from the pmu-events table. If
995 * this is unsupported on the platform, or the event is not found,
996 * continue with searching the regular event tables.
998 r = spec_copy = strdup(ctrspec);
999 ctrname = strsep(&r, ",");
1000 if (pmc_pmu_enabled()) {
1001 if (pmc_pmu_pmcallocate(ctrname, &pmc_config) == 0)
1004 /* Otherwise, reset any changes */
1005 pmc_config.pm_ev = 0;
1006 pmc_config.pm_caps = 0;
1007 pmc_config.pm_class = 0;
1012 /* replace an event alias with the canonical event specifier */
1013 if (pmc_mdep_event_aliases)
1014 for (alias = pmc_mdep_event_aliases; alias->pm_alias; alias++)
1015 if (!strcasecmp(ctrspec, alias->pm_alias)) {
1016 spec_copy = strdup(alias->pm_spec);
1020 if (spec_copy == NULL)
1021 spec_copy = strdup(ctrspec);
1024 ctrname = strsep(&r, ",");
1027 * If a explicit class prefix was given by the user, restrict the
1028 * search for the event to the specified PMC class.
1031 for (n = 0; n < PMC_CLASS_TABLE_SIZE; n++) {
1032 pcd = pmc_class_table[n];
1033 if (pcd != NULL && strncasecmp(ctrname, pcd->pm_evc_name,
1034 pcd->pm_evc_name_size) == 0) {
1035 if ((ev = pmc_match_event_class(ctrname +
1036 pcd->pm_evc_name_size, pcd)) == NULL) {
1045 * Otherwise, search for this event in all compatible PMC
1048 for (n = 0; ev == NULL && n < PMC_CLASS_TABLE_SIZE; n++) {
1049 pcd = pmc_class_table[n];
1051 ev = pmc_match_event_class(ctrname, pcd);
1059 pmc_config.pm_ev = ev->pm_ev_code;
1060 pmc_config.pm_class = pcd->pm_evc_class;
1062 if (pcd->pm_evc_allocate_pmc(ev->pm_ev_code, r, &pmc_config) < 0) {
1068 if (PMC_CALL(PMCALLOCATE, &pmc_config) == 0) {
1069 *pmcid = pmc_config.pm_pmcid;
1080 pmc_attach(pmc_id_t pmc, pid_t pid)
1082 struct pmc_op_pmcattach pmc_attach_args;
1084 pmc_attach_args.pm_pmc = pmc;
1085 pmc_attach_args.pm_pid = pid;
1087 return (PMC_CALL(PMCATTACH, &pmc_attach_args));
1091 pmc_capabilities(pmc_id_t pmcid, uint32_t *caps)
1096 cl = PMC_ID_TO_CLASS(pmcid);
1097 for (i = 0; i < cpu_info.pm_nclass; i++)
1098 if (cpu_info.pm_classes[i].pm_class == cl) {
1099 *caps = cpu_info.pm_classes[i].pm_caps;
1107 pmc_configure_logfile(int fd)
1109 struct pmc_op_configurelog cla;
1112 if (PMC_CALL(CONFIGURELOG, &cla) < 0)
1118 pmc_cpuinfo(const struct pmc_cpuinfo **pci)
1120 if (pmc_syscall == -1) {
1130 pmc_detach(pmc_id_t pmc, pid_t pid)
1132 struct pmc_op_pmcattach pmc_detach_args;
1134 pmc_detach_args.pm_pmc = pmc;
1135 pmc_detach_args.pm_pid = pid;
1136 return (PMC_CALL(PMCDETACH, &pmc_detach_args));
1140 pmc_disable(int cpu, int pmc)
1142 struct pmc_op_pmcadmin ssa;
1146 ssa.pm_state = PMC_STATE_DISABLED;
1147 return (PMC_CALL(PMCADMIN, &ssa));
1151 pmc_enable(int cpu, int pmc)
1153 struct pmc_op_pmcadmin ssa;
1157 ssa.pm_state = PMC_STATE_FREE;
1158 return (PMC_CALL(PMCADMIN, &ssa));
1162 * Return a list of events known to a given PMC class. 'cl' is the
1163 * PMC class identifier, 'eventnames' is the returned list of 'const
1164 * char *' pointers pointing to the names of the events. 'nevents' is
1165 * the number of event name pointers returned.
1167 * The space for 'eventnames' is allocated using malloc(3). The caller
1168 * is responsible for freeing this space when done.
1171 pmc_event_names_of_class(enum pmc_class cl, const char ***eventnames,
1176 const struct pmc_event_descr *ev;
1181 ev = iaf_event_table;
1182 count = PMC_EVENT_TABLE_SIZE(iaf);
1185 ev = tsc_event_table;
1186 count = PMC_EVENT_TABLE_SIZE(tsc);
1189 ev = k8_event_table;
1190 count = PMC_EVENT_TABLE_SIZE(k8);
1192 case PMC_CLASS_ARMV7:
1193 switch (cpu_info.pm_cputype) {
1195 case PMC_CPU_ARMV7_CORTEX_A8:
1196 ev = cortex_a8_event_table;
1197 count = PMC_EVENT_TABLE_SIZE(cortex_a8);
1199 case PMC_CPU_ARMV7_CORTEX_A9:
1200 ev = cortex_a9_event_table;
1201 count = PMC_EVENT_TABLE_SIZE(cortex_a9);
1205 case PMC_CLASS_ARMV8:
1206 switch (cpu_info.pm_cputype) {
1208 case PMC_CPU_ARMV8_CORTEX_A53:
1209 ev = cortex_a53_event_table;
1210 count = PMC_EVENT_TABLE_SIZE(cortex_a53);
1212 case PMC_CPU_ARMV8_CORTEX_A57:
1213 ev = cortex_a57_event_table;
1214 count = PMC_EVENT_TABLE_SIZE(cortex_a57);
1216 case PMC_CPU_ARMV8_CORTEX_A76:
1217 ev = cortex_a76_event_table;
1218 count = PMC_EVENT_TABLE_SIZE(cortex_a76);
1222 case PMC_CLASS_BERI:
1223 ev = beri_event_table;
1224 count = PMC_EVENT_TABLE_SIZE(beri);
1226 case PMC_CLASS_MIPS24K:
1227 ev = mips24k_event_table;
1228 count = PMC_EVENT_TABLE_SIZE(mips24k);
1230 case PMC_CLASS_MIPS74K:
1231 ev = mips74k_event_table;
1232 count = PMC_EVENT_TABLE_SIZE(mips74k);
1234 case PMC_CLASS_OCTEON:
1235 ev = octeon_event_table;
1236 count = PMC_EVENT_TABLE_SIZE(octeon);
1238 case PMC_CLASS_PPC7450:
1239 ev = ppc7450_event_table;
1240 count = PMC_EVENT_TABLE_SIZE(ppc7450);
1242 case PMC_CLASS_PPC970:
1243 ev = ppc970_event_table;
1244 count = PMC_EVENT_TABLE_SIZE(ppc970);
1246 case PMC_CLASS_POWER8:
1247 ev = power8_event_table;
1248 count = PMC_EVENT_TABLE_SIZE(power8);
1250 case PMC_CLASS_E500:
1251 ev = e500_event_table;
1252 count = PMC_EVENT_TABLE_SIZE(e500);
1254 case PMC_CLASS_SOFT:
1255 ev = soft_event_table;
1256 count = soft_event_info.pm_nevent;
1263 if ((names = malloc(count * sizeof(const char *))) == NULL)
1266 *eventnames = names;
1269 for (;count--; ev++, names++)
1270 *names = ev->pm_ev_name;
1276 pmc_flush_logfile(void)
1278 return (PMC_CALL(FLUSHLOG,0));
1282 pmc_close_logfile(void)
1284 return (PMC_CALL(CLOSELOG,0));
1288 pmc_get_driver_stats(struct pmc_driverstats *ds)
1290 struct pmc_op_getdriverstats gms;
1292 if (PMC_CALL(GETDRIVERSTATS, &gms) < 0)
1295 /* copy out fields in the current userland<->library interface */
1296 ds->pm_intr_ignored = gms.pm_intr_ignored;
1297 ds->pm_intr_processed = gms.pm_intr_processed;
1298 ds->pm_intr_bufferfull = gms.pm_intr_bufferfull;
1299 ds->pm_syscalls = gms.pm_syscalls;
1300 ds->pm_syscall_errors = gms.pm_syscall_errors;
1301 ds->pm_buffer_requests = gms.pm_buffer_requests;
1302 ds->pm_buffer_requests_failed = gms.pm_buffer_requests_failed;
1303 ds->pm_log_sweeps = gms.pm_log_sweeps;
1308 pmc_get_msr(pmc_id_t pmc, uint32_t *msr)
1310 struct pmc_op_getmsr gm;
1313 if (PMC_CALL(PMCGETMSR, &gm) < 0)
1322 int error, pmc_mod_id;
1324 uint32_t abi_version;
1325 struct module_stat pmc_modstat;
1326 struct pmc_op_getcpuinfo op_cpu_info;
1328 if (pmc_syscall != -1) /* already inited */
1331 /* retrieve the system call number from the KLD */
1332 if ((pmc_mod_id = modfind(PMC_MODULE_NAME)) < 0)
1335 pmc_modstat.version = sizeof(struct module_stat);
1336 if ((error = modstat(pmc_mod_id, &pmc_modstat)) < 0)
1339 pmc_syscall = pmc_modstat.data.intval;
1341 /* check the kernel module's ABI against our compiled-in version */
1342 abi_version = PMC_VERSION;
1343 if (PMC_CALL(GETMODULEVERSION, &abi_version) < 0)
1344 return (pmc_syscall = -1);
1346 /* ignore patch & minor numbers for the comparison */
1347 if ((abi_version & 0xFF000000) != (PMC_VERSION & 0xFF000000)) {
1348 errno = EPROGMISMATCH;
1349 return (pmc_syscall = -1);
1352 bzero(&op_cpu_info, sizeof(op_cpu_info));
1353 if (PMC_CALL(GETCPUINFO, &op_cpu_info) < 0)
1354 return (pmc_syscall = -1);
1356 cpu_info.pm_cputype = op_cpu_info.pm_cputype;
1357 cpu_info.pm_ncpu = op_cpu_info.pm_ncpu;
1358 cpu_info.pm_npmc = op_cpu_info.pm_npmc;
1359 cpu_info.pm_nclass = op_cpu_info.pm_nclass;
1360 for (n = 0; n < op_cpu_info.pm_nclass; n++)
1361 memcpy(&cpu_info.pm_classes[n], &op_cpu_info.pm_classes[n],
1362 sizeof(cpu_info.pm_classes[n]));
1364 pmc_class_table = malloc(PMC_CLASS_TABLE_SIZE *
1365 sizeof(struct pmc_class_descr *));
1367 if (pmc_class_table == NULL)
1370 for (n = 0; n < PMC_CLASS_TABLE_SIZE; n++)
1371 pmc_class_table[n] = NULL;
1374 * Get soft events list.
1376 soft_event_info.pm_class = PMC_CLASS_SOFT;
1377 if (PMC_CALL(GETDYNEVENTINFO, &soft_event_info) < 0)
1378 return (pmc_syscall = -1);
1380 /* Map soft events to static list. */
1381 for (n = 0; n < soft_event_info.pm_nevent; n++) {
1382 soft_event_table[n].pm_ev_name =
1383 soft_event_info.pm_events[n].pm_ev_name;
1384 soft_event_table[n].pm_ev_code =
1385 soft_event_info.pm_events[n].pm_ev_code;
1387 soft_class_table_descr.pm_evc_event_table_size = \
1388 soft_event_info.pm_nevent;
1389 soft_class_table_descr.pm_evc_event_table = \
1393 * Fill in the class table.
1397 /* Fill soft events information. */
1398 pmc_class_table[n++] = &soft_class_table_descr;
1399 #if defined(__amd64__) || defined(__i386__)
1400 if (cpu_info.pm_cputype != PMC_CPU_GENERIC)
1401 pmc_class_table[n++] = &tsc_class_table_descr;
1404 #define PMC_MDEP_INIT(C) pmc_mdep_event_aliases = C##_aliases
1406 /* Configure the event name parser. */
1407 switch (cpu_info.pm_cputype) {
1408 #if defined(__amd64__) || defined(__i386__)
1409 case PMC_CPU_AMD_K8:
1411 pmc_class_table[n] = &k8_class_table_descr;
1414 case PMC_CPU_GENERIC:
1415 PMC_MDEP_INIT(generic);
1417 #if defined(__arm__)
1418 case PMC_CPU_ARMV7_CORTEX_A8:
1419 PMC_MDEP_INIT(cortex_a8);
1420 pmc_class_table[n] = &cortex_a8_class_table_descr;
1422 case PMC_CPU_ARMV7_CORTEX_A9:
1423 PMC_MDEP_INIT(cortex_a9);
1424 pmc_class_table[n] = &cortex_a9_class_table_descr;
1427 #if defined(__aarch64__)
1428 case PMC_CPU_ARMV8_CORTEX_A53:
1429 PMC_MDEP_INIT(cortex_a53);
1430 pmc_class_table[n] = &cortex_a53_class_table_descr;
1432 case PMC_CPU_ARMV8_CORTEX_A57:
1433 PMC_MDEP_INIT(cortex_a57);
1434 pmc_class_table[n] = &cortex_a57_class_table_descr;
1436 case PMC_CPU_ARMV8_CORTEX_A76:
1437 PMC_MDEP_INIT(cortex_a76);
1438 pmc_class_table[n] = &cortex_a76_class_table_descr;
1441 #if defined(__mips__)
1442 case PMC_CPU_MIPS_BERI:
1443 PMC_MDEP_INIT(beri);
1444 pmc_class_table[n] = &beri_class_table_descr;
1446 case PMC_CPU_MIPS_24K:
1447 PMC_MDEP_INIT(mips24k);
1448 pmc_class_table[n] = &mips24k_class_table_descr;
1450 case PMC_CPU_MIPS_74K:
1451 PMC_MDEP_INIT(mips74k);
1452 pmc_class_table[n] = &mips74k_class_table_descr;
1454 case PMC_CPU_MIPS_OCTEON:
1455 PMC_MDEP_INIT(octeon);
1456 pmc_class_table[n] = &octeon_class_table_descr;
1458 #endif /* __mips__ */
1459 #if defined(__powerpc__)
1460 case PMC_CPU_PPC_7450:
1461 PMC_MDEP_INIT(ppc7450);
1462 pmc_class_table[n] = &ppc7450_class_table_descr;
1464 case PMC_CPU_PPC_970:
1465 PMC_MDEP_INIT(ppc970);
1466 pmc_class_table[n] = &ppc970_class_table_descr;
1468 case PMC_CPU_PPC_POWER8:
1469 PMC_MDEP_INIT(power8);
1470 pmc_class_table[n] = &power8_class_table_descr;
1472 case PMC_CPU_PPC_E500:
1473 PMC_MDEP_INIT(e500);
1474 pmc_class_table[n] = &e500_class_table_descr;
1479 * Some kind of CPU this version of the library knows nothing
1480 * about. This shouldn't happen since the abi version check
1481 * should have caught this.
1483 #if defined(__amd64__) || defined(__i386__)
1487 return (pmc_syscall = -1);
1494 pmc_name_of_capability(enum pmc_caps cap)
1499 * 'cap' should have a single bit set and should be in
1502 if ((cap & (cap - 1)) || cap < PMC_CAP_FIRST ||
1503 cap > PMC_CAP_LAST) {
1509 return (pmc_capability_names[i - 1]);
1513 pmc_name_of_class(enum pmc_class pc)
1517 for (n = 0; n < PMC_TABLE_SIZE(pmc_class_names); n++)
1518 if (pc == pmc_class_names[n].pm_class)
1519 return (pmc_class_names[n].pm_name);
1526 pmc_name_of_cputype(enum pmc_cputype cp)
1530 for (n = 0; n < PMC_TABLE_SIZE(pmc_cputype_names); n++)
1531 if (cp == pmc_cputype_names[n].pm_cputype)
1532 return (pmc_cputype_names[n].pm_name);
1539 pmc_name_of_disposition(enum pmc_disp pd)
1541 if ((int) pd >= PMC_DISP_FIRST &&
1542 pd <= PMC_DISP_LAST)
1543 return (pmc_disposition_names[pd]);
1550 _pmc_name_of_event(enum pmc_event pe, enum pmc_cputype cpu)
1552 const struct pmc_event_descr *ev, *evfence;
1554 ev = evfence = NULL;
1555 if (pe >= PMC_EV_K8_FIRST && pe <= PMC_EV_K8_LAST) {
1556 ev = k8_event_table;
1557 evfence = k8_event_table + PMC_EVENT_TABLE_SIZE(k8);
1559 } else if (pe >= PMC_EV_ARMV7_FIRST && pe <= PMC_EV_ARMV7_LAST) {
1561 case PMC_CPU_ARMV7_CORTEX_A8:
1562 ev = cortex_a8_event_table;
1563 evfence = cortex_a8_event_table + PMC_EVENT_TABLE_SIZE(cortex_a8);
1565 case PMC_CPU_ARMV7_CORTEX_A9:
1566 ev = cortex_a9_event_table;
1567 evfence = cortex_a9_event_table + PMC_EVENT_TABLE_SIZE(cortex_a9);
1569 default: /* Unknown CPU type. */
1572 } else if (pe >= PMC_EV_ARMV8_FIRST && pe <= PMC_EV_ARMV8_LAST) {
1574 case PMC_CPU_ARMV8_CORTEX_A53:
1575 ev = cortex_a53_event_table;
1576 evfence = cortex_a53_event_table + PMC_EVENT_TABLE_SIZE(cortex_a53);
1578 case PMC_CPU_ARMV8_CORTEX_A57:
1579 ev = cortex_a57_event_table;
1580 evfence = cortex_a57_event_table + PMC_EVENT_TABLE_SIZE(cortex_a57);
1582 case PMC_CPU_ARMV8_CORTEX_A76:
1583 ev = cortex_a76_event_table;
1584 evfence = cortex_a76_event_table + PMC_EVENT_TABLE_SIZE(cortex_a76);
1586 default: /* Unknown CPU type. */
1589 } else if (pe >= PMC_EV_BERI_FIRST && pe <= PMC_EV_BERI_LAST) {
1590 ev = beri_event_table;
1591 evfence = beri_event_table + PMC_EVENT_TABLE_SIZE(beri);
1592 } else if (pe >= PMC_EV_MIPS24K_FIRST && pe <= PMC_EV_MIPS24K_LAST) {
1593 ev = mips24k_event_table;
1594 evfence = mips24k_event_table + PMC_EVENT_TABLE_SIZE(mips24k);
1595 } else if (pe >= PMC_EV_MIPS74K_FIRST && pe <= PMC_EV_MIPS74K_LAST) {
1596 ev = mips74k_event_table;
1597 evfence = mips74k_event_table + PMC_EVENT_TABLE_SIZE(mips74k);
1598 } else if (pe >= PMC_EV_OCTEON_FIRST && pe <= PMC_EV_OCTEON_LAST) {
1599 ev = octeon_event_table;
1600 evfence = octeon_event_table + PMC_EVENT_TABLE_SIZE(octeon);
1601 } else if (pe >= PMC_EV_PPC7450_FIRST && pe <= PMC_EV_PPC7450_LAST) {
1602 ev = ppc7450_event_table;
1603 evfence = ppc7450_event_table + PMC_EVENT_TABLE_SIZE(ppc7450);
1604 } else if (pe >= PMC_EV_PPC970_FIRST && pe <= PMC_EV_PPC970_LAST) {
1605 ev = ppc970_event_table;
1606 evfence = ppc970_event_table + PMC_EVENT_TABLE_SIZE(ppc970);
1607 } else if (pe >= PMC_EV_POWER8_FIRST && pe <= PMC_EV_POWER8_LAST) {
1608 ev = power8_event_table;
1609 evfence = power8_event_table + PMC_EVENT_TABLE_SIZE(power8);
1610 } else if (pe >= PMC_EV_E500_FIRST && pe <= PMC_EV_E500_LAST) {
1611 ev = e500_event_table;
1612 evfence = e500_event_table + PMC_EVENT_TABLE_SIZE(e500);
1613 } else if (pe == PMC_EV_TSC_TSC) {
1614 ev = tsc_event_table;
1615 evfence = tsc_event_table + PMC_EVENT_TABLE_SIZE(tsc);
1616 } else if ((int)pe >= PMC_EV_SOFT_FIRST && (int)pe <= PMC_EV_SOFT_LAST) {
1617 ev = soft_event_table;
1618 evfence = soft_event_table + soft_event_info.pm_nevent;
1621 for (; ev != evfence; ev++)
1622 if (pe == ev->pm_ev_code)
1623 return (ev->pm_ev_name);
1629 pmc_name_of_event(enum pmc_event pe)
1633 if ((n = _pmc_name_of_event(pe, cpu_info.pm_cputype)) != NULL)
1641 pmc_name_of_mode(enum pmc_mode pm)
1643 if ((int) pm >= PMC_MODE_FIRST &&
1644 pm <= PMC_MODE_LAST)
1645 return (pmc_mode_names[pm]);
1652 pmc_name_of_state(enum pmc_state ps)
1654 if ((int) ps >= PMC_STATE_FIRST &&
1655 ps <= PMC_STATE_LAST)
1656 return (pmc_state_names[ps]);
1665 if (pmc_syscall == -1) {
1670 return (cpu_info.pm_ncpu);
1676 if (pmc_syscall == -1) {
1681 if (cpu < 0 || cpu >= (int) cpu_info.pm_ncpu) {
1686 return (cpu_info.pm_npmc);
1690 pmc_pmcinfo(int cpu, struct pmc_pmcinfo **ppmci)
1693 struct pmc_op_getpmcinfo *pmci;
1695 if ((npmc = pmc_npmc(cpu)) < 0)
1698 nbytes = sizeof(struct pmc_op_getpmcinfo) +
1699 npmc * sizeof(struct pmc_info);
1701 if ((pmci = calloc(1, nbytes)) == NULL)
1706 if (PMC_CALL(GETPMCINFO, pmci) < 0) {
1711 /* kernel<->library, library<->userland interfaces are identical */
1712 *ppmci = (struct pmc_pmcinfo *) pmci;
1717 pmc_read(pmc_id_t pmc, pmc_value_t *value)
1719 struct pmc_op_pmcrw pmc_read_op;
1721 pmc_read_op.pm_pmcid = pmc;
1722 pmc_read_op.pm_flags = PMC_F_OLDVALUE;
1723 pmc_read_op.pm_value = -1;
1725 if (PMC_CALL(PMCRW, &pmc_read_op) < 0)
1728 *value = pmc_read_op.pm_value;
1733 pmc_release(pmc_id_t pmc)
1735 struct pmc_op_simple pmc_release_args;
1737 pmc_release_args.pm_pmcid = pmc;
1738 return (PMC_CALL(PMCRELEASE, &pmc_release_args));
1742 pmc_rw(pmc_id_t pmc, pmc_value_t newvalue, pmc_value_t *oldvaluep)
1744 struct pmc_op_pmcrw pmc_rw_op;
1746 pmc_rw_op.pm_pmcid = pmc;
1747 pmc_rw_op.pm_flags = PMC_F_NEWVALUE | PMC_F_OLDVALUE;
1748 pmc_rw_op.pm_value = newvalue;
1750 if (PMC_CALL(PMCRW, &pmc_rw_op) < 0)
1753 *oldvaluep = pmc_rw_op.pm_value;
1758 pmc_set(pmc_id_t pmc, pmc_value_t value)
1760 struct pmc_op_pmcsetcount sc;
1763 sc.pm_count = value;
1765 if (PMC_CALL(PMCSETCOUNT, &sc) < 0)
1771 pmc_start(pmc_id_t pmc)
1773 struct pmc_op_simple pmc_start_args;
1775 pmc_start_args.pm_pmcid = pmc;
1776 return (PMC_CALL(PMCSTART, &pmc_start_args));
1780 pmc_stop(pmc_id_t pmc)
1782 struct pmc_op_simple pmc_stop_args;
1784 pmc_stop_args.pm_pmcid = pmc;
1785 return (PMC_CALL(PMCSTOP, &pmc_stop_args));
1789 pmc_width(pmc_id_t pmcid, uint32_t *width)
1794 cl = PMC_ID_TO_CLASS(pmcid);
1795 for (i = 0; i < cpu_info.pm_nclass; i++)
1796 if (cpu_info.pm_classes[i].pm_class == cl) {
1797 *width = cpu_info.pm_classes[i].pm_width;
1805 pmc_write(pmc_id_t pmc, pmc_value_t value)
1807 struct pmc_op_pmcrw pmc_write_op;
1809 pmc_write_op.pm_pmcid = pmc;
1810 pmc_write_op.pm_flags = PMC_F_NEWVALUE;
1811 pmc_write_op.pm_value = value;
1812 return (PMC_CALL(PMCRW, &pmc_write_op));
1816 pmc_writelog(uint32_t userdata)
1818 struct pmc_op_writelog wl;
1820 wl.pm_userdata = userdata;
1821 return (PMC_CALL(WRITELOG, &wl));