1 .\" Copyright (c) 2003-2007 Joseph Koshy. All rights reserved.
3 .\" Redistribution and use in source and binary forms, with or without
4 .\" modification, are permitted provided that the following conditions
6 .\" 1. Redistributions of source code must retain the above copyright
7 .\" notice, this list of conditions and the following disclaimer.
8 .\" 2. Redistributions in binary form must reproduce the above copyright
9 .\" notice, this list of conditions and the following disclaimer in the
10 .\" documentation and/or other materials provided with the distribution.
12 .\" This software is provided by Joseph Koshy ``as is'' and
13 .\" any express or implied warranties, including, but not limited to, the
14 .\" implied warranties of merchantability and fitness for a particular purpose
15 .\" are disclaimed. in no event shall Joseph Koshy be liable
16 .\" for any direct, indirect, incidental, special, exemplary, or consequential
17 .\" damages (including, but not limited to, procurement of substitute goods
18 .\" or services; loss of use, data, or profits; or business interruption)
19 .\" however caused and on any theory of liability, whether in contract, strict
20 .\" liability, or tort (including negligence or otherwise) arising in any way
21 .\" out of the use of this software, even if advised of the possibility of
31 .Nd library for accessing hardware performance monitoring counters
39 provides a programming interface that allows applications to use
40 hardware performance counters to gather performance data about
41 specific processes or for the system as a whole.
42 The library is implemented using the lower-level facilities offered by
47 Performance monitoring counters (PMCs) are represented by the library
48 using a software abstraction.
51 PMCs can have one two scopes:
55 These PMCs measure events in a whole-system manner, i.e., independent
56 of the currently executing thread.
57 System scope PMCs are allocated on specific CPUs and do not
59 Non-privileged process are allowed to allocate system scope PMCs if the
62 .Va security.bsd.unprivileged_syspmcs
66 These PMCs only measure hardware events when the processes they are
67 attached to are executing on a CPU.
68 In an SMP system, process scope PMCs migrate between CPUs along with
69 their target processes.
72 Orthogonal to PMC scope, PMCs may be allocated in one of two
76 Counting PMCs measure events according to their scope
78 The application needs to explicitly read these counters
79 to retrieve their value.
81 Sampling PMCs cause the CPU to be periodically interrupted
82 and information about its state of execution to be collected.
83 Sampling PMCs are used to profile specific processes and kernel
84 threads or to profile the system as a whole.
87 The scope and operational mode for a software PMC are specified at
89 An application is allowed to allocate multiple PMCs subject
90 to availability of hardware resources.
92 The library uses human-readable strings to name the event being
94 The syntax used for specifying a hardware event along with additional
95 event specific qualifiers (if any) is described in detail in section
96 .Sx "EVENT SPECIFIERS"
99 PMCs are associated with the process that allocated them and
100 will be automatically reclaimed by the system when the process exits.
101 Additionally, process-scope PMCs have to be attached to one or more
102 target processes before they can perform measurements.
103 A process-scope PMC may be attached to those target processes
104 that its owner process would otherwise be permitted to debug.
105 An owner process may attach PMCs to itself allowing
106 it to measure its own behavior.
107 Additionally, on some machine architectures, such self-attached PMCs
108 may be read cheaply using specialized instructions supported by the
111 Certain kinds of PMCs require that a log file be configured before
116 System scope sampling PMCs.
118 Process scope sampling PMCs.
120 Process scope counting PMCs that have been configured to report PMC
121 readings on process context switches or process exits.
123 Upto one log file may be configured per owner process.
124 Events logged to a log file may be subsequently analyzed using the
128 The CPUs known to the PMC library are named by the
129 .Vt "enum pmc_cputype"
131 Supported CPUs include:
132 .Bl -tag -width PMC_CPU_INTEL_PIII -compact
143 .It PMC_CPU_INTEL_PII
144 .Tn "Intel Pentium II"
146 .It PMC_CPU_INTEL_PIII
147 .Tn "Intel Pentium III"
150 .Tn "Intel Pentium M"
152 .It PMC_CPU_INTEL_PIV
153 .Tn "Intel Pentium 4"
157 PMC supported by this library are named by the
160 Supported PMC kinds include:
161 .Bl -tag -width PMC_CLASS_TSC -compact
163 The timestamp counter on i386 and amd64 architecture CPUs.
165 Programmable hardware counters present in
169 Programmable hardware counters present in
173 Programmable hardware counters present in
183 Programmable hardware counters present in
184 .Tn "Intel Pentium 4"
189 Capabilities of performance monitoring hardware are denoted using
193 Supported capabilities include:
194 .Bl -tag -width "PMC_CAP_INTERRUPT" -compact
196 The ability to count negated to asserted transitions of the hardware
197 conditions being probed for.
198 .It PMC_CAP_INTERRUPT
199 The ability to interrupt the CPU.
201 The ability to invert the sense of the hardware conditions being
204 PMC hardware allows the CPU to read performance counters.
205 .It PMC_CAP_QUALIFIER
206 The hardware allows monitored to be further qualified in some
207 system dependent way.
209 The ability to restrict counting of hardware events to when the CPU is
210 running privileged code.
211 .It PMC_CAP_THRESHOLD
212 The ability to ignore simultaneous hardware events below a
213 programmable threshold.
215 The ability to restrict counting of hardware events to those when the
216 CPU is running unprivileged code.
218 PMC hardware allows CPUs write to counters.
220 .Ss Functional Grouping
221 This section contains a brief overview of the available functionality
223 Each function listed here is described further in its own manual page.
224 .Bl -tag -width indent
227 .It Fn pmc_disable , Fn pmc_enable
228 Administratively disable (enable) specific performance monitoring
230 Counters that are disabled will not be available to applications to
233 .It "Convenience Functions"
235 .It Fn pmc_event_names_of_class
236 Returns a list of event names supported by a given PMC type.
237 .It Fn pmc_name_of_capability
240 flag to a human-readable string.
241 .It Fn pmc_name_of_class
244 constant to a human-readable string.
245 .It Fn pmc_name_of_cputype
246 Return a human-readable name for a CPU type.
247 .It Fn pmc_name_of_disposition
248 Return a human-readable string describing a PMC's disposition.
249 .It Fn pmc_name_of_event
250 Convert a numeric event code to a human-readable string.
251 .It Fn pmc_name_of_mode
254 constant to a human-readable name.
255 .It Fn pmc_name_of_state
256 Return a human-readable string describing a PMC's current state.
258 .It "Library Initialization"
261 Initialize the library.
262 This function must be called before any other library function.
264 .It "Log File Handling"
266 .It Fn pmc_configure_logfile
267 Configure a log file for
269 to write logged events to.
270 .It Fn pmc_flush_logfile
271 Flush all pending log data in
275 Append arbitrary user data to the current log file.
279 .It Fn pmc_allocate , Fn pmc_release
280 Allocate (free) a PMC.
281 .It Fn pmc_attach , Fn pmc_detach
282 Attach (detach) a process scope PMC to a target.
283 .It Fn pmc_read , Fn pmc_write , Fn pmc_rw
284 Read (write) a value from (to) a PMC.
285 .It Fn pmc_start , Fn pmc_stop
286 Start (stop) a software PMC.
288 Set the reload value for a sampling PMC.
292 .It Fn pmc_capabilities
293 Retrieve the capabilities for a given PMC.
295 Retrieve information about the CPUs and PMC hardware present in the
297 .It Fn pmc_get_driver_stats
298 Retrieve statistics maintained by
301 Determine the number of CPUs in the system.
303 Return the number of hardware PMCs present in a given CPU.
305 Return information about the state of a given CPU's PMCs.
307 Determine the width of a hardware counter in bits.
309 .It "x86 Architecture Specific API"
312 Returns the processor model specific register number
315 Applications may then use the x86
317 instruction to directly read the contents of the PMC.
320 .Ss Signal Handling Requirements
321 Applications using PMCs are required to handle the following signals:
322 .Bl -tag -width ".Dv SIGBUS"
326 module is unloaded using
328 processes that have PMCs allocated to them will be sent a
334 driver will send a PMC owning process a
339 If any process-mode PMC allocated by it loses all its
342 If the driver encounters an error when writing log data to a
344 This error may be retrieved by a subsequent call to
345 .Fn pmc_flush_logfile .
348 .Ss Typical Program Flow
351 An application would first invoke function
353 to allow the library to initialize itself.
355 Signal handling would then be set up.
357 Next the application would allocate the PMCs it desires using function
360 Initial values for PMCs may be set using function
363 If a log file is necessary for the PMCs to work, it would
364 be configured using function
365 .Fn pmc_configure_logfile .
367 Process scope PMCs would then be attached to their target processes
371 The PMCs would then be started using function
374 Once started, the values of counting PMCs may be read using function
376 For PMCs that write events to the log file, this logged data would be
377 read and parsed using the
381 PMCs are stopped using function
383 and process scope PMCs are detached from their targets using
387 Before the process exits, its may release its PMCs using function
389 Any configured log file may be closed using function
390 .Fn pmc_configure_logfile .
393 Event specifiers are strings comprising of an event name, followed by
394 optional parameters modifying the semantics of the hardware event
396 Event names are PMC architecture dependent, but the PMC library defines
397 machine independent aliases for commonly used events.
398 .Ss Event Name Aliases
399 Event name aliases are CPU architecture independent names for commonly
401 The following aliases are known to this version of the
404 .Bl -tag -width indent
406 Measure the number of branches retired.
407 .It Li branch-mispredicts
408 Measure the number of retired branches that were mispredicted.
410 Measure processor cycles.
411 This event is implemented using the processor's Time Stamp Counter
414 Measure the number of data cache misses.
416 Measure the number of instruction cache misses.
418 Measure the number of instructions retired.
420 Measure the number of interrupts seen.
421 .It Li unhalted-cycles
422 Measure the number of cycles the processor is not in a halted
425 .Ss Time Stamp Counter (TSC)
426 The timestamp counter is a monotonically non-decreasing counter that
427 counts processor cycles.
429 In the i386 architecture, this counter may
430 be selected by requesting an event with event specifier
434 event does not support any further qualifiers.
435 It can only be allocated in system-wide counting mode,
436 and is a read-only counter.
437 Multiple processes are allowed to allocate the TSC.
438 Once allocated, it may be read using the
440 function, or by using the RDTSC instruction.
442 These PMCs are present in the
444 series of CPUs and are documented in:
446 .%B "AMD Athlon Processor x86 Code Optimization Guide"
447 .%N "Publication No. 22007"
449 .%Q "Advanced Micro Devices, Inc."
452 Event specifiers for AMD K7 PMCs can have the following optional
454 .Bl -tag -width indent
455 .It Li count= Ns Ar value
456 Configure the counter to increment only if the number of configured
457 events measured in a cycle is greater than or equal to
460 Configure the counter to only count negated-to-asserted transitions
461 of the conditions expressed by the other qualifiers.
462 In other words, the counter will increment only once whenever a given
463 condition becomes true, irrespective of the number of clocks during
464 which the condition remains true.
466 Invert the sense of comparision when the
468 qualifier is present, making the counter to increment when the
469 number of events per cycle is less than the value specified by
474 Configure the PMC to count events happening at privilege level 0.
475 .It Li unitmask= Ns Ar mask
476 This qualifier is used to further qualify a select few events,
477 .Dq Li k7-dc-refills-from-l2 ,
478 .Dq Li k7-dc-refills-from-system
480 .Dq Li k7-dc-writebacks .
483 is a string of the following characters optionally separated by
487 .Bl -tag -width indent -compact
489 Count operations for lines in the
493 Count operations for lines in the
497 Count operations for lines in the
501 Count operations for lines in the
505 Count operations for lines in the
512 qualifier is specified, the default is to count events for caches
513 lines in any of the above states.
515 Configure the PMC to count events occurring at privilege levels 1, 2
523 qualifiers were specified, the default is to enable both.
525 The event specifiers supported on AMD K7 PMCs are:
526 .Bl -tag -width indent
527 .It Li k7-dc-accesses
528 Count data cache accesses.
530 Count data cache misses.
531 .It Li k7-dc-refills-from-l2 Op Li ,unitmask= Ns Ar mask
532 Count data cache refills from L2 cache.
533 This event may be further qualified using the
536 .It Li k7-dc-refills-from-system Op Li ,unitmask= Ns Ar mask
537 Count data cache refills from system memory.
538 This event may be further qualified using the
541 .It Li k7-dc-writebacks Op Li ,unitmask= Ns Ar mask
542 Count data cache writebacks.
543 This event may be further qualified using the
546 .It Li k7-l1-dtlb-miss-and-l2-dtlb-hits
547 Count L1 DTLB misses and L2 DTLB hits.
548 .It Li k7-l1-and-l2-dtlb-misses
549 Count L1 and L2 DTLB misses.
550 .It Li k7-misaligned-references
551 Count misaligned data references.
553 Count instruction cache fetches.
555 Count instruction cache misses.
556 .It Li k7-l1-itlb-misses
557 Count L1 ITLB misses that are L2 ITLB hits.
558 .It Li k7-l1-l2-itlb-misses
559 Count L1 (and L2) ITLB misses.
560 .It Li k7-retired-instructions
561 Count all retired instructions.
562 .It Li k7-retired-ops
564 .It Li k7-retired-branches
565 Count all retired branches (conditional, unconditional, exceptions
567 .It Li k7-retired-branches-mispredicted
568 Count all misprediced retired branches.
569 .It Li k7-retired-taken-branches
570 Count retired taken branches.
571 .It Li k7-retired-taken-branches-mispredicted
572 Count mispredicted taken branches that were retired.
573 .It Li k7-retired-far-control-transfers
574 Count retired far control transfers.
575 .It Li k7-retired-resync-branches
576 Count retired resync branches (non control transfer branches).
577 .It Li k7-interrupts-masked-cycles
578 Count the number of cycles when the processor's
581 .It Li k7-interrupts-masked-while-pending-cycles
582 Count the number of cycles interrupts were masked while pending due
586 .It Li k7-hardware-interrupts
587 Count the number of taken hardware interrupts.
590 These PMCs are present in the
595 They are documented in:
597 .%B "BIOS and Kernel Developer's Guide for the AMD Athlon(tm) 64 and AMD Opteron Processors"
598 .%N "Publication No. 26094"
600 .%Q "Advanced Micro Devices, Inc."
603 Event specifiers for AMD K8 PMCs can have the following optional
605 .Bl -tag -width indent
606 .It Li count= Ns Ar value
607 Configure the counter to increment only if the number of configured
608 events measured in a cycle is greater than or equal to
611 Configure the counter to only count negated-to-asserted transitions
612 of the conditions expressed by the other fields.
613 In other words, the counter will increment only once whenever a given
614 condition becomes true, irrespective of the number of clocks during
615 which the condition remains true.
617 Invert the sense of comparision when the
619 qualifier is present, making the counter to increment when the
620 number of events per cycle is less than the value specified by
624 .It Li mask= Ns Ar qualifier
625 Many event specifiers for AMD K8 PMCs need to be additionally
626 qualified using a mask qualifier.
627 These additional qualifiers are event-specific and are documented
628 along with their associated event specifiers below.
630 Configure the PMC to count events happening at privilege level 0.
632 Configure the PMC to count events occurring at privilege levels 1, 2
640 qualifiers were specified, the default is to enable both.
642 The event specifiers supported on AMD K8 PMCs are:
643 .Bl -tag -width indent
644 .It Li k8-bu-cpu-clk-unhalted
645 Count the number of clock cycles when the CPU is not in the HLT or
647 .It Li k8-bu-fill-request-l2-miss Op Li ,mask= Ns Ar qualifier
648 Count fill requests that missed in the L2 cache.
649 This event may be further qualified using
653 separated set of the following keywords:
655 .Bl -tag -width indent -compact
657 Count data cache fill requests.
659 Count instruction cache fill requests.
664 The default is to count all types of requests.
665 .It Li k8-bu-internal-l2-request Op Li ,mask= Ns Ar qualifier
666 Count internally generated requests to the L2 cache.
667 This event may be further qualified using
671 separated set of the following keywords:
673 .Bl -tag -width indent -compact
675 Count cancelled requests.
677 Count data cache fill requests.
679 Count instruction cache fill requests.
681 Count tag snoop requests.
686 The default is to count all types of requests.
688 Count data cache accesses including microcode scratchpad accesses.
689 .It Li k8-dc-copyback Op Li ,mask= Ns Ar qualifier
690 Count data cache copyback operations.
691 This event may be further qualified using
695 separated set of the following keywords:
697 .Bl -tag -width indent -compact
699 Count operations for lines in the
703 Count operations for lines in the
707 Count operations for lines in the
711 Count operations for lines in the
715 Count operations for lines in the
720 The default is to count operations for lines in all the
722 .It Li k8-dc-dcache-accesses-by-locks Op Li ,mask= Ns Ar qualifier
723 Count data cache accesses by lock instructions.
724 This event is only available on processors of revision C or later
726 This event may be further qualified using
730 separated set of the following keywords:
732 .Bl -tag -width indent -compact
734 Count data cache accesses by lock instructions.
736 Count data cache misses by lock instructions.
739 The default is to count all accesses.
740 .It Li k8-dc-dispatched-prefetch-instructions Op Li ,mask= Ns Ar qualifier
741 Count the number of dispatched prefetch instructions.
742 This event may be further qualified using
746 separated set of the following keywords:
748 .Bl -tag -width indent -compact
750 Count load operations.
752 Count non-temporal operations.
754 Count store operations.
757 The default is to count all operations.
758 .It Li k8-dc-l1-dtlb-miss-and-l2-dtlb-hit
759 Count L1 DTLB misses that are L2 DTLB hits.
760 .It Li k8-dc-l1-dtlb-miss-and-l2-dtlb-miss
761 Count L1 DTLB misses that are also misses in the L2 DTLB.
762 .It Li k8-dc-microarchitectural-early-cancel-of-an-access
763 Count microarchitectural early cancels of data cache accesses.
764 .It Li k8-dc-microarchitectural-late-cancel-of-an-access
765 Count microarchitectural late cancels of data cache accesses.
766 .It Li k8-dc-misaligned-data-reference
767 Count misaligned data references.
769 Count data cache misses.
770 .It Li k8-dc-one-bit-ecc-error Op Li ,mask= Ns Ar qualifier
771 Count one bit ECC errors found by the scrubber.
772 This event may be further qualified using
776 separated set of the following keywords:
778 .Bl -tag -width indent -compact
780 Count scrubber detected errors.
782 Count piggyback scrubber errors.
785 The default is to count both kinds of errors.
786 .It Li k8-dc-refill-from-l2 Op Li ,mask= Ns Ar qualifier
787 Count data cache refills from L2 cache.
788 This event may be further qualified using
792 separated set of the following keywords:
794 .Bl -tag -width indent -compact
796 Count operations for lines in the
800 Count operations for lines in the
804 Count operations for lines in the
808 Count operations for lines in the
812 Count operations for lines in the
817 The default is to count operations for lines in all the
819 .It Li k8-dc-refill-from-system Op Li ,mask= Ns Ar qualifier
820 Count data cache refills from system memory.
821 This event may be further qualified using
825 separated set of the following keywords:
827 .Bl -tag -width indent -compact
829 Count operations for lines in the
833 Count operations for lines in the
837 Count operations for lines in the
841 Count operations for lines in the
845 Count operations for lines in the
850 The default is to count operations for lines in all the
852 .It Li k8-fp-dispatched-fpu-ops Op Li ,mask= Ns Ar qualifier
853 Count the number of dispatched FPU ops.
854 This event is supported in revision B and later CPUs.
855 This event may be further qualified using
859 separated set of the following keywords:
861 .Bl -tag -width indent -compact
862 .It Li add-pipe-excluding-junk-ops
863 Count add pipe ops excluding junk ops.
864 .It Li add-pipe-junk-ops
865 Count junk ops in the add pipe.
866 .It Li multiply-pipe-excluding-junk-ops
867 Count multiply pipe ops excluding junk ops.
868 .It Li multiply-pipe-junk-ops
869 Count junk ops in the multiply pipe.
870 .It Li store-pipe-excluding-junk-ops
871 Count store pipe ops excluding junk ops
872 .It Li store-pipe-junk-ops
873 Count junk ops in the store pipe.
876 The default is to count all types of ops.
877 .It Li k8-fp-cycles-with-no-fpu-ops-retired
878 Count cycles when no FPU ops were retired.
879 This event is supported in revision B and later CPUs.
880 .It Li k8-fp-dispatched-fpu-fast-flag-ops
881 Count dispatched FPU ops that use the fast flag interface.
882 This event is supported in revision B and later CPUs.
883 .It Li k8-fr-decoder-empty
884 Count cycles when there was nothing to dispatch (i.e., the decoder
886 .It Li k8-fr-dispatch-stalls
887 Count all dispatch stalls.
888 .It Li k8-fr-dispatch-stall-for-segment-load
889 Count dispatch stalls for segment loads.
890 .It Li k8-fr-dispatch-stall-for-serialization
891 Count dispatch stalls for serialization.
892 .It Li k8-fr-dispatch-stall-from-branch-abort-to-retire
893 Count dispatch stalls from branch abort to retiral.
894 .It Li k8-fr-dispatch-stall-when-fpu-is-full
895 Count dispatch stalls when the FPU is full.
896 .It Li k8-fr-dispatch-stall-when-ls-is-full
897 Count dispatch stalls when the load/store unit is full.
898 .It Li k8-fr-dispatch-stall-when-reorder-buffer-is-full
899 Count dispatch stalls when the reorder buffer is full.
900 .It Li k8-fr-dispatch-stall-when-reservation-stations-are-full
901 Count dispatch stalls when reservation stations are full.
902 .It Li k8-fr-dispatch-stall-when-waiting-for-all-to-be-quiet
903 Count dispatch stalls when waiting for all to be quiet.
904 .\" XXX What does "waiting for all to be quiet" mean?
905 .It Li k8-fr-dispatch-stall-when-waiting-far-xfer-or-resync-branch-pending
906 Count dispatch stalls when a far control transfer or a resync branch
908 .It Li k8-fr-fpu-exceptions Op Li ,mask= Ns Ar qualifier
909 Count FPU exceptions.
910 This event is supported in revision B and later CPUs.
911 This event may be further qualified using
915 separated set of the following keywords:
917 .Bl -tag -width indent -compact
918 .It Li sse-and-x87-microtraps
919 Count SSE and x87 microtraps.
920 .It Li sse-reclass-microfaults
921 Count SSE reclass microfaults
922 .It Li sse-retype-microfaults
923 Count SSE retype microfaults
924 .It Li x87-reclass-microfaults
925 Count x87 reclass microfaults.
928 The default is to count all types of exceptions.
929 .It Li k8-fr-interrupts-masked-cycles
930 Count cycles when interrupts were masked (by CPU RFLAGS field IF was zero).
931 .It Li k8-fr-interrupts-masked-while-pending-cycles
932 Count cycles while interrupts were masked while pending (i.e., cycles
933 when INTR was asserted while CPU RFLAGS field IF was zero).
934 .It Li k8-fr-number-of-breakpoints-for-dr0
935 Count the number of breakpoints for DR0.
936 .It Li k8-fr-number-of-breakpoints-for-dr1
937 Count the number of breakpoints for DR1.
938 .It Li k8-fr-number-of-breakpoints-for-dr2
939 Count the number of breakpoints for DR2.
940 .It Li k8-fr-number-of-breakpoints-for-dr3
941 Count the number of breakpoints for DR3.
942 .It Li k8-fr-retired-branches
943 Count retired branches including exceptions and interrupts.
944 .It Li k8-fr-retired-branches-mispredicted
945 Count mispredicted retired branches.
946 .It Li k8-fr-retired-far-control-transfers
947 Count retired far control transfers (which are always mispredicted).
948 .It Li k8-fr-retired-fastpath-double-op-instructions Op Li ,mask= Ns Ar qualifier
949 Count retired fastpath double op instructions.
950 This event is supported in revision B and later CPUs.
951 This event may be further qualified using
955 separated set of the following keywords:
957 .Bl -tag -width indent -compact
959 Count instructions with the low op in position 0.
961 Count instructions with the low op in position 1.
963 Count instructions with the low op in position 2.
966 The default is to count all types of instructions.
967 .It Li k8-fr-retired-fpu-instructions Op Li ,mask= Ns Ar qualifier
968 Count retired FPU instructions.
969 This event is supported in revision B and later CPUs.
970 This event may be further qualified using
974 separated set of the following keywords:
976 .Bl -tag -width indent -compact
978 Count MMX and 3DNow!\& instructions.
979 .It Li packed-sse-sse2
980 Count packed SSE and SSE2 instructions.
981 .It Li scalar-sse-sse2
982 Count scalar SSE and SSE2 instructions
984 Count x87 instructions.
987 The default is to count all types of instructions.
988 .It Li k8-fr-retired-near-returns
989 Count retired near returns.
990 .It Li k8-fr-retired-near-returns-mispredicted
991 Count mispredicted near returns.
992 .It Li k8-fr-retired-resyncs
993 Count retired resyncs (non-control transfer branches).
994 .It Li k8-fr-retired-taken-hardware-interrupts
995 Count retired taken hardware interrupts.
996 .It Li k8-fr-retired-taken-branches
997 Count retired taken branches.
998 .It Li k8-fr-retired-taken-branches-mispredicted
999 Count retired taken branches that were mispredicted.
1000 .It Li k8-fr-retired-taken-branches-mispredicted-by-addr-miscompare
1001 Count retired taken branches that were mispredicted only due to an
1003 .It Li k8-fr-retired-uops
1005 .It Li k8-fr-retired-x86-instructions
1006 Count retired x86 instructions including exceptions and interrupts.
1008 Count instruction cache fetches.
1009 .It Li k8-ic-instruction-fetch-stall
1010 Count cycles in stalls due to instruction fetch.
1011 .It Li k8-ic-l1-itlb-miss-and-l2-itlb-hit
1012 Count L1 ITLB misses that are L2 ITLB hits.
1013 .It Li k8-ic-l1-itlb-miss-and-l2-itlb-miss
1014 Count ITLB misses that miss in both L1 and L2 ITLBs.
1015 .It Li k8-ic-microarchitectural-resync-by-snoop
1016 Count microarchitectural resyncs caused by snoops.
1018 Count instruction cache misses.
1019 .It Li k8-ic-refill-from-l2
1020 Count instruction cache refills from L2 cache.
1021 .It Li k8-ic-refill-from-system
1022 Count instruction cache refills from system memory.
1023 .It Li k8-ic-return-stack-hits
1024 Count hits to the return stack.
1025 .It Li k8-ic-return-stack-overflow
1026 Count overflows of the return stack.
1027 .It Li k8-ls-buffer2-full
1028 Count load/store buffer2 full events.
1029 .It Li k8-ls-locked-operation Op Li ,mask= Ns Ar qualifier
1030 Count locked operations.
1031 For revision C and later CPUs, the following qualifiers are supported:
1033 .Bl -tag -width indent -compact
1034 .It Li cycles-in-request
1035 Count the number of cycles in the lock request/grant stage.
1036 .It Li cycles-to-complete
1037 Count the number of cycles a lock takes to complete once it is
1038 non-speculative and is the older load/store operation.
1039 .It Li locked-instructions
1040 Count the number of lock instructions executed.
1043 The default is to count the number of lock instructions executed.
1044 .It Li k8-ls-microarchitectural-late-cancel
1045 Count microarchitectural late cancels of operations in the load/store
1047 .It Li k8-ls-microarchitectural-resync-by-self-modifying-code
1048 Count microarchitectural resyncs caused by self-modifying code.
1049 .It Li k8-ls-microarchitectural-resync-by-snoop
1050 Count microarchitectural resyncs caused by snoops.
1051 .It Li k8-ls-retired-cflush-instructions
1052 Count retired CFLUSH instructions.
1053 .It Li k8-ls-retired-cpuid-instructions
1054 Count retired CPUID instructions.
1055 .It Li k8-ls-segment-register-load Op Li ,mask= Ns Ar qualifier
1056 Count segment register loads.
1057 This event may be further qualified using
1061 separated set of the following keywords:
1062 .Bl -tag -width indent -compact
1064 Count CS register loads.
1066 Count DS register loads.
1068 Count ES register loads.
1070 Count FS register loads.
1072 Count GS register loads.
1074 .\" Count HS register loads.
1075 .\" XXX "HS" register?
1077 Count SS register loads.
1080 The default is to count all types of loads.
1081 .It Li k8-nb-memory-controller-bypass-saturation Op Li ,mask= Ns Ar qualifier
1082 Count memory controller bypass counter saturation events.
1083 This event may be further qualified using
1087 separated set of the following keywords:
1089 .Bl -tag -width indent -compact
1090 .It Li dram-controller-interface-bypass
1091 Count DRAM controller interface bypass.
1092 .It Li dram-controller-queue-bypass
1093 Count DRAM controller queue bypass.
1094 .It Li memory-controller-hi-pri-bypass
1095 Count memory controller high priority bypasses.
1096 .It Li memory-controller-lo-pri-bypass
1097 Count memory controller low priority bypasses.
1100 .It Li k8-nb-memory-controller-dram-slots-missed
1101 Count memory controller DRAM command slots missed (in MemClks).
1102 .It Li k8-nb-memory-controller-page-access-event Op Li ,mask= Ns Ar qualifier
1103 Count memory controller page access events.
1104 This event may be further qualified using
1108 separated set of the following keywords:
1110 .Bl -tag -width indent -compact
1111 .It Li page-conflict
1112 Count page conflicts.
1119 The default is to count all types of events.
1120 .It Li k8-nb-memory-controller-page-table-overflow
1121 Count memory control page table overflow events.
1122 .It Li k8-nb-probe-result Op Li ,mask= Ns Ar qualifier
1124 This event may be further qualified using
1128 separated set of the following keywords:
1130 .Bl -tag -width indent -compact
1132 Count all probe hits.
1133 .It Li probe-hit-dirty-no-memory-cancel
1134 Count probe hits without memory cancels.
1135 .It Li probe-hit-dirty-with-memory-cancel
1136 Count probe hits with memory cancels.
1140 .It Li k8-nb-sized-commands Op Li ,mask= Ns Ar qualifier
1141 Count sized commands issued.
1142 This event may be further qualified using
1146 separated set of the following keywords:
1148 .Bl -tag -width indent -compact
1149 .It Li nonpostwrszbyte
1150 .It Li nonpostwrszdword
1152 .It Li postwrszdword
1158 The default is to count all types of commands.
1159 .It Li k8-nb-memory-controller-turnaround Op Li ,mask= Ns Ar qualifier
1160 Count memory control turnaround events.
1161 This event may be further qualified using
1165 separated set of the following keywords:
1167 .Bl -tag -width indent -compact
1168 .\" XXX doc is unclear whether these are cycle counts or event counts
1169 .It Li dimm-turnaround
1170 Count DIMM turnarounds.
1171 .It Li read-to-write-turnaround
1172 Count read to write turnarounds.
1173 .It Li write-to-read-turnaround
1174 Count write to read turnarounds.
1177 The default is to count all types of events.
1178 .It Li k8-nb-ht-bus0-bandwidth Op Li ,mask= Ns Ar qualifier
1179 .It Li k8-nb-ht-bus1-bandwidth Op Li ,mask= Ns Ar qualifier
1180 .It Li k8-nb-ht-bus2-bandwidth Op Li ,mask= Ns Ar qualifier
1181 Count events on the HyperTransport(tm) buses.
1182 These events may be further qualified using
1186 separated set of the following keywords:
1188 .Bl -tag -width indent -compact
1189 .It Li buffer-release
1190 Count buffer release messages sent.
1192 Count command messages sent.
1194 Count data messages sent.
1196 Count nop messages sent.
1199 The default is to count all types of messages.
1202 Intel P6 PMCs are present in Intel
1211 These CPUs have two counters.
1212 Some events may only be used on specific counters and some events are
1213 defined only on specific processor models.
1215 These PMCs are documented in
1217 .%B "IA-32 Intel(R) Architecture Software Developer's Manual"
1218 .%T "Volume 3: System Programming Guide"
1219 .%N "Order Number 245472-012"
1221 .%Q "Intel Corporation"
1224 Some of these events are affected by processor errata described in
1226 .%B "Intel(R) Pentium(R) III Processor Specification Update"
1227 .%N "Document Number: 244453-054"
1229 .%Q "Intel Corporation"
1232 Event specifiers for Intel P6 PMCs can have the following common
1234 .Bl -tag -width indent
1235 .It Li cmask= Ns Ar value
1236 Configure the PMC to increment only if the number of configured
1237 events measured in a cycle is greater than or equal to
1240 Configure the PMC to count the number of deasserted to asserted
1241 transitions of the conditions expressed by the other qualifiers.
1242 If specified, the counter will increment only once whenever a
1243 condition becomes true, irrespective of the number of clocks during
1244 which the condition remains true.
1246 Invert the sense of comparision when the
1248 qualifier is present, making the counter increment when the number of
1249 events per cycle is less than the value specified by the
1253 Configure the PMC to count events happening at processor privilege
1255 .It Li umask= Ns Ar value
1256 This qualifier is used to further qualify the event selected (see
1259 Configure the PMC to count events occurring at privilege levels 1, 2
1267 qualifiers are specified, the default is to enable both.
1269 The event specifiers supported by Intel P6 PMCs are:
1270 .Bl -tag -width indent
1272 Count the number of times a static branch prediction was made by the
1273 branch decoder because the BTB did not have a prediction.
1274 .It Li p6-br-bac-missp-exec
1276 Count the number of branch instructions executed that where
1277 mispredicted at the Front End (BAC).
1279 Count the number of bogus branches.
1280 .It Li p6-br-call-exec
1282 Count the number of call instructions executed.
1283 .It Li p6-br-call-missp-exec
1285 Count the number of call instructions executed that were mispredicted.
1286 .It Li p6-br-cnd-exec
1288 Count the number of conditional branch instructions executed.
1289 .It Li p6-br-cnd-missp-exec
1291 Count the number of conditional branch instructions executed that were
1293 .It Li p6-br-ind-call-exec
1295 Count the number of indirect call instructions executed.
1296 .It Li p6-br-ind-exec
1298 Count the number of indirect branch instructions executed.
1299 .It Li p6-br-ind-missp-exec
1301 Count the number of indirect branch instructions executed that were
1303 .It Li p6-br-inst-decoded
1304 Count the number of branch instructions decoded.
1305 .It Li p6-br-inst-exec
1307 Count the number of branch instructions executed but necessarily retired.
1308 .It Li p6-br-inst-retired
1309 Count the number of branch instructions retired.
1310 .It Li p6-br-miss-pred-retired
1311 Count the number of mispredicted branch instructions retired.
1312 .It Li p6-br-miss-pred-taken-ret
1313 Count the number of taken mispredicted branches retired.
1314 .It Li p6-br-missp-exec
1316 Count the number of branch instructions executed that were
1317 mispredicted at execution.
1318 .It Li p6-br-ret-bac-missp-exec
1320 Count the number of return instructions executed that were
1321 mispredicted at the Front End (BAC).
1322 .It Li p6-br-ret-exec
1324 Count the number of return instructions executed.
1325 .It Li p6-br-ret-missp-exec
1327 Count the number of return instructions executed that were
1328 mispredicted at execution.
1329 .It Li p6-br-taken-retired
1330 Count the number of taken branches retired.
1331 .It Li p6-btb-misses
1332 Count the number of branches for which the BTB did not produce a
1334 .It Li p6-bus-bnr-drv
1335 Count the number of bus clock cycles during which this processor is
1336 driving the BNR# pin.
1337 .It Li p6-bus-data-rcv
1338 Count the number of bus clock cycles during which this processor is
1340 .It Li p6-bus-drdy-clocks Op Li ,umask= Ns Ar qualifier
1341 Count the number of clocks during which DRDY# is asserted.
1342 An additional qualifier may be specified, and comprises one of the
1345 .Bl -tag -width indent -compact
1347 Count transactions generated by any agent on the bus.
1349 Count transactions generated by this processor.
1352 The default is to count operations generated by this processor.
1353 .It Li p6-bus-hit-drv
1354 Count the number of bus clock cycles during which this processor is
1355 driving the HIT# pin.
1356 .It Li p6-bus-hitm-drv
1357 Count the number of bus clock cycles during which this processor is
1358 driving the HITM# pin.
1359 .It Li p6-bus-lock-clocks Op Li ,umask= Ns Ar qualifier
1360 Count the number of clocks during with LOCK# is asserted on the
1361 external system bus.
1362 An additional qualifier may be specified and comprises one of the following
1365 .Bl -tag -width indent -compact
1367 Count transactions generated by any agent on the bus.
1369 Count transactions generated by this processor.
1372 The default is to count operations generated by this processor.
1373 .It Li p6-bus-req-outstanding
1374 Count the number of bus requests outstanding in any given cycle.
1375 .It Li p6-bus-snoop-stall
1376 Count the number of clock cycles during which the bus is snoop stalled.
1377 .It Li p6-bus-tran-any Op Li ,umask= Ns Ar qualifier
1378 Count the number of completed bus transactions of any kind.
1379 An additional qualifier may be specified and comprises one of the following
1382 .Bl -tag -width indent -compact
1384 Count transactions generated by any agent on the bus.
1386 Count transactions generated by this processor.
1389 The default is to count operations generated by this processor.
1390 .It Li p6-bus-tran-brd Op Li ,umask= Ns Ar qualifier
1391 Count the number of burst read transactions.
1392 An additional qualifier may be specified and comprises one of the following
1395 .Bl -tag -width indent -compact
1397 Count transactions generated by any agent on the bus.
1399 Count transactions generated by this processor.
1402 The default is to count operations generated by this processor.
1403 .It Li p6-bus-tran-burst Op Li ,umask= Ns Ar qualifier
1404 Count the number of completed burst transactions.
1405 An additional qualifier may be specified and comprises one of the following
1408 .Bl -tag -width indent -compact
1410 Count transactions generated by any agent on the bus.
1412 Count transactions generated by this processor.
1415 The default is to count operations generated by this processor.
1416 .It Li p6-bus-tran-def Op Li ,umask= Ns Ar qualifier
1417 Count the number of completed deferred transactions.
1418 An additional qualifier may be specified and comprises one of the following
1421 .Bl -tag -width indent -compact
1423 Count transactions generated by any agent on the bus.
1425 Count transactions generated by this processor.
1428 The default is to count operations generated by this processor.
1429 .It Li p6-bus-tran-ifetch Op Li ,umask= Ns Ar qualifier
1430 Count the number of completed instruction fetch transactions.
1431 An additional qualifier may be specified and comprises one of the following
1434 .Bl -tag -width indent -compact
1436 Count transactions generated by any agent on the bus.
1438 Count transactions generated by this processor.
1441 The default is to count operations generated by this processor.
1442 .It Li p6-bus-tran-inval Op Li ,umask= Ns Ar qualifier
1443 Count the number of completed invalidate transactions.
1444 An additional qualifier may be specified and comprises one of the following
1447 .Bl -tag -width indent -compact
1449 Count transactions generated by any agent on the bus.
1451 Count transactions generated by this processor.
1454 The default is to count operations generated by this processor.
1455 .It Li p6-bus-tran-mem Op Li ,umask= Ns Ar qualifier
1456 Count the number of completed memory transactions.
1457 An additional qualifier may be specified and comprises one of the following
1460 .Bl -tag -width indent -compact
1462 Count transactions generated by any agent on the bus.
1464 Count transactions generated by this processor.
1467 The default is to count operations generated by this processor.
1468 .It Li p6-bus-tran-pwr Op Li ,umask= Ns Ar qualifier
1469 Count the number of completed partial write transactions.
1470 An additional qualifier may be specified and comprises one of the following
1473 .Bl -tag -width indent -compact
1475 Count transactions generated by any agent on the bus.
1477 Count transactions generated by this processor.
1480 The default is to count operations generated by this processor.
1481 .It Li p6-bus-tran-rfo Op Li ,umask= Ns Ar qualifier
1482 Count the number of completed read-for-ownership transactions.
1483 An additional qualifier may be specified and comprises one of the following
1486 .Bl -tag -width indent -compact
1488 Count transactions generated by any agent on the bus.
1490 Count transactions generated by this processor.
1493 The default is to count operations generated by this processor.
1494 .It Li p6-bus-trans-io Op Li ,umask= Ns Ar qualifier
1495 Count the number of completed I/O transactions.
1496 An additional qualifier may be specified and comprises one of the following
1499 .Bl -tag -width indent -compact
1501 Count transactions generated by any agent on the bus.
1503 Count transactions generated by this processor.
1506 The default is to count operations generated by this processor.
1507 .It Li p6-bus-trans-p Op Li ,umask= Ns Ar qualifier
1508 Count the number of completed partial transactions.
1509 An additional qualifier may be specified and comprises one of the following
1512 .Bl -tag -width indent -compact
1514 Count transactions generated by any agent on the bus.
1516 Count transactions generated by this processor.
1519 The default is to count operations generated by this processor.
1520 .It Li p6-bus-trans-wb Op Li ,umask= Ns Ar qualifier
1521 Count the number of completed write-back transactions.
1522 An additional qualifier may be specified and comprises one of the following
1525 .Bl -tag -width indent -compact
1527 Count transactions generated by any agent on the bus.
1529 Count transactions generated by this processor.
1532 The default is to count operations generated by this processor.
1533 .It Li p6-cpu-clk-unhalted
1534 Count the number of cycles during with the processor was not halted.
1537 Count the number of cycles during with the processor was not halted
1538 and not in a thermal trip.
1539 .It Li p6-cycles-div-busy
1540 Count the number of cycles during which the divider is busy and cannot
1542 This event is only allocated on counter 0.
1543 .It Li p6-cycles-in-pending-and-masked
1544 Count the number of processor cycles for which interrupts were
1545 disabled and interrupts were pending.
1546 .It Li p6-cycles-int-masked
1547 Count the number of processor cycles for which interrupts were
1549 .It Li p6-data-mem-refs
1550 Count all loads and all stores using any memory type, including
1552 Each part of a split store is counted separately.
1553 .It Li p6-dcu-lines-in
1554 Count the total lines allocated in the data cache unit.
1555 .It Li p6-dcu-m-lines-in
1556 Count the number of M state lines allocated in the data cache unit.
1557 .It Li p6-dcu-m-lines-out
1558 Count the number of M state lines evicted from the data cache unit.
1559 .It Li p6-dcu-miss-outstanding
1560 Count the weighted number of cycles while a data cache unit miss is
1561 outstanding, incremented by the number of outstanding cache misses at
1564 Count the number of integer and floating-point divides including
1565 speculative divides.
1566 This event is only allocated on counter 1.
1567 .It Li p6-emon-esp-uops
1569 Count the total number of micro-ops.
1570 .It Li p6-emon-est-trans Op Li ,umask= Ns Ar qualifier
1573 .Tn "Enhanced Intel SpeedStep"
1575 An additional qualifier may be specified, and can be one of the
1578 .Bl -tag -width indent -compact
1580 Count all transitions.
1582 Count only frequency transitions.
1585 The default is to count all transitions.
1586 .It Li p6-emon-fused-uops-ret Op Li ,umask= Ns Ar qualifier
1588 Count the number of retired fused micro-ops.
1589 An additional qualifier may be specified, and may be one of the
1592 .Bl -tag -width indent -compact
1594 Count all fused micro-ops.
1596 Count only load and op micro-ops.
1598 Count only STD/STA micro-ops.
1601 The default is to count all fused micro-ops.
1602 .It Li p6-emon-kni-comp-inst-ret
1603 .Pq Tn "Pentium III"
1604 Count the number of SSE computational instructions retired.
1605 An additional qualifier may be specified, and comprises one of the
1608 .Bl -tag -width indent -compact
1609 .It Li packed-and-scalar
1610 Count packed and scalar operations.
1612 Count scalar operations only.
1615 The default is to count packed and scalar operations.
1616 .It Li p6-emon-kni-inst-retired Op Li ,umask= Ns Ar qualifier
1617 .Pq Tn "Pentium III"
1618 Count the number of SSE instructions retired.
1619 An additional qualifier may be specified, and comprises one of the
1622 .Bl -tag -width indent -compact
1623 .It Li packed-and-scalar
1624 Count packed and scalar operations.
1626 Count scalar operations only.
1629 The default is to count packed and scalar operations.
1630 .It Li p6-emon-kni-pref-dispatched Op Li ,umask= Ns Ar qualifier
1631 .Pq Tn "Pentium III"
1632 Count the number of SSE prefetch or weakly ordered instructions
1633 dispatched (including speculative prefetches).
1634 An additional qualifier may be specified, and comprises one of the
1637 .Bl -tag -width indent -compact
1639 Count non-temporal prefetches.
1641 Count prefetches to L1.
1643 Count prefetches to L2.
1645 Count weakly ordered stores.
1648 The default is to count non-temporal prefetches.
1649 .It Li p6-emon-kni-pref-miss Op Li ,umask= Ns Ar qualifier
1650 .Pq Tn "Pentium III"
1651 Count the number of prefetch or weakly ordered instructions that miss
1653 An additional qualifier may be specified, and comprises one of the
1656 .Bl -tag -width indent -compact
1658 Count non-temporal prefetches.
1660 Count prefetches to L1.
1662 Count prefetches to L2.
1664 Count weakly ordered stores.
1667 The default is to count non-temporal prefetches.
1668 .It Li p6-emon-pref-rqsts-dn
1670 Count the number of downward prefetches issued.
1671 .It Li p6-emon-pref-rqsts-up
1673 Count the number of upward prefetches issued.
1674 .It Li p6-emon-simd-instr-retired
1676 Count the number of retired
1679 .It Li p6-emon-sse-sse2-comp-inst-retired Op Li ,umask= Ns Ar qualifier
1681 Count the number of computational SSE instructions retired.
1682 An additional qualifier may be specified and can be one of the
1685 .Bl -tag -width indent -compact
1686 .It Li sse-packed-single
1687 Count SSE packed-single instructions.
1688 .It Li sse-scalar-single
1689 Count SSE scalar-single instructions.
1690 .It Li sse2-packed-double
1691 Count SSE2 packed-double instructions.
1692 .It Li sse2-scalar-double
1693 Count SSE2 scalar-double instructions.
1696 The default is to count SSE packed-single instructions.
1697 .It Li p6-emon-sse-sse2-inst-retired Op Li ,umask= Ns Ar qualifer
1700 Count the number of SSE instructions retired.
1701 An additional qualifier can be specified, and can be one of the
1704 .Bl -tag -width indent -compact
1705 .It Li sse-packed-single
1706 Count SSE packed-single instructions.
1707 .It Li sse-packed-single-scalar-single
1708 Count SSE packed-single and scalar-single instructions.
1709 .It Li sse2-packed-double
1710 Count SSE2 packed-double instructions.
1711 .It Li sse2-scalar-double
1712 Count SSE2 scalar-double instructions.
1715 The default is to count SSE packed-single instructions.
1716 .It Li p6-emon-synch-uops
1718 Count the number of sync micro-ops.
1719 .It Li p6-emon-thermal-trip
1721 Count the duration or occurrences of thermal trips.
1724 qualifier to count occurrences of thermal trips.
1725 .It Li p6-emon-unfusion
1727 Count the number of unfusion events in the reorder buffer.
1729 Count the number of computational floating point operations retired.
1730 This event is only allocated on counter 0.
1732 Count the number of floating point exceptions handled by microcode.
1733 This event is only allocated on counter 1.
1734 .It Li p6-fp-comps-ops-exe
1735 Count the number of computation floating point operations executed.
1736 This event is only allocated on counter 0.
1737 .It Li p6-fp-mmx-trans Op Li ,umask= Ns Ar qualifier
1738 .Pq Tn "Pentium II" , Tn "Pentium III"
1739 Count the number of transitions between MMX and floating-point
1741 An additional qualifier may be specified, and comprises one of the
1744 .Bl -tag -width indent -compact
1746 Count transitions from MMX instructions to floating-point instructions.
1748 Count transitions from floating-point instructions to MMX instructions.
1751 The default is to count MMX to floating-point transitions.
1753 Count the number of hardware interrupts received.
1755 Count the number of instruction fetches, both cacheable and non-cacheable.
1756 .It Li p6-ifu-fetch-miss
1757 Count the number of instruction fetch misses (i.e., those that produce
1759 .It Li p6-ifu-mem-stall
1760 Count the number of cycles instruction fetch is stalled for any reason.
1762 Count the number of cycles the instruction length decoder is stalled.
1763 .It Li p6-inst-decoded
1764 Count the number of instructions decoded.
1765 .It Li p6-inst-retired
1766 Count the number of instructions retired.
1768 Count the number of instruction TLB misses.
1770 Count the number of L2 address strobes.
1771 .It Li p6-l2-dbus-busy
1772 Count the number of cycles during which the L2 cache data bus was busy.
1773 .It Li p6-l2-dbus-busy-rd
1774 Count the number of cycles during which the L2 cache data bus was busy
1775 transferring read data from L2 to the processor.
1776 .It Li p6-l2-ifetch Op Li ,umask= Ns Ar qualifier
1777 Count the number of L2 instruction fetches.
1778 An additional qualifier may be specified and comprises a list of the following
1779 keywords separated by
1783 .Bl -tag -width indent -compact
1785 Count operations affecting E (exclusive) state lines.
1787 Count operations affecting I (invalid) state lines.
1789 Count operations affecting M (modified) state lines.
1791 Count operations affecting S (shared) state lines.
1794 The default is to count operations affecting all (MESI) state lines.
1795 .It Li p6-l2-ld Op Li ,umask= Ns Ar qualifier
1796 Count the number of L2 data loads.
1797 An additional qualifier may be specified and comprises a list of the following
1798 keywords separated by
1802 .Bl -tag -width indent -compact
1805 Count both hardware-prefetched lines and non-hardware-prefetched lines.
1807 Count operations affecting E (exclusive) state lines.
1810 Count hardware-prefetched lines only.
1812 Count operations affecting I (invalid) state lines.
1814 Count operations affecting M (modified) state lines.
1817 Exclude hardware-prefetched lines.
1819 Count operations affecting S (shared) state lines.
1822 The default on processors other than
1824 processors is to count operations affecting all (MESI) state lines.
1827 processors is to count both hardware-prefetched and
1828 non-hardware-prefetch operations on all (MESI) state lines.
1830 This event is affected by processor errata E53.
1831 .It Li p6-l2-lines-in Op Li ,umask= Ns Ar qualifier
1832 Count the number of L2 lines allocated.
1833 An additional qualifier may be specified and comprises a list of the following
1834 keywords separated by
1838 .Bl -tag -width indent -compact
1841 Count both hardware-prefetched lines and non-hardware-prefetched lines.
1843 Count operations affecting E (exclusive) state lines.
1846 Count hardware-prefetched lines only.
1848 Count operations affecting I (invalid) state lines.
1850 Count operations affecting M (modified) state lines.
1853 Exclude hardware-prefetched lines.
1855 Count operations affecting S (shared) state lines.
1858 The default on processors other than
1860 processors is to count operations affecting all (MESI) state lines.
1863 processors is to count both hardware-prefetched and
1864 non-hardware-prefetch operations on all (MESI) state lines.
1866 This event is affected by processor errata E45.
1867 .It Li p6-l2-lines-out Op Li ,umask= Ns Ar qualifier
1868 Count the number of L2 lines evicted.
1869 An additional qualifier may be specified and comprises a list of the following
1870 keywords separated by
1874 .Bl -tag -width indent -compact
1877 Count both hardware-prefetched lines and non-hardware-prefetched lines.
1879 Count operations affecting E (exclusive) state lines.
1882 Count hardware-prefetched lines only.
1884 Count operations affecting I (invalid) state lines.
1886 Count operations affecting M (modified) state lines.
1888 .Pq Tn "Pentium M" only
1889 Exclude hardware-prefetched lines.
1891 Count operations affecting S (shared) state lines.
1894 The default on processors other than
1896 processors is to count operations affecting all (MESI) state lines.
1899 processors is to count both hardware-prefetched and
1900 non-hardware-prefetch operations on all (MESI) state lines.
1902 This event is affected by processor errata E45.
1903 .It Li p6-l2-m-lines-inm
1904 Count the number of modified lines allocated in L2 cache.
1905 .It Li p6-l2-m-lines-outm Op Li ,umask= Ns Ar qualifier
1906 Count the number of L2 M-state lines evicted.
1909 On these processors an additional qualifier may be specified and
1910 comprises a list of the following keywords separated by
1914 .Bl -tag -width indent -compact
1916 Count both hardware-prefetched lines and non-hardware-prefetched lines.
1918 Count hardware-prefetched lines only.
1920 Exclude hardware-prefetched lines.
1923 The default is to count both hardware-prefetched and
1924 non-hardware-prefetch operations.
1926 This event is affected by processor errata E53.
1927 .It Li p6-l2-rqsts Op Li ,umask= Ns Ar qualifier
1928 Count the total number of L2 requests.
1929 An additional qualifier may be specified and comprises a list of the following
1930 keywords separated by
1934 .Bl -tag -width indent -compact
1936 Count operations affecting E (exclusive) state lines.
1938 Count operations affecting I (invalid) state lines.
1940 Count operations affecting M (modified) state lines.
1942 Count operations affecting S (shared) state lines.
1945 The default is to count operations affecting all (MESI) state lines.
1947 Count the number of L2 data stores.
1948 An additional qualifier may be specified and comprises a list of the following
1949 keywords separated by
1953 .Bl -tag -width indent -compact
1955 Count operations affecting E (exclusive) state lines.
1957 Count operations affecting I (invalid) state lines.
1959 Count operations affecting M (modified) state lines.
1961 Count operations affecting S (shared) state lines.
1964 The default is to count operations affecting all (MESI) state lines.
1966 Count the number of load operations delayed due to store buffer blocks.
1967 .It Li p6-misalign-mem-ref
1968 Count the number of misaligned data memory references (crossing a 64
1970 .It Li p6-mmx-assist
1971 .Pq Tn "Pentium II" , Tn "Pentium III"
1972 Count the number of MMX assists executed.
1973 .It Li p6-mmx-instr-exec
1974 .Pq Tn Celeron , Tn "Pentium II"
1975 Count the number of MMX instructions executed, except MOVQ and MOVD
1976 stores from register to memory.
1977 .It Li p6-mmx-instr-ret
1979 Count the number of MMX instructions retired.
1980 .It Li p6-mmx-instr-type-exec Op Li ,umask= Ns Ar qualifier
1981 .Pq Tn "Pentium II" , Tn "Pentium III"
1982 Count the number of MMX instructions executed.
1983 An additional qualifier may be specified and comprises a list of
1984 the following keywords separated by
1988 .Bl -tag -width indent -compact
1990 Count MMX pack operation instructions.
1991 .It Li packed-arithmetic
1992 Count MMX packed arithmetic instructions.
1993 .It Li packed-logical
1994 Count MMX packed logical instructions.
1995 .It Li packed-multiply
1996 Count MMX packed multiply instructions.
1998 Count MMX packed shift instructions.
2000 Count MMX unpack operation instructions.
2003 The default is to count all operations.
2004 .It Li p6-mmx-sat-instr-exec
2005 .Pq Tn "Pentium II" , Tn "Pentium III"
2006 Count the number of MMX saturating instructions executed.
2007 .It Li p6-mmx-uops-exec
2008 .Pq Tn "Pentium II" , Tn "Pentium III"
2009 Count the number of MMX micro-ops executed.
2011 Count the number of integer and floating-point multiplies, including
2012 speculative multiplies.
2013 This event is only allocated on counter 1.
2014 .It Li p6-partial-rat-stalls
2015 Count the number of cycles or events for partial stalls.
2016 .It Li p6-resource-stalls
2017 Count the number of cycles there was a resource related stall of any kind.
2018 .It Li p6-ret-seg-renames
2019 .Pq Tn "Pentium II" , Tn "Pentium III"
2020 Count the number of segment register rename events retired.
2022 Count the number of cycles the store buffer is draining.
2023 .It Li p6-seg-reg-renames Op Li ,umask= Ns Ar qualifier
2024 .Pq Tn "Pentium II" , Tn "Pentium III"
2025 Count the number of segment register renames.
2026 An additional qualifier may be specified, and comprises a list of the
2027 following keywords separated by
2031 .Bl -tag -width indent -compact
2033 Count renames for segment register DS.
2035 Count renames for segment register ES.
2037 Count renames for segment register FS.
2039 Count renames for segment register GS.
2042 The default is to count operations affecting all segment registers.
2043 .It Li p6-seg-rename-stalls
2044 .Pq Tn "Pentium II" , Tn "Pentium III"
2045 Count the number of segment register renaming stalls.
2046 An additional qualifier may be specified, and comprises a list of the
2047 following keywords separated by
2051 .Bl -tag -width indent -compact
2053 Count stalls for segment register DS.
2055 Count stalls for segment register ES.
2057 Count stalls for segment register FS.
2059 Count stalls for segment register GS.
2062 The default is to count operations affecting all the segment registers.
2063 .It Li p6-segment-reg-loads
2064 Count the number of segment register loads.
2065 .It Li p6-uops-retired
2066 Count the number of micro-ops retired.
2069 Intel P4 PMCs are present in Intel
2074 These PMCs are documented in
2076 .%B "IA-32 Intel(R) Architecture Software Developer's Manual"
2077 .%T "Volume 3: System Programming Guide"
2078 .%N "Order Number 245472-012"
2080 .%Q "Intel Corporation"
2082 Further information about using these PMCs may be found in
2084 .%B "IA-32 Intel(R) Architecture Optimization Guide"
2086 .%N "Order Number 248966-009"
2087 .%Q "Intel Corporation"
2089 Some of these events are affected by processor errata described in
2091 .%B "Intel(R) Pentium(R) 4 Processor Specification Update"
2092 .%N "Document Number: 249199-059"
2094 .%Q "Intel Corporation"
2097 Event specifiers for Intel P4 PMCs can have the following common
2099 .Bl -tag -width indent
2100 .It Li active= Ns Ar choice
2101 (On P4 HTT CPUs) Filter event counting based on which logical
2102 processors are active.
2103 The allowed values of
2107 .Bl -tag -width indent -compact
2109 Count when either logical processor is active.
2111 Count when both logical processors are active.
2113 Count only when neither logical processor is active.
2115 Count only when one logical processor is active.
2121 Configure the PMC to cascade onto its partner.
2123 .Sx "Cascading P4 PMCs"
2124 below for more information.
2126 Configure the counter to count false to true transitions of the threshold
2128 This qualifier only takes effect if a threshold qualifier has also been
2131 Configure the counter to increment only when the event count seen is
2132 less than the threshold qualifier value specified.
2133 .It Li mask= Ns Ar qualifier
2134 Many event specifiers for Intel P4 PMCs need to be additionally
2135 qualified using a mask qualifier.
2136 The allowed syntax for these qualifiers is event specific and is
2137 described along with the events.
2139 Configure the PMC to count when the CPL of the processor is 0.
2141 Select precise event based sampling.
2142 Precise sampling is supported by the hardware for a limited set of
2144 .It Li tag= Ns Ar value
2145 Configure the PMC to tag the internal uop selected by the other
2146 fields in this event specifier with value
2148 This feature is used when cascading PMCs.
2149 .It Li threshold= Ns Ar value
2150 Configure the PMC to increment only when the event counts seen are
2151 greater than the specified threshold value
2154 Configure the PMC to count when the CPL of the processor is 1, 2 or 3.
2161 qualifiers are specified, the default is to enable both.
2163 On Intel Pentium 4 processors with HTT, events are
2164 divided into two classes:
2166 .Bl -tag -width indent -compact
2168 are those where hardware can differentiate between events
2169 generated on one logical processor from those generated on the
2172 are those where hardware cannot differentiate between events
2173 generated by multiple logical processors in a package.
2176 Only TS events are allowed for use with process-mode PMCs on
2179 The event specifiers supported by Intel P4 PMCs are:
2181 .Bl -tag -width indent
2182 .It Li p4-128bit-mmx-uop Op Li ,mask= Ns Ar flags
2184 Count integer SIMD SSE2 instructions that operate on 128 bit SIMD
2188 can take the following value (which is also the default):
2190 .Bl -tag -width indent -compact
2192 Count all uops operating on 128 bit SIMD integer operands in memory or
2196 If an instruction contains more than one 128 bit MMX uop, then each
2197 uop will be counted.
2198 .It Li p4-64bit-mmx-uop Op Li ,mask= Ns Ar flags
2200 Count MMX instructions that operate on 64 bit SIMD operands.
2203 can take the following value (which is also the default):
2205 .Bl -tag -width indent -compact
2207 Count all uops operating on 64 bit SIMD integer operands in memory or
2211 If an instruction contains more than one 64 bit MMX uop, then each
2212 uop will be counted.
2213 .It Li p4-b2b-cycles
2215 Count back-to-back bys cycles.
2216 Further documentation for this event is unavailable.
2219 Count bus-not-ready conditions.
2220 Further documentation for this event is unavailable.
2221 .It Li p4-bpu-fetch-request Op Li ,mask= Ns Ar qualifier
2223 Count instruction fetch requests qualified by additional
2226 At this point only one flag is supported:
2228 .Bl -tag -width indent -compact
2230 Count trace cache lookup misses.
2233 The default qualifier is also
2234 .Dq Li mask=tcmiss .
2235 .It Li p4-branch-retired Op Li ,mask= Ns Ar flags
2237 Counts retired branches.
2240 is a list of the following
2244 .Bl -tag -width indent -compact
2246 Count branches not-taken and predicted.
2248 Count branches not-taken and mis-predicted.
2250 Count branches taken and predicted.
2252 Count branches taken and mis-predicted.
2255 The default qualifier counts all four kinds of branches.
2256 .It Li p4-bsq-active-entries Op Li ,mask= Ns Ar qualifier
2258 Count the number of entries (clipped at 15) currently active in the
2264 separated set of the following flags:
2266 .Bl -tag -width indent -compact
2267 .It Li req-type0 , Li req-type1
2268 Forms a 2-bit number used to select the request type encoding:
2270 .Bl -tag -width indent -compact
2272 reads excluding read invalidate
2276 writes other than writebacks
2283 is the MSB for this two bit number.
2284 .It Li req-len0 , Li req-len1
2285 Forms a two-bit number that specifies the request length encoding:
2287 .Bl -tag -width indent -compact
2298 is the MSB for this two bit number.
2300 Count requests that are input or output requests.
2301 .It Li req-lock-type
2302 Count requests that lock the bus.
2303 .It Li req-lock-cache
2304 Count requests that lock the cache.
2305 .It Li req-split-type
2306 Count requests that is a bus 8-byte chunk that is split across an
2309 Count requests that are demand (not prefetches) if set.
2310 Count requests that are prefetches if not set.
2312 Count requests that are ordered.
2313 .It Li mem-type0 , Li mem-type1 , Li mem-type2
2314 Forms a 3-bit number that specifies a memory type encoding:
2316 .Bl -tag -width indent -compact
2331 is the MSB of this 3-bit number.
2334 The default qualifier has all the above bits set.
2336 Edge triggering using the
2338 qualifier should not be used with this event when counting cycles.
2339 .It Li p4-bsq-allocation Op Li ,mask= Ns Ar qualifier
2341 Count allocations in the bus sequence unit according to the flags
2346 separated set of the following flags:
2348 .Bl -tag -width indent -compact
2349 .It Li req-type0 , Li req-type1
2350 Forms a 2-bit number used to select the request type encoding:
2352 .Bl -tag -width indent -compact
2354 reads excluding read invalidate
2358 writes other than writebacks
2365 is the MSB for this two bit number.
2366 .It Li req-len0 , Li req-len1
2367 Forms a two-bit number that specifies the request length encoding:
2369 .Bl -tag -width indent -compact
2380 is the MSB for this two bit number.
2382 Count requests that are input or output requests.
2383 .It Li req-lock-type
2384 Count requests that lock the bus.
2385 .It Li req-lock-cache
2386 Count requests that lock the cache.
2387 .It Li req-split-type
2388 Count requests that is a bus 8-byte chunk that is split across an
2391 Count requests that are demand (not prefetches) if set.
2392 Count requests that are prefetches if not set.
2394 Count requests that are ordered.
2395 .It Li mem-type0 , Li mem-type1 , Li mem-type2
2396 Forms a 3-bit number that specifies a memory type encoding:
2398 .Bl -tag -width indent -compact
2413 is the MSB of this 3-bit number.
2416 The default qualifier has all the above bits set.
2418 This event is usually used along with the
2420 qualifier to avoid multiple counting.
2421 .It Li p4-bsq-cache-reference Op Li ,mask= Ns Ar qualifier
2423 Count cache references as seen by the bus unit (2nd or 3rd level
2429 separated list of the following keywords:
2431 .Bl -tag -width indent -compact
2433 Count 2nd level cache hits in the shared state.
2435 Count 2nd level cache hits in the exclusive state.
2437 Count 2nd level cache hits in the modified state.
2439 Count 3rd level cache hits in the shared state.
2441 Count 3rd level cache hits in the exclusive state.
2443 Count 3rd level cache hits in the modified state.
2445 Count 2nd level cache misses.
2447 Count 3rd level cache misses.
2449 Count write-back lookups from the data access cache that miss the 2nd
2453 The default is to count all the above events.
2454 .It Li p4-execution-event Op Li ,mask= Ns Ar flags
2456 Count the retirement of tagged uops selected through the execution
2460 can contain the following strings separated by
2464 .Bl -tag -width indent -compact
2465 .It Li nbogus0 , Li nbogus1 , Li nbogus2 , Li nbogus3
2466 The marked uops are not bogus.
2467 .It Li bogus0 , Li bogus1 , Li bogus2 , Li bogus3
2468 The marked uops are bogus.
2471 This event requires additional (upstream) events to be allocated to
2472 perform the desired uop tagging.
2473 The default is to set all the above flags.
2474 This event can be used for precise event based sampling.
2475 .It Li p4-front-end-event Op Li ,mask= Ns Ar flags
2477 Count the retirement of tagged uops selected through the front-end
2481 can contain the following strings separated by
2485 .Bl -tag -width indent -compact
2487 The marked uops are not bogus.
2489 The marked uops are bogus.
2492 This event requires additional (upstream) events to be allocated to
2493 perform the desired uop tagging.
2494 The default is to select both kinds of events.
2495 This event can be used for precise event based sampling.
2496 .It Li p4-fsb-data-activity Op Li ,mask= Ns Ar flags
2498 Count each DBSY or DRDY event selected by qualifier
2504 separated set of the following flags:
2506 .Bl -tag -width indent -compact
2508 Count when this processor is driving data onto the bus.
2510 Count when this processor is reading data from the bus.
2512 Count when data is on the bus but not being sampled by this processor.
2514 Count when this processor reserves the bus for use in the next cycle
2515 in order to drive data.
2517 Count when some agent reserves the bus for use in the next bus cycle
2518 to drive data that this processor will sample.
2520 Count when some agent reserves the bus for use in the next bus cycle
2521 to drive data that this processor will not sample.
2528 are mutually exclusive.
2533 are mutually exclusive.
2534 The default value for
2537 .Dq Li drdy-drv+drdy-own+dbsy-drv+dbsy-own .
2538 .It Li p4-global-power-events Op Li ,mask= Ns Ar flags
2540 Count cycles during which the processor is not stopped.
2543 can take the following value (which is also the default):
2545 .Bl -tag -width indent -compact
2547 Count cycles when the processor is active.
2550 .It Li p4-instr-retired Op Li ,mask= Ns Ar flags
2552 Count instructions retired during a clock cycle.
2555 comprises of the following strings separated by
2559 .Bl -tag -width indent -compact
2561 Count non-bogus instructions that are not tagged.
2563 Count non-bogus instructions that are tagged.
2565 Count bogus instructions that are not tagged.
2567 Count bogus instructions that are tagged.
2570 The default qualifier counts all the above kinds of instructions.
2571 .It Li p4-ioq-active-entries Xo
2572 .Op Li ,mask= Ns Ar qualifier
2573 .Op Li ,busreqtype= Ns Ar req-type
2576 Count the number of entries (clipped at 15) in the IOQ that are
2578 The event masks are specified by qualifier
2587 separated set of the following flags:
2589 .Bl -tag -width indent -compact
2593 Count write entries.
2595 Count entries accessing uncacheable memory.
2597 Count entries accessing write-combining memory.
2599 Count entries accessing write-through memory.
2601 Count entries accessing write-protected memory
2603 Count entries accessing write-back memory.
2605 Count store requests driven by the processor (i.e., not by other
2606 processors or by DMA).
2608 Count store requests driven by other processors or by DMA.
2610 Include hardware and software prefetch requests in the count.
2613 The default value for
2615 is to enable all the above flags.
2619 qualifier is a 5-bit number can be additionally used to select a
2620 specific bus request type.
2625 qualifier should not be used when counting cycles with this event.
2626 The exact behaviour of this event depends on the processor revision.
2627 .It Li p4-ioq-allocation Xo
2628 .Op Li ,mask= Ns Ar qualifier
2629 .Op Li ,busreqtype= Ns Ar req-type
2632 Count various types of transactions on the bus matching the flags set
2642 separated set of the following flags:
2644 .Bl -tag -width indent -compact
2648 Count write entries.
2650 Count entries accessing uncacheable memory.
2652 Count entries accessing write-combining memory.
2654 Count entries accessing write-through memory.
2656 Count entries accessing write-protected memory
2658 Count entries accessing write-back memory.
2660 Count store requests driven by the processor (i.e., not by other
2661 processors or by DMA).
2663 Count store requests driven by other processors or by DMA.
2665 Include hardware and software prefetch requests in the count.
2668 The default value for
2670 is to enable all the above flags.
2674 qualifier is a 5-bit number can be additionally used to select a
2675 specific bus request type.
2680 qualifier is normally used with this event to prevent multiple
2682 The exact behaviour of this event depends on the processor revision.
2683 .It Li p4-itlb-reference Op mask= Ns Ar qualifier
2685 Count translations using the intruction translation look-aside
2689 argument is a list of the following strings separated by
2693 .Bl -tag -width indent -compact
2699 Count uncacheable ITLB hits.
2704 is specified the default is to count all the three kinds of ITLB
2706 .It Li p4-load-port-replay Op Li ,mask= Ns Ar qualifier
2708 Count replayed events at the load port.
2711 can take on one value:
2713 .Bl -tag -width indent -compact
2718 The default value for
2722 .It Li p4-mispred-branch-retired Op Li ,mask= Ns Ar flags
2724 Count mispredicted IA-32 branch instructions.
2727 can take the following value (which is also the default):
2729 .Bl -tag -width indent -compact
2731 Count non-bogus retired branch instructions.
2733 .It Li p4-machine-clear Op Li ,mask= Ns Ar flags
2735 Count the number of pipeline clears seen by the processor.
2738 is a list of the following strings separated by
2742 .Bl -tag -width indent -compact
2744 Count for a portion of the many cycles when the machine is being
2745 cleared for any reason.
2747 Count machine clears due to memory ordering issues.
2749 Count machine clears due to self-modifying code.
2754 to get a count of occurrences of machine clears.
2755 The default qualifier is
2757 .It Li p4-memory-cancel Op Li ,mask= Ns Ar event-list
2759 Count the cancelling of various kinds of requests in the data cache
2760 address control unit of the CPU.
2763 is a list of the following strings separated by
2767 .Bl -tag -width indent -compact
2769 Requests cancelled because no store request buffer was available.
2771 Requests that conflict due to 64K aliasing.
2776 is not specified, then the default is to count both kinds of events.
2777 .It Li p4-memory-complete Op Li ,mask= Ns Ar event-list
2779 Count the completion of load split, store split, uncacheable split and
2780 uncacheable load operations selected by qualifier
2786 separated list of the following flags:
2788 .Bl -tag -width indent -compact
2790 Count load splits completed, excluding loads from uncacheable or
2791 write-combining areas.
2793 Count any split stores completed.
2796 The default is to count both kinds of operations.
2797 .It Li p4-mob-load-replay Op Li ,mask= Ns Ar qualifier
2799 Count load replays triggered by the memory order buffer.
2804 separated list of the following flags:
2806 .Bl -tag -width indent -compact
2808 Count replays because of unknown store addresses.
2810 Count replays because of unknown store data.
2812 Count replays because of partially overlapped data accesses between
2813 load and store operations.
2815 Count replays because of mismatches in the lower 4 bits of load and
2819 The default qualifier is
2820 .Ar no-sta+no-std+partial-data+unalgn-addr .
2821 .It Li p4-packed-dp-uop Op Li ,mask= Ns Ar flags
2823 Count packed double-precision uops.
2826 can take the following value (which is also the default):
2828 .Bl -tag -width indent -compact
2830 Count all uops operating on packed double-precision operands.
2832 .It Li p4-packed-sp-uop Op Li ,mask= Ns Ar flags
2834 Count packed single-precision uops.
2837 can take the following value (which is also the default):
2839 .Bl -tag -width indent -compact
2841 Count all uops operating on packed single-precision operands.
2843 .It Li p4-page-walk-type Op Li ,mask= Ns Ar qualifier
2845 Count page walks performed by the page miss handler.
2850 separated list of the following keywords:
2852 .Bl -tag -width indent -compact
2854 Count page walks for data TLB misses.
2856 Count page walks for instruction TLB misses.
2859 The default value for
2862 .Dq Li dtmiss+itmiss .
2863 .It Li p4-replay-event Op Li ,mask= Ns Ar flags
2865 Count the retirement of tagged uops selected through the replay
2871 separated set of the following strings:
2873 .Bl -tag -width indent -compact
2875 The marked uops are not bogus.
2877 The marked uops are bogus.
2880 This event requires additional (upstream) events to be allocated to
2881 perform the desired uop tagging.
2882 The default qualifier counts both kinds of uops.
2883 This event can be used for precise event based sampling.
2884 .It Li p4-resource-stall Op Li ,mask= Ns Ar flags
2886 Count the occurrence or latency of stalls in the allocator.
2889 can take the following value (which is also the default):
2891 .Bl -tag -width indent -compact
2893 A stall due to the lack of store buffers.
2897 Count different types of responses.
2898 Further documentation on this event is not available.
2899 .It Li p4-retired-branch-type Op Li ,mask= Ns Ar flags
2901 Count branches retired.
2906 separated list of strings:
2908 .Bl -tag -width indent -compact
2910 Count conditional jumps.
2912 Count direct and indirect call branches.
2914 Count return branches.
2916 Count returns, indirect calls or indirect jumps.
2919 The default qualifier counts all the above branch types.
2920 .It Li p4-retired-mispred-branch-type Op Li ,mask= Ns Ar flags
2922 Count mispredicted branches retired.
2927 separated list of strings:
2929 .Bl -tag -width indent -compact
2931 Count conditional jumps.
2933 Count indirect call branches.
2935 Count return branches.
2937 Count returns, indirect calls or indirect jumps.
2940 The default qualifier counts all the above branch types.
2941 .It Li p4-scalar-dp-uop Op Li ,mask= Ns Ar flags
2943 Count the number of scalar double-precision uops.
2946 can take the following value (which is also the default):
2948 .Bl -tag -width indent -compact
2950 Count the number of scalar double-precision uops.
2952 .It Li p4-scalar-sp-uop Op Li ,mask= Ns Ar flags
2954 Count the number of scalar single-precision uops.
2957 can take the following value (which is also the default):
2959 .Bl -tag -width indent -compact
2961 Count all uops operating on scalar single-precision operands.
2965 Count snoop traffic.
2966 Further documentation on this event is not available.
2967 .It Li p4-sse-input-assist Op Li ,mask= Ns Ar flags
2969 Count the number of times an assist is required to handle problems
2970 with the operands for SSE and SSE2 operations.
2973 can take the following value (which is also the default):
2975 .Bl -tag -width indent -compact
2977 Count assists for all SSE and SSE2 uops.
2979 .It Li p4-store-port-replay Op Li ,mask= Ns Ar qualifier
2981 Count events replayed at the store port.
2984 can take on one value:
2986 .Bl -tag -width indent -compact
2991 The default value for
2995 .It Li p4-tc-deliver-mode Op Li ,mask= Ns Ar qualifier
2997 Count the duration in cycles of operating modes of the trace cache and
2999 The desired operating mode is selected by
3001 which is a list of the following strings separated by
3005 .Bl -tag -width indent -compact
3007 Both logical processors are in deliver mode.
3009 Logical processor 0 is in deliver mode while logical processor 1 is in
3012 Logical processor 0 is in deliver mode while logical processor 1 is
3013 halted, or in machine clear, or transitioning to a long microcode
3016 Logical processor 0 is in build mode while logical processor 1 is in
3019 Both logical processors are in build mode.
3021 Logical processor 0 is in build mode while logical processor 1 is
3022 halted, or in machine clear or transitioning to a long microcode
3025 Logical processor 0 is halted, or in machine clear or transitioning to
3026 a long microcode flow while logical processor 1 is in deliver mode.
3028 Logical processor 0 is halted, or in machine clear or transitioning to
3029 a long microcode flow while logical processor 1 is in build mode.
3032 If there is only one logical processor in the processor package then
3033 the qualifier for logical processor 1 is ignored.
3034 If no qualifier is specified, the default qualifier is
3035 .Dq Li DD+DB+DI+BD+BB+BI+ID+IB .
3036 .It Li p4-tc-ms-xfer Op Li ,mask= Ns Ar flags
3038 Count the number of times uop delivery changed from the trace cache to
3042 can take the following value (which is also the default):
3044 .Bl -tag -width indent -compact
3046 Count TC to MS transfers.
3048 .It Li p4-uop-queue-writes Op Li ,mask= Ns Ar flags
3050 Count the number of valid uops written to the uop queue.
3053 is a list of the following strings, separated by
3057 .Bl -tag -width indent -compact
3058 .It Li from-tc-build
3059 Count uops being written from the trace cache in build mode.
3060 .It Li from-tc-deliver
3061 Count uops being written from the trace cache in deliver mode.
3063 Count uops being written from microcode ROM.
3066 The default qualifier counts all the above kinds of uops.
3067 .It Li p4-uop-type Op Li ,mask= Ns Ar flags
3069 This event is used in conjunction with the front-end at-retirement
3070 mechanism to tag load and store uops.
3073 comprises the following strings separated by
3077 .Bl -tag -width indent -compact
3079 Mark uops that are load operations.
3081 Mark uops that are store operations.
3084 The default qualifier counts both kinds of uops.
3085 .It Li p4-uops-retired Op Li ,mask= Ns Ar flags
3087 Count uops retired during a clock cycle.
3090 comprises the following strings separated by
3094 .Bl -tag -width indent -compact
3096 Count marked uops that are not bogus.
3098 Count marked uops that are bogus.
3101 The default qualifier counts both kinds of uops.
3102 .It Li p4-wc-buffer Op Li ,mask= Ns Ar flags
3104 Count write-combining buffer operations.
3107 contains the following strings separated by
3111 .Bl -tag -width indent -compact
3113 WC buffer evictions due to any cause.
3114 .It Li wcb-full-evict
3115 WC buffer evictions due to no WC buffer being available.
3118 The default qualifer counts both kinds of evictions.
3119 .It Li p4-x87-assist Op Li ,mask= Ns Ar flags
3121 Count the retirement of x87 instructions that required special
3125 contains the following strings separated by
3129 .Bl -tag -width indent -compact
3131 Count instructions that saw an FP stack underflow.
3133 Count instructions that saw an FP stack overflow.
3135 Count instructions that saw an x87 output overflow.
3137 Count instructions that saw an x87 output underflow.
3139 Count instructions that needed an x87 input assist.
3142 The default qualifier counts all the above types of instruction
3144 .It Li p4-x87-fp-uop Op Li ,mask= Ns Ar flags
3146 Count x87 floating-point uops.
3149 can take the following value (which is also the default):
3151 .Bl -tag -width indent -compact
3153 Count all x87 floating-point uops.
3156 If an instruction contains more than one x87 floating-point uops, then
3157 all x87 floating-point uops will be counted.
3158 This event does not count x87 floating-point data movement operations.
3159 .It Li p4-x87-simd-moves-uop Op Li ,mask= Ns Ar flags
3161 Count each x87 FPU, MMX, SSE, or SSE2 uops that load data or store
3162 data or perform register-to-register moves.
3163 This event does not count integer move uops.
3166 may contain the following keywords separated by
3170 .Bl -tag -width indent -compact
3172 Count all x87 and SIMD store and move uops.
3174 Count all x87 and SIMD load uops.
3177 The default is to count all uops.
3179 This event may be affected by processor errata N43.
3181 .Ss "Cascading P4 PMCs"
3182 PMC cascading support is currently poorly implemented.
3183 While individual event counters may be allocated with a
3185 qualifier, the current API does not offer the ability
3186 to name and allocate all the resources needed for a
3187 cascaded event counter pair in a single operation.
3188 .Ss "Precise Event Based Sampling"
3189 Support for precise event based sampling is currently
3192 The interface between the
3196 driver is intended to be private to the implementation and may
3198 In order to ease forward compatibility with future versions of the
3200 driver, applications are urged to dynamically link with the
3216 library first appeared in
3221 library was written by
3223 .Aq jkoshy@FreeBSD.org .