2 * Copyright (c) 2011 NetApp, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/sysctl.h>
34 #include <sys/ioctl.h>
36 #include <sys/_iovec.h>
37 #include <sys/cpuset.h>
39 #include <x86/segments.h>
40 #include <machine/specialreg.h>
41 #include <machine/param.h>
53 #include <machine/vmm.h>
54 #include <machine/vmm_dev.h>
58 #define MB (1024 * 1024UL)
59 #define GB (1024 * 1024 * 1024UL)
63 uint32_t lowmem_limit;
64 enum vm_mmap_style vms;
73 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x)))
74 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x)))
77 vm_device_open(const char *name)
82 len = strlen("/dev/vmm/") + strlen(name) + 1;
84 assert(vmfile != NULL);
85 snprintf(vmfile, len, "/dev/vmm/%s", name);
87 /* Open the device file */
88 fd = open(vmfile, O_RDWR, 0);
95 vm_create(const char *name)
98 return (CREATE((char *)name));
102 vm_open(const char *name)
106 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1);
111 vm->lowmem_limit = 3 * GB;
112 vm->name = (char *)(vm + 1);
113 strcpy(vm->name, name);
115 if ((vm->fd = vm_device_open(vm->name)) < 0)
125 vm_destroy(struct vmctx *vm)
137 vm_parse_memsize(const char *optarg, size_t *ret_memsize)
143 optval = strtoul(optarg, &endptr, 0);
144 if (*optarg != '\0' && *endptr == '\0') {
146 * For the sake of backward compatibility if the memory size
147 * specified on the command line is less than a megabyte then
148 * it is interpreted as being in units of MB.
152 *ret_memsize = optval;
155 error = expand_number(optarg, ret_memsize);
161 vm_get_memory_seg(struct vmctx *ctx, vm_paddr_t gpa, size_t *ret_len,
165 struct vm_memory_segment seg;
167 bzero(&seg, sizeof(seg));
169 error = ioctl(ctx->fd, VM_GET_MEMORY_SEG, &seg);
177 vm_get_lowmem_limit(struct vmctx *ctx)
180 return (ctx->lowmem_limit);
184 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit)
187 ctx->lowmem_limit = limit;
191 vm_set_memflags(struct vmctx *ctx, int flags)
194 ctx->memflags = flags;
198 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char **addr)
200 int error, mmap_flags;
201 struct vm_memory_segment seg;
204 * Create and optionally map 'len' bytes of memory at guest
205 * physical address 'gpa'
207 bzero(&seg, sizeof(seg));
210 error = ioctl(ctx->fd, VM_MAP_MEMORY, &seg);
211 if (error == 0 && addr != NULL) {
212 mmap_flags = MAP_SHARED;
213 if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
214 mmap_flags |= MAP_NOCORE;
215 *addr = mmap(NULL, len, PROT_READ | PROT_WRITE, mmap_flags,
222 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms)
227 /* XXX VM_MMAP_SPARSE not implemented yet */
228 assert(vms == VM_MMAP_NONE || vms == VM_MMAP_ALL);
232 * If 'memsize' cannot fit entirely in the 'lowmem' segment then
233 * create another 'highmem' segment above 4GB for the remainder.
235 if (memsize > ctx->lowmem_limit) {
236 ctx->lowmem = ctx->lowmem_limit;
237 ctx->highmem = memsize - ctx->lowmem;
239 ctx->lowmem = memsize;
243 if (ctx->lowmem > 0) {
244 addr = (vms == VM_MMAP_ALL) ? &ctx->lowmem_addr : NULL;
245 error = setup_memory_segment(ctx, 0, ctx->lowmem, addr);
250 if (ctx->highmem > 0) {
251 addr = (vms == VM_MMAP_ALL) ? &ctx->highmem_addr : NULL;
252 error = setup_memory_segment(ctx, 4*GB, ctx->highmem, addr);
261 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len)
264 /* XXX VM_MMAP_SPARSE not implemented yet */
265 assert(ctx->vms == VM_MMAP_ALL);
267 if (gaddr < ctx->lowmem && gaddr + len <= ctx->lowmem)
268 return ((void *)(ctx->lowmem_addr + gaddr));
272 if (gaddr < ctx->highmem && gaddr + len <= ctx->highmem)
273 return ((void *)(ctx->highmem_addr + gaddr));
280 vm_get_lowmem_size(struct vmctx *ctx)
283 return (ctx->lowmem);
287 vm_get_highmem_size(struct vmctx *ctx)
290 return (ctx->highmem);
294 vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
295 uint64_t base, uint32_t limit, uint32_t access)
298 struct vm_seg_desc vmsegdesc;
300 bzero(&vmsegdesc, sizeof(vmsegdesc));
301 vmsegdesc.cpuid = vcpu;
302 vmsegdesc.regnum = reg;
303 vmsegdesc.desc.base = base;
304 vmsegdesc.desc.limit = limit;
305 vmsegdesc.desc.access = access;
307 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc);
312 vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
313 uint64_t *base, uint32_t *limit, uint32_t *access)
316 struct vm_seg_desc vmsegdesc;
318 bzero(&vmsegdesc, sizeof(vmsegdesc));
319 vmsegdesc.cpuid = vcpu;
320 vmsegdesc.regnum = reg;
322 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc);
324 *base = vmsegdesc.desc.base;
325 *limit = vmsegdesc.desc.limit;
326 *access = vmsegdesc.desc.access;
332 vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc)
336 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit,
342 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
345 struct vm_register vmreg;
347 bzero(&vmreg, sizeof(vmreg));
352 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg);
357 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val)
360 struct vm_register vmreg;
362 bzero(&vmreg, sizeof(vmreg));
366 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg);
367 *ret_val = vmreg.regval;
372 vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit)
377 bzero(&vmrun, sizeof(vmrun));
380 error = ioctl(ctx->fd, VM_RUN, &vmrun);
381 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit));
386 vm_suspend(struct vmctx *ctx, enum vm_suspend_how how)
388 struct vm_suspend vmsuspend;
390 bzero(&vmsuspend, sizeof(vmsuspend));
392 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend));
396 vm_reinit(struct vmctx *ctx)
399 return (ioctl(ctx->fd, VM_REINIT, 0));
403 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid,
404 uint32_t errcode, int restart_instruction)
406 struct vm_exception exc;
410 exc.error_code = errcode;
411 exc.error_code_valid = errcode_valid;
412 exc.restart_instruction = restart_instruction;
414 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc));
418 vm_apicid2vcpu(struct vmctx *ctx, int apicid)
421 * The apic id associated with the 'vcpu' has the same numerical value
422 * as the 'vcpu' itself.
428 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector)
430 struct vm_lapic_irq vmirq;
432 bzero(&vmirq, sizeof(vmirq));
434 vmirq.vector = vector;
436 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq));
440 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector)
442 struct vm_lapic_irq vmirq;
444 bzero(&vmirq, sizeof(vmirq));
446 vmirq.vector = vector;
448 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq));
452 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg)
454 struct vm_lapic_msi vmmsi;
456 bzero(&vmmsi, sizeof(vmmsi));
460 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi));
464 vm_ioapic_assert_irq(struct vmctx *ctx, int irq)
466 struct vm_ioapic_irq ioapic_irq;
468 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
469 ioapic_irq.irq = irq;
471 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq));
475 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq)
477 struct vm_ioapic_irq ioapic_irq;
479 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
480 ioapic_irq.irq = irq;
482 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq));
486 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq)
488 struct vm_ioapic_irq ioapic_irq;
490 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
491 ioapic_irq.irq = irq;
493 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq));
497 vm_ioapic_pincount(struct vmctx *ctx, int *pincount)
500 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount));
504 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
506 struct vm_isa_irq isa_irq;
508 bzero(&isa_irq, sizeof(struct vm_isa_irq));
509 isa_irq.atpic_irq = atpic_irq;
510 isa_irq.ioapic_irq = ioapic_irq;
512 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq));
516 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
518 struct vm_isa_irq isa_irq;
520 bzero(&isa_irq, sizeof(struct vm_isa_irq));
521 isa_irq.atpic_irq = atpic_irq;
522 isa_irq.ioapic_irq = ioapic_irq;
524 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq));
528 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
530 struct vm_isa_irq isa_irq;
532 bzero(&isa_irq, sizeof(struct vm_isa_irq));
533 isa_irq.atpic_irq = atpic_irq;
534 isa_irq.ioapic_irq = ioapic_irq;
536 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq));
540 vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq,
541 enum vm_intr_trigger trigger)
543 struct vm_isa_irq_trigger isa_irq_trigger;
545 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger));
546 isa_irq_trigger.atpic_irq = atpic_irq;
547 isa_irq_trigger.trigger = trigger;
549 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger));
553 vm_inject_nmi(struct vmctx *ctx, int vcpu)
557 bzero(&vmnmi, sizeof(vmnmi));
560 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi));
567 { "hlt_exit", VM_CAP_HALT_EXIT },
568 { "mtrap_exit", VM_CAP_MTRAP_EXIT },
569 { "pause_exit", VM_CAP_PAUSE_EXIT },
570 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST },
571 { "enable_invpcid", VM_CAP_ENABLE_INVPCID },
576 vm_capability_name2type(const char *capname)
580 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) {
581 if (strcmp(capstrmap[i].name, capname) == 0)
582 return (capstrmap[i].type);
589 vm_capability_type2name(int type)
593 for (i = 0; capstrmap[i].name != NULL; i++) {
594 if (capstrmap[i].type == type)
595 return (capstrmap[i].name);
602 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
606 struct vm_capability vmcap;
608 bzero(&vmcap, sizeof(vmcap));
612 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap);
613 *retval = vmcap.capval;
618 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val)
620 struct vm_capability vmcap;
622 bzero(&vmcap, sizeof(vmcap));
627 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap));
631 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
633 struct vm_pptdev pptdev;
635 bzero(&pptdev, sizeof(pptdev));
640 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev));
644 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
646 struct vm_pptdev pptdev;
648 bzero(&pptdev, sizeof(pptdev));
653 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev));
657 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
658 vm_paddr_t gpa, size_t len, vm_paddr_t hpa)
660 struct vm_pptdev_mmio pptmmio;
662 bzero(&pptmmio, sizeof(pptmmio));
670 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio));
674 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
675 uint64_t addr, uint64_t msg, int numvec)
677 struct vm_pptdev_msi pptmsi;
679 bzero(&pptmsi, sizeof(pptmsi));
686 pptmsi.numvec = numvec;
688 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi));
692 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
693 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control)
695 struct vm_pptdev_msix pptmsix;
697 bzero(&pptmsix, sizeof(pptmsix));
705 pptmsix.vector_control = vector_control;
707 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix);
711 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
716 static struct vm_stats vmstats;
718 vmstats.cpuid = vcpu;
720 error = ioctl(ctx->fd, VM_STATS, &vmstats);
723 *ret_entries = vmstats.num_entries;
725 *ret_tv = vmstats.tv;
726 return (vmstats.statbuf);
732 vm_get_stat_desc(struct vmctx *ctx, int index)
734 static struct vm_stat_desc statdesc;
736 statdesc.index = index;
737 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0)
738 return (statdesc.desc);
744 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state)
747 struct vm_x2apic x2apic;
749 bzero(&x2apic, sizeof(x2apic));
752 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic);
753 *state = x2apic.state;
758 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state)
761 struct vm_x2apic x2apic;
763 bzero(&x2apic, sizeof(x2apic));
765 x2apic.state = state;
767 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic);
774 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
777 vcpu_reset(struct vmctx *vmctx, int vcpu)
780 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx;
781 uint32_t desc_access, desc_limit;
787 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags);
792 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0)
796 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0)
799 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0)
803 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0)
807 * CS: present, r/w, accessed, 16-bit, byte granularity, usable
809 desc_base = 0xffff0000;
811 desc_access = 0x0093;
812 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS,
813 desc_base, desc_limit, desc_access);
818 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0)
822 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity
826 desc_access = 0x0093;
827 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS,
828 desc_base, desc_limit, desc_access);
832 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS,
833 desc_base, desc_limit, desc_access);
837 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES,
838 desc_base, desc_limit, desc_access);
842 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS,
843 desc_base, desc_limit, desc_access);
847 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS,
848 desc_base, desc_limit, desc_access);
853 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0)
855 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0)
857 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0)
859 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0)
861 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0)
864 /* General purpose registers */
866 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0)
868 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0)
870 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0)
872 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0)
874 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0)
876 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0)
878 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0)
880 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0)
887 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR,
888 desc_base, desc_limit, desc_access);
892 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR,
893 desc_base, desc_limit, desc_access);
900 desc_access = 0x0000008b;
901 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access);
906 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0)
912 desc_access = 0x00000082;
913 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base,
914 desc_limit, desc_access);
919 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0)
922 /* XXX cr2, debug registers */
930 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
933 struct vm_gpa_pte gpapte;
935 bzero(&gpapte, sizeof(gpapte));
938 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte);
941 *num = gpapte.ptenum;
942 for (i = 0; i < gpapte.ptenum; i++)
943 pte[i] = gpapte.pte[i];
950 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
953 struct vm_hpet_cap cap;
955 bzero(&cap, sizeof(struct vm_hpet_cap));
956 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
957 if (capabilities != NULL)
958 *capabilities = cap.capabilities;
963 vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
964 uint64_t gla, int prot, uint64_t *gpa, int *fault)
966 struct vm_gla2gpa gg;
969 bzero(&gg, sizeof(struct vm_gla2gpa));
975 error = ioctl(ctx->fd, VM_GLA2GPA, &gg);
984 #define min(a,b) (((a) < (b)) ? (a) : (b))
988 vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
989 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt,
994 int error, i, n, off;
996 for (i = 0; i < iovcnt; i++) {
1003 error = vm_gla2gpa(ctx, vcpu, paging, gla, prot, &gpa, fault);
1004 if (error || *fault)
1007 off = gpa & PAGE_MASK;
1008 n = min(len, PAGE_SIZE - off);
1010 va = vm_map_gpa(ctx, gpa, n);
1026 vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt)
1033 vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len)
1041 assert(iov->iov_len);
1042 n = min(len, iov->iov_len);
1043 src = iov->iov_base;
1053 vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov,
1062 assert(iov->iov_len);
1063 n = min(len, iov->iov_len);
1064 dst = iov->iov_base;
1074 vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus)
1076 struct vm_cpuset vm_cpuset;
1079 bzero(&vm_cpuset, sizeof(struct vm_cpuset));
1080 vm_cpuset.which = which;
1081 vm_cpuset.cpusetsize = sizeof(cpuset_t);
1082 vm_cpuset.cpus = cpus;
1084 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset);
1089 vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus)
1092 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus));
1096 vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus)
1099 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus));
1103 vm_activate_cpu(struct vmctx *ctx, int vcpu)
1105 struct vm_activate_cpu ac;
1108 bzero(&ac, sizeof(struct vm_activate_cpu));
1110 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac);
1115 vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2)
1117 struct vm_intinfo vmii;
1120 bzero(&vmii, sizeof(struct vm_intinfo));
1122 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii);
1124 *info1 = vmii.info1;
1125 *info2 = vmii.info2;
1131 vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1)
1133 struct vm_intinfo vmii;
1136 bzero(&vmii, sizeof(struct vm_intinfo));
1139 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii);
1144 vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value)
1146 struct vm_rtc_data rtcdata;
1149 bzero(&rtcdata, sizeof(struct vm_rtc_data));
1150 rtcdata.offset = offset;
1151 rtcdata.value = value;
1152 error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata);
1157 vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval)
1159 struct vm_rtc_data rtcdata;
1162 bzero(&rtcdata, sizeof(struct vm_rtc_data));
1163 rtcdata.offset = offset;
1164 error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata);
1166 *retval = rtcdata.value;
1171 vm_rtc_settime(struct vmctx *ctx, time_t secs)
1173 struct vm_rtc_time rtctime;
1176 bzero(&rtctime, sizeof(struct vm_rtc_time));
1177 rtctime.secs = secs;
1178 error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime);
1183 vm_rtc_gettime(struct vmctx *ctx, time_t *secs)
1185 struct vm_rtc_time rtctime;
1188 bzero(&rtctime, sizeof(struct vm_rtc_time));
1189 error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime);
1191 *secs = rtctime.secs;
1196 vm_restart_instruction(void *arg, int vcpu)
1198 struct vmctx *ctx = arg;
1200 return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu));