2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2011 NetApp, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/sysctl.h>
36 #include <sys/ioctl.h>
37 #include <sys/linker.h>
39 #include <sys/module.h>
40 #include <sys/_iovec.h>
41 #include <sys/cpuset.h>
43 #include <x86/segments.h>
44 #include <machine/specialreg.h>
56 #include <machine/vmm.h>
57 #include <machine/vmm_dev.h>
61 #define MB (1024 * 1024UL)
62 #define GB (1024 * 1024 * 1024UL)
65 * Size of the guard region before and after the virtual address space
66 * mapping the guest physical memory. This must be a multiple of the
67 * superpage size for performance reasons.
69 #define VM_MMAP_GUARD_SIZE (4 * MB)
71 #define PROT_RW (PROT_READ | PROT_WRITE)
72 #define PROT_ALL (PROT_READ | PROT_WRITE | PROT_EXEC)
76 uint32_t lowmem_limit;
84 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x)))
85 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x)))
88 vm_device_open(const char *name)
93 len = strlen("/dev/vmm/") + strlen(name) + 1;
95 assert(vmfile != NULL);
96 snprintf(vmfile, len, "/dev/vmm/%s", name);
98 /* Open the device file */
99 fd = open(vmfile, O_RDWR, 0);
106 vm_create(const char *name)
108 /* Try to load vmm(4) module before creating a guest. */
109 if (modfind("vmm") < 0)
111 return (CREATE((char *)name));
115 vm_open(const char *name)
119 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1);
124 vm->lowmem_limit = 3 * GB;
125 vm->name = (char *)(vm + 1);
126 strcpy(vm->name, name);
128 if ((vm->fd = vm_device_open(vm->name)) < 0)
138 vm_destroy(struct vmctx *vm)
150 vm_parse_memsize(const char *optarg, size_t *ret_memsize)
156 optval = strtoul(optarg, &endptr, 0);
157 if (*optarg != '\0' && *endptr == '\0') {
159 * For the sake of backward compatibility if the memory size
160 * specified on the command line is less than a megabyte then
161 * it is interpreted as being in units of MB.
165 *ret_memsize = optval;
168 error = expand_number(optarg, ret_memsize);
174 vm_get_lowmem_limit(struct vmctx *ctx)
177 return (ctx->lowmem_limit);
181 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit)
184 ctx->lowmem_limit = limit;
188 vm_set_memflags(struct vmctx *ctx, int flags)
191 ctx->memflags = flags;
195 vm_get_memflags(struct vmctx *ctx)
198 return (ctx->memflags);
202 * Map segment 'segid' starting at 'off' into guest address range [gpa,gpa+len).
205 vm_mmap_memseg(struct vmctx *ctx, vm_paddr_t gpa, int segid, vm_ooffset_t off,
206 size_t len, int prot)
208 struct vm_memmap memmap;
212 memmap.segid = segid;
218 if (ctx->memflags & VM_MEM_F_WIRED)
219 memmap.flags |= VM_MEMMAP_F_WIRED;
222 * If this mapping already exists then don't create it again. This
223 * is the common case for SYSMEM mappings created by bhyveload(8).
225 error = vm_mmap_getnext(ctx, &gpa, &segid, &off, &len, &prot, &flags);
226 if (error == 0 && gpa == memmap.gpa) {
227 if (segid != memmap.segid || off != memmap.segoff ||
228 prot != memmap.prot || flags != memmap.flags) {
236 error = ioctl(ctx->fd, VM_MMAP_MEMSEG, &memmap);
241 vm_mmap_getnext(struct vmctx *ctx, vm_paddr_t *gpa, int *segid,
242 vm_ooffset_t *segoff, size_t *len, int *prot, int *flags)
244 struct vm_memmap memmap;
247 bzero(&memmap, sizeof(struct vm_memmap));
249 error = ioctl(ctx->fd, VM_MMAP_GETNEXT, &memmap);
252 *segid = memmap.segid;
253 *segoff = memmap.segoff;
256 *flags = memmap.flags;
262 * Return 0 if the segments are identical and non-zero otherwise.
264 * This is slightly complicated by the fact that only device memory segments
268 cmpseg(size_t len, const char *str, size_t len2, const char *str2)
272 if ((!str && !str2) || (str && str2 && !strcmp(str, str2)))
279 vm_alloc_memseg(struct vmctx *ctx, int segid, size_t len, const char *name)
281 struct vm_memseg memseg;
286 * If the memory segment has already been created then just return.
287 * This is the usual case for the SYSMEM segment created by userspace
288 * loaders like bhyveload(8).
290 error = vm_get_memseg(ctx, segid, &memseg.len, memseg.name,
291 sizeof(memseg.name));
295 if (memseg.len != 0) {
296 if (cmpseg(len, name, memseg.len, VM_MEMSEG_NAME(&memseg))) {
304 bzero(&memseg, sizeof(struct vm_memseg));
305 memseg.segid = segid;
308 n = strlcpy(memseg.name, name, sizeof(memseg.name));
309 if (n >= sizeof(memseg.name)) {
310 errno = ENAMETOOLONG;
315 error = ioctl(ctx->fd, VM_ALLOC_MEMSEG, &memseg);
320 vm_get_memseg(struct vmctx *ctx, int segid, size_t *lenp, char *namebuf,
323 struct vm_memseg memseg;
327 memseg.segid = segid;
328 error = ioctl(ctx->fd, VM_GET_MEMSEG, &memseg);
331 n = strlcpy(namebuf, memseg.name, bufsize);
333 errno = ENAMETOOLONG;
341 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char *base)
346 /* Map 'len' bytes starting at 'gpa' in the guest address space */
347 error = vm_mmap_memseg(ctx, gpa, VM_SYSMEM, gpa, len, PROT_ALL);
351 flags = MAP_SHARED | MAP_FIXED;
352 if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
355 /* mmap into the process address space on the host */
356 ptr = mmap(base + gpa, len, PROT_RW, flags, ctx->fd, gpa);
357 if (ptr == MAP_FAILED)
364 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms)
368 char *baseaddr, *ptr;
371 assert(vms == VM_MMAP_ALL);
374 * If 'memsize' cannot fit entirely in the 'lowmem' segment then
375 * create another 'highmem' segment above 4GB for the remainder.
377 if (memsize > ctx->lowmem_limit) {
378 ctx->lowmem = ctx->lowmem_limit;
379 ctx->highmem = memsize - ctx->lowmem_limit;
380 objsize = 4*GB + ctx->highmem;
382 ctx->lowmem = memsize;
384 objsize = ctx->lowmem;
387 error = vm_alloc_memseg(ctx, VM_SYSMEM, objsize, NULL);
392 * Stake out a contiguous region covering the guest physical memory
393 * and the adjoining guard regions.
395 len = VM_MMAP_GUARD_SIZE + objsize + VM_MMAP_GUARD_SIZE;
396 ptr = mmap(NULL, len, PROT_NONE, MAP_GUARD | MAP_ALIGNED_SUPER, -1, 0);
397 if (ptr == MAP_FAILED)
400 baseaddr = ptr + VM_MMAP_GUARD_SIZE;
401 if (ctx->highmem > 0) {
404 error = setup_memory_segment(ctx, gpa, len, baseaddr);
409 if (ctx->lowmem > 0) {
412 error = setup_memory_segment(ctx, gpa, len, baseaddr);
417 ctx->baseaddr = baseaddr;
423 * Returns a non-NULL pointer if [gaddr, gaddr+len) is entirely contained in
424 * the lowmem or highmem regions.
426 * In particular return NULL if [gaddr, gaddr+len) falls in guest MMIO region.
427 * The instruction emulation code depends on this behavior.
430 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len)
433 if (ctx->lowmem > 0) {
434 if (gaddr < ctx->lowmem && len <= ctx->lowmem &&
435 gaddr + len <= ctx->lowmem)
436 return (ctx->baseaddr + gaddr);
439 if (ctx->highmem > 0) {
441 if (gaddr < 4*GB + ctx->highmem &&
442 len <= ctx->highmem &&
443 gaddr + len <= 4*GB + ctx->highmem)
444 return (ctx->baseaddr + gaddr);
452 vm_get_lowmem_size(struct vmctx *ctx)
455 return (ctx->lowmem);
459 vm_get_highmem_size(struct vmctx *ctx)
462 return (ctx->highmem);
466 vm_create_devmem(struct vmctx *ctx, int segid, const char *name, size_t len)
468 char pathname[MAXPATHLEN];
471 int fd, error, flags;
475 if (name == NULL || strlen(name) == 0) {
480 error = vm_alloc_memseg(ctx, segid, len, name);
484 strlcpy(pathname, "/dev/vmm.io/", sizeof(pathname));
485 strlcat(pathname, ctx->name, sizeof(pathname));
486 strlcat(pathname, ".", sizeof(pathname));
487 strlcat(pathname, name, sizeof(pathname));
489 fd = open(pathname, O_RDWR);
494 * Stake out a contiguous region covering the device memory and the
495 * adjoining guard regions.
497 len2 = VM_MMAP_GUARD_SIZE + len + VM_MMAP_GUARD_SIZE;
498 base = mmap(NULL, len2, PROT_NONE, MAP_GUARD | MAP_ALIGNED_SUPER, -1,
500 if (base == MAP_FAILED)
503 flags = MAP_SHARED | MAP_FIXED;
504 if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
507 /* mmap the devmem region in the host address space */
508 ptr = mmap(base + VM_MMAP_GUARD_SIZE, len, PROT_RW, flags, fd, 0);
516 vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
517 uint64_t base, uint32_t limit, uint32_t access)
520 struct vm_seg_desc vmsegdesc;
522 bzero(&vmsegdesc, sizeof(vmsegdesc));
523 vmsegdesc.cpuid = vcpu;
524 vmsegdesc.regnum = reg;
525 vmsegdesc.desc.base = base;
526 vmsegdesc.desc.limit = limit;
527 vmsegdesc.desc.access = access;
529 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc);
534 vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
535 uint64_t *base, uint32_t *limit, uint32_t *access)
538 struct vm_seg_desc vmsegdesc;
540 bzero(&vmsegdesc, sizeof(vmsegdesc));
541 vmsegdesc.cpuid = vcpu;
542 vmsegdesc.regnum = reg;
544 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc);
546 *base = vmsegdesc.desc.base;
547 *limit = vmsegdesc.desc.limit;
548 *access = vmsegdesc.desc.access;
554 vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc)
558 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit,
564 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
567 struct vm_register vmreg;
569 bzero(&vmreg, sizeof(vmreg));
574 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg);
579 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val)
582 struct vm_register vmreg;
584 bzero(&vmreg, sizeof(vmreg));
588 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg);
589 *ret_val = vmreg.regval;
594 vm_set_register_set(struct vmctx *ctx, int vcpu, unsigned int count,
595 const int *regnums, uint64_t *regvals)
598 struct vm_register_set vmregset;
600 bzero(&vmregset, sizeof(vmregset));
601 vmregset.cpuid = vcpu;
602 vmregset.count = count;
603 vmregset.regnums = regnums;
604 vmregset.regvals = regvals;
606 error = ioctl(ctx->fd, VM_SET_REGISTER_SET, &vmregset);
611 vm_get_register_set(struct vmctx *ctx, int vcpu, unsigned int count,
612 const int *regnums, uint64_t *regvals)
615 struct vm_register_set vmregset;
617 bzero(&vmregset, sizeof(vmregset));
618 vmregset.cpuid = vcpu;
619 vmregset.count = count;
620 vmregset.regnums = regnums;
621 vmregset.regvals = regvals;
623 error = ioctl(ctx->fd, VM_GET_REGISTER_SET, &vmregset);
628 vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit)
633 bzero(&vmrun, sizeof(vmrun));
636 error = ioctl(ctx->fd, VM_RUN, &vmrun);
637 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit));
642 vm_suspend(struct vmctx *ctx, enum vm_suspend_how how)
644 struct vm_suspend vmsuspend;
646 bzero(&vmsuspend, sizeof(vmsuspend));
648 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend));
652 vm_reinit(struct vmctx *ctx)
655 return (ioctl(ctx->fd, VM_REINIT, 0));
659 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid,
660 uint32_t errcode, int restart_instruction)
662 struct vm_exception exc;
666 exc.error_code = errcode;
667 exc.error_code_valid = errcode_valid;
668 exc.restart_instruction = restart_instruction;
670 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc));
674 vm_apicid2vcpu(struct vmctx *ctx, int apicid)
677 * The apic id associated with the 'vcpu' has the same numerical value
678 * as the 'vcpu' itself.
684 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector)
686 struct vm_lapic_irq vmirq;
688 bzero(&vmirq, sizeof(vmirq));
690 vmirq.vector = vector;
692 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq));
696 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector)
698 struct vm_lapic_irq vmirq;
700 bzero(&vmirq, sizeof(vmirq));
702 vmirq.vector = vector;
704 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq));
708 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg)
710 struct vm_lapic_msi vmmsi;
712 bzero(&vmmsi, sizeof(vmmsi));
716 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi));
720 vm_ioapic_assert_irq(struct vmctx *ctx, int irq)
722 struct vm_ioapic_irq ioapic_irq;
724 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
725 ioapic_irq.irq = irq;
727 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq));
731 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq)
733 struct vm_ioapic_irq ioapic_irq;
735 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
736 ioapic_irq.irq = irq;
738 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq));
742 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq)
744 struct vm_ioapic_irq ioapic_irq;
746 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
747 ioapic_irq.irq = irq;
749 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq));
753 vm_ioapic_pincount(struct vmctx *ctx, int *pincount)
756 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount));
760 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
762 struct vm_isa_irq isa_irq;
764 bzero(&isa_irq, sizeof(struct vm_isa_irq));
765 isa_irq.atpic_irq = atpic_irq;
766 isa_irq.ioapic_irq = ioapic_irq;
768 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq));
772 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
774 struct vm_isa_irq isa_irq;
776 bzero(&isa_irq, sizeof(struct vm_isa_irq));
777 isa_irq.atpic_irq = atpic_irq;
778 isa_irq.ioapic_irq = ioapic_irq;
780 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq));
784 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
786 struct vm_isa_irq isa_irq;
788 bzero(&isa_irq, sizeof(struct vm_isa_irq));
789 isa_irq.atpic_irq = atpic_irq;
790 isa_irq.ioapic_irq = ioapic_irq;
792 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq));
796 vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq,
797 enum vm_intr_trigger trigger)
799 struct vm_isa_irq_trigger isa_irq_trigger;
801 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger));
802 isa_irq_trigger.atpic_irq = atpic_irq;
803 isa_irq_trigger.trigger = trigger;
805 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger));
809 vm_inject_nmi(struct vmctx *ctx, int vcpu)
813 bzero(&vmnmi, sizeof(vmnmi));
816 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi));
819 static const char *capstrmap[] = {
820 [VM_CAP_HALT_EXIT] = "hlt_exit",
821 [VM_CAP_MTRAP_EXIT] = "mtrap_exit",
822 [VM_CAP_PAUSE_EXIT] = "pause_exit",
823 [VM_CAP_UNRESTRICTED_GUEST] = "unrestricted_guest",
824 [VM_CAP_ENABLE_INVPCID] = "enable_invpcid",
825 [VM_CAP_BPT_EXIT] = "bpt_exit",
829 vm_capability_name2type(const char *capname)
833 for (i = 0; i < nitems(capstrmap); i++) {
834 if (strcmp(capstrmap[i], capname) == 0)
842 vm_capability_type2name(int type)
844 if (type < nitems(capstrmap))
845 return (capstrmap[type]);
851 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
855 struct vm_capability vmcap;
857 bzero(&vmcap, sizeof(vmcap));
861 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap);
862 *retval = vmcap.capval;
867 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val)
869 struct vm_capability vmcap;
871 bzero(&vmcap, sizeof(vmcap));
876 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap));
880 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
882 struct vm_pptdev pptdev;
884 bzero(&pptdev, sizeof(pptdev));
889 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev));
893 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
895 struct vm_pptdev pptdev;
897 bzero(&pptdev, sizeof(pptdev));
902 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev));
906 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
907 vm_paddr_t gpa, size_t len, vm_paddr_t hpa)
909 struct vm_pptdev_mmio pptmmio;
911 bzero(&pptmmio, sizeof(pptmmio));
919 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio));
923 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
924 uint64_t addr, uint64_t msg, int numvec)
926 struct vm_pptdev_msi pptmsi;
928 bzero(&pptmsi, sizeof(pptmsi));
935 pptmsi.numvec = numvec;
937 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi));
941 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
942 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control)
944 struct vm_pptdev_msix pptmsix;
946 bzero(&pptmsix, sizeof(pptmsix));
954 pptmsix.vector_control = vector_control;
956 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix);
960 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
965 static struct vm_stats vmstats;
967 vmstats.cpuid = vcpu;
969 error = ioctl(ctx->fd, VM_STATS, &vmstats);
972 *ret_entries = vmstats.num_entries;
974 *ret_tv = vmstats.tv;
975 return (vmstats.statbuf);
981 vm_get_stat_desc(struct vmctx *ctx, int index)
983 static struct vm_stat_desc statdesc;
985 statdesc.index = index;
986 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0)
987 return (statdesc.desc);
993 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state)
996 struct vm_x2apic x2apic;
998 bzero(&x2apic, sizeof(x2apic));
1001 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic);
1002 *state = x2apic.state;
1007 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state)
1010 struct vm_x2apic x2apic;
1012 bzero(&x2apic, sizeof(x2apic));
1013 x2apic.cpuid = vcpu;
1014 x2apic.state = state;
1016 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic);
1022 * From Intel Vol 3a:
1023 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
1026 vcpu_reset(struct vmctx *vmctx, int vcpu)
1029 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx;
1030 uint32_t desc_access, desc_limit;
1036 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags);
1041 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0)
1045 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0)
1048 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0)
1052 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0)
1056 * CS: present, r/w, accessed, 16-bit, byte granularity, usable
1058 desc_base = 0xffff0000;
1059 desc_limit = 0xffff;
1060 desc_access = 0x0093;
1061 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS,
1062 desc_base, desc_limit, desc_access);
1067 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0)
1071 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity
1074 desc_limit = 0xffff;
1075 desc_access = 0x0093;
1076 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS,
1077 desc_base, desc_limit, desc_access);
1081 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS,
1082 desc_base, desc_limit, desc_access);
1086 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES,
1087 desc_base, desc_limit, desc_access);
1091 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS,
1092 desc_base, desc_limit, desc_access);
1096 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS,
1097 desc_base, desc_limit, desc_access);
1102 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0)
1104 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0)
1106 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0)
1108 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0)
1110 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0)
1113 /* General purpose registers */
1115 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0)
1117 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0)
1119 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0)
1121 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0)
1123 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0)
1125 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0)
1127 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0)
1129 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0)
1134 desc_limit = 0xffff;
1136 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR,
1137 desc_base, desc_limit, desc_access);
1141 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR,
1142 desc_base, desc_limit, desc_access);
1148 desc_limit = 0xffff;
1149 desc_access = 0x0000008b;
1150 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access);
1155 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0)
1160 desc_limit = 0xffff;
1161 desc_access = 0x00000082;
1162 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base,
1163 desc_limit, desc_access);
1168 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0)
1171 /* XXX cr2, debug registers */
1179 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
1182 struct vm_gpa_pte gpapte;
1184 bzero(&gpapte, sizeof(gpapte));
1187 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte);
1190 *num = gpapte.ptenum;
1191 for (i = 0; i < gpapte.ptenum; i++)
1192 pte[i] = gpapte.pte[i];
1199 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
1202 struct vm_hpet_cap cap;
1204 bzero(&cap, sizeof(struct vm_hpet_cap));
1205 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
1206 if (capabilities != NULL)
1207 *capabilities = cap.capabilities;
1212 vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1213 uint64_t gla, int prot, uint64_t *gpa, int *fault)
1215 struct vm_gla2gpa gg;
1218 bzero(&gg, sizeof(struct vm_gla2gpa));
1222 gg.paging = *paging;
1224 error = ioctl(ctx->fd, VM_GLA2GPA, &gg);
1233 vm_gla2gpa_nofault(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1234 uint64_t gla, int prot, uint64_t *gpa, int *fault)
1236 struct vm_gla2gpa gg;
1239 bzero(&gg, sizeof(struct vm_gla2gpa));
1243 gg.paging = *paging;
1245 error = ioctl(ctx->fd, VM_GLA2GPA_NOFAULT, &gg);
1254 #define min(a,b) (((a) < (b)) ? (a) : (b))
1258 vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1259 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt,
1264 int error, i, n, off;
1266 for (i = 0; i < iovcnt; i++) {
1267 iov[i].iov_base = 0;
1273 error = vm_gla2gpa(ctx, vcpu, paging, gla, prot, &gpa, fault);
1274 if (error || *fault)
1277 off = gpa & PAGE_MASK;
1278 n = min(len, PAGE_SIZE - off);
1280 va = vm_map_gpa(ctx, gpa, n);
1296 vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt)
1303 vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len)
1311 assert(iov->iov_len);
1312 n = min(len, iov->iov_len);
1313 src = iov->iov_base;
1323 vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov,
1332 assert(iov->iov_len);
1333 n = min(len, iov->iov_len);
1334 dst = iov->iov_base;
1344 vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus)
1346 struct vm_cpuset vm_cpuset;
1349 bzero(&vm_cpuset, sizeof(struct vm_cpuset));
1350 vm_cpuset.which = which;
1351 vm_cpuset.cpusetsize = sizeof(cpuset_t);
1352 vm_cpuset.cpus = cpus;
1354 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset);
1359 vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus)
1362 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus));
1366 vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus)
1369 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus));
1373 vm_debug_cpus(struct vmctx *ctx, cpuset_t *cpus)
1376 return (vm_get_cpus(ctx, VM_DEBUG_CPUS, cpus));
1380 vm_activate_cpu(struct vmctx *ctx, int vcpu)
1382 struct vm_activate_cpu ac;
1385 bzero(&ac, sizeof(struct vm_activate_cpu));
1387 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac);
1392 vm_suspend_cpu(struct vmctx *ctx, int vcpu)
1394 struct vm_activate_cpu ac;
1397 bzero(&ac, sizeof(struct vm_activate_cpu));
1399 error = ioctl(ctx->fd, VM_SUSPEND_CPU, &ac);
1404 vm_resume_cpu(struct vmctx *ctx, int vcpu)
1406 struct vm_activate_cpu ac;
1409 bzero(&ac, sizeof(struct vm_activate_cpu));
1411 error = ioctl(ctx->fd, VM_RESUME_CPU, &ac);
1416 vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2)
1418 struct vm_intinfo vmii;
1421 bzero(&vmii, sizeof(struct vm_intinfo));
1423 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii);
1425 *info1 = vmii.info1;
1426 *info2 = vmii.info2;
1432 vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1)
1434 struct vm_intinfo vmii;
1437 bzero(&vmii, sizeof(struct vm_intinfo));
1440 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii);
1445 vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value)
1447 struct vm_rtc_data rtcdata;
1450 bzero(&rtcdata, sizeof(struct vm_rtc_data));
1451 rtcdata.offset = offset;
1452 rtcdata.value = value;
1453 error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata);
1458 vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval)
1460 struct vm_rtc_data rtcdata;
1463 bzero(&rtcdata, sizeof(struct vm_rtc_data));
1464 rtcdata.offset = offset;
1465 error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata);
1467 *retval = rtcdata.value;
1472 vm_rtc_settime(struct vmctx *ctx, time_t secs)
1474 struct vm_rtc_time rtctime;
1477 bzero(&rtctime, sizeof(struct vm_rtc_time));
1478 rtctime.secs = secs;
1479 error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime);
1484 vm_rtc_gettime(struct vmctx *ctx, time_t *secs)
1486 struct vm_rtc_time rtctime;
1489 bzero(&rtctime, sizeof(struct vm_rtc_time));
1490 error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime);
1492 *secs = rtctime.secs;
1497 vm_restart_instruction(void *arg, int vcpu)
1499 struct vmctx *ctx = arg;
1501 return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu));
1505 vm_set_topology(struct vmctx *ctx,
1506 uint16_t sockets, uint16_t cores, uint16_t threads, uint16_t maxcpus)
1508 struct vm_cpu_topology topology;
1510 bzero(&topology, sizeof (struct vm_cpu_topology));
1511 topology.sockets = sockets;
1512 topology.cores = cores;
1513 topology.threads = threads;
1514 topology.maxcpus = maxcpus;
1515 return (ioctl(ctx->fd, VM_SET_TOPOLOGY, &topology));
1519 vm_get_topology(struct vmctx *ctx,
1520 uint16_t *sockets, uint16_t *cores, uint16_t *threads, uint16_t *maxcpus)
1522 struct vm_cpu_topology topology;
1525 bzero(&topology, sizeof (struct vm_cpu_topology));
1526 error = ioctl(ctx->fd, VM_GET_TOPOLOGY, &topology);
1528 *sockets = topology.sockets;
1529 *cores = topology.cores;
1530 *threads = topology.threads;
1531 *maxcpus = topology.maxcpus;
1537 vm_get_device_fd(struct vmctx *ctx)
1544 vm_get_ioctls(size_t *len)
1547 /* keep in sync with machine/vmm_dev.h */
1548 static const cap_ioctl_t vm_ioctl_cmds[] = { VM_RUN, VM_SUSPEND, VM_REINIT,
1549 VM_ALLOC_MEMSEG, VM_GET_MEMSEG, VM_MMAP_MEMSEG, VM_MMAP_MEMSEG,
1550 VM_MMAP_GETNEXT, VM_SET_REGISTER, VM_GET_REGISTER,
1551 VM_SET_SEGMENT_DESCRIPTOR, VM_GET_SEGMENT_DESCRIPTOR,
1552 VM_SET_REGISTER_SET, VM_GET_REGISTER_SET,
1553 VM_INJECT_EXCEPTION, VM_LAPIC_IRQ, VM_LAPIC_LOCAL_IRQ,
1554 VM_LAPIC_MSI, VM_IOAPIC_ASSERT_IRQ, VM_IOAPIC_DEASSERT_IRQ,
1555 VM_IOAPIC_PULSE_IRQ, VM_IOAPIC_PINCOUNT, VM_ISA_ASSERT_IRQ,
1556 VM_ISA_DEASSERT_IRQ, VM_ISA_PULSE_IRQ, VM_ISA_SET_IRQ_TRIGGER,
1557 VM_SET_CAPABILITY, VM_GET_CAPABILITY, VM_BIND_PPTDEV,
1558 VM_UNBIND_PPTDEV, VM_MAP_PPTDEV_MMIO, VM_PPTDEV_MSI,
1559 VM_PPTDEV_MSIX, VM_INJECT_NMI, VM_STATS, VM_STAT_DESC,
1560 VM_SET_X2APIC_STATE, VM_GET_X2APIC_STATE,
1561 VM_GET_HPET_CAPABILITIES, VM_GET_GPA_PMAP, VM_GLA2GPA,
1563 VM_ACTIVATE_CPU, VM_GET_CPUS, VM_SUSPEND_CPU, VM_RESUME_CPU,
1564 VM_SET_INTINFO, VM_GET_INTINFO,
1565 VM_RTC_WRITE, VM_RTC_READ, VM_RTC_SETTIME, VM_RTC_GETTIME,
1566 VM_RESTART_INSTRUCTION, VM_SET_TOPOLOGY, VM_GET_TOPOLOGY };
1569 cmds = malloc(sizeof(vm_ioctl_cmds));
1572 bcopy(vm_ioctl_cmds, cmds, sizeof(vm_ioctl_cmds));
1576 *len = nitems(vm_ioctl_cmds);