2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2011 NetApp, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/sysctl.h>
36 #include <sys/ioctl.h>
38 #include <sys/_iovec.h>
39 #include <sys/cpuset.h>
41 #include <x86/segments.h>
42 #include <machine/specialreg.h>
54 #include <machine/vmm.h>
55 #include <machine/vmm_dev.h>
59 #define MB (1024 * 1024UL)
60 #define GB (1024 * 1024 * 1024UL)
63 * Size of the guard region before and after the virtual address space
64 * mapping the guest physical memory. This must be a multiple of the
65 * superpage size for performance reasons.
67 #define VM_MMAP_GUARD_SIZE (4 * MB)
69 #define PROT_RW (PROT_READ | PROT_WRITE)
70 #define PROT_ALL (PROT_READ | PROT_WRITE | PROT_EXEC)
74 uint32_t lowmem_limit;
82 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x)))
83 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x)))
86 vm_device_open(const char *name)
91 len = strlen("/dev/vmm/") + strlen(name) + 1;
93 assert(vmfile != NULL);
94 snprintf(vmfile, len, "/dev/vmm/%s", name);
96 /* Open the device file */
97 fd = open(vmfile, O_RDWR, 0);
104 vm_create(const char *name)
107 return (CREATE((char *)name));
111 vm_open(const char *name)
115 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1);
120 vm->lowmem_limit = 3 * GB;
121 vm->name = (char *)(vm + 1);
122 strcpy(vm->name, name);
124 if ((vm->fd = vm_device_open(vm->name)) < 0)
134 vm_destroy(struct vmctx *vm)
146 vm_parse_memsize(const char *optarg, size_t *ret_memsize)
152 optval = strtoul(optarg, &endptr, 0);
153 if (*optarg != '\0' && *endptr == '\0') {
155 * For the sake of backward compatibility if the memory size
156 * specified on the command line is less than a megabyte then
157 * it is interpreted as being in units of MB.
161 *ret_memsize = optval;
164 error = expand_number(optarg, ret_memsize);
170 vm_get_lowmem_limit(struct vmctx *ctx)
173 return (ctx->lowmem_limit);
177 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit)
180 ctx->lowmem_limit = limit;
184 vm_set_memflags(struct vmctx *ctx, int flags)
187 ctx->memflags = flags;
191 vm_get_memflags(struct vmctx *ctx)
194 return (ctx->memflags);
198 * Map segment 'segid' starting at 'off' into guest address range [gpa,gpa+len).
201 vm_mmap_memseg(struct vmctx *ctx, vm_paddr_t gpa, int segid, vm_ooffset_t off,
202 size_t len, int prot)
204 struct vm_memmap memmap;
208 memmap.segid = segid;
214 if (ctx->memflags & VM_MEM_F_WIRED)
215 memmap.flags |= VM_MEMMAP_F_WIRED;
218 * If this mapping already exists then don't create it again. This
219 * is the common case for SYSMEM mappings created by bhyveload(8).
221 error = vm_mmap_getnext(ctx, &gpa, &segid, &off, &len, &prot, &flags);
222 if (error == 0 && gpa == memmap.gpa) {
223 if (segid != memmap.segid || off != memmap.segoff ||
224 prot != memmap.prot || flags != memmap.flags) {
232 error = ioctl(ctx->fd, VM_MMAP_MEMSEG, &memmap);
237 vm_mmap_getnext(struct vmctx *ctx, vm_paddr_t *gpa, int *segid,
238 vm_ooffset_t *segoff, size_t *len, int *prot, int *flags)
240 struct vm_memmap memmap;
243 bzero(&memmap, sizeof(struct vm_memmap));
245 error = ioctl(ctx->fd, VM_MMAP_GETNEXT, &memmap);
248 *segid = memmap.segid;
249 *segoff = memmap.segoff;
252 *flags = memmap.flags;
258 * Return 0 if the segments are identical and non-zero otherwise.
260 * This is slightly complicated by the fact that only device memory segments
264 cmpseg(size_t len, const char *str, size_t len2, const char *str2)
268 if ((!str && !str2) || (str && str2 && !strcmp(str, str2)))
275 vm_alloc_memseg(struct vmctx *ctx, int segid, size_t len, const char *name)
277 struct vm_memseg memseg;
282 * If the memory segment has already been created then just return.
283 * This is the usual case for the SYSMEM segment created by userspace
284 * loaders like bhyveload(8).
286 error = vm_get_memseg(ctx, segid, &memseg.len, memseg.name,
287 sizeof(memseg.name));
291 if (memseg.len != 0) {
292 if (cmpseg(len, name, memseg.len, VM_MEMSEG_NAME(&memseg))) {
300 bzero(&memseg, sizeof(struct vm_memseg));
301 memseg.segid = segid;
304 n = strlcpy(memseg.name, name, sizeof(memseg.name));
305 if (n >= sizeof(memseg.name)) {
306 errno = ENAMETOOLONG;
311 error = ioctl(ctx->fd, VM_ALLOC_MEMSEG, &memseg);
316 vm_get_memseg(struct vmctx *ctx, int segid, size_t *lenp, char *namebuf,
319 struct vm_memseg memseg;
323 memseg.segid = segid;
324 error = ioctl(ctx->fd, VM_GET_MEMSEG, &memseg);
327 n = strlcpy(namebuf, memseg.name, bufsize);
329 errno = ENAMETOOLONG;
337 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char *base)
342 /* Map 'len' bytes starting at 'gpa' in the guest address space */
343 error = vm_mmap_memseg(ctx, gpa, VM_SYSMEM, gpa, len, PROT_ALL);
347 flags = MAP_SHARED | MAP_FIXED;
348 if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
351 /* mmap into the process address space on the host */
352 ptr = mmap(base + gpa, len, PROT_RW, flags, ctx->fd, gpa);
353 if (ptr == MAP_FAILED)
360 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms)
364 char *baseaddr, *ptr;
367 assert(vms == VM_MMAP_ALL);
370 * If 'memsize' cannot fit entirely in the 'lowmem' segment then
371 * create another 'highmem' segment above 4GB for the remainder.
373 if (memsize > ctx->lowmem_limit) {
374 ctx->lowmem = ctx->lowmem_limit;
375 ctx->highmem = memsize - ctx->lowmem_limit;
376 objsize = 4*GB + ctx->highmem;
378 ctx->lowmem = memsize;
380 objsize = ctx->lowmem;
383 error = vm_alloc_memseg(ctx, VM_SYSMEM, objsize, NULL);
388 * Stake out a contiguous region covering the guest physical memory
389 * and the adjoining guard regions.
391 len = VM_MMAP_GUARD_SIZE + objsize + VM_MMAP_GUARD_SIZE;
392 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER;
393 ptr = mmap(NULL, len, PROT_NONE, flags, -1, 0);
394 if (ptr == MAP_FAILED)
397 baseaddr = ptr + VM_MMAP_GUARD_SIZE;
398 if (ctx->highmem > 0) {
401 error = setup_memory_segment(ctx, gpa, len, baseaddr);
406 if (ctx->lowmem > 0) {
409 error = setup_memory_segment(ctx, gpa, len, baseaddr);
414 ctx->baseaddr = baseaddr;
420 * Returns a non-NULL pointer if [gaddr, gaddr+len) is entirely contained in
421 * the lowmem or highmem regions.
423 * In particular return NULL if [gaddr, gaddr+len) falls in guest MMIO region.
424 * The instruction emulation code depends on this behavior.
427 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len)
430 if (ctx->lowmem > 0) {
431 if (gaddr < ctx->lowmem && len <= ctx->lowmem &&
432 gaddr + len <= ctx->lowmem)
433 return (ctx->baseaddr + gaddr);
436 if (ctx->highmem > 0) {
438 if (gaddr < 4*GB + ctx->highmem &&
439 len <= ctx->highmem &&
440 gaddr + len <= 4*GB + ctx->highmem)
441 return (ctx->baseaddr + gaddr);
449 vm_get_lowmem_size(struct vmctx *ctx)
452 return (ctx->lowmem);
456 vm_get_highmem_size(struct vmctx *ctx)
459 return (ctx->highmem);
463 vm_create_devmem(struct vmctx *ctx, int segid, const char *name, size_t len)
465 char pathname[MAXPATHLEN];
468 int fd, error, flags;
472 if (name == NULL || strlen(name) == 0) {
477 error = vm_alloc_memseg(ctx, segid, len, name);
481 strlcpy(pathname, "/dev/vmm.io/", sizeof(pathname));
482 strlcat(pathname, ctx->name, sizeof(pathname));
483 strlcat(pathname, ".", sizeof(pathname));
484 strlcat(pathname, name, sizeof(pathname));
486 fd = open(pathname, O_RDWR);
491 * Stake out a contiguous region covering the device memory and the
492 * adjoining guard regions.
494 len2 = VM_MMAP_GUARD_SIZE + len + VM_MMAP_GUARD_SIZE;
495 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER;
496 base = mmap(NULL, len2, PROT_NONE, flags, -1, 0);
497 if (base == MAP_FAILED)
500 flags = MAP_SHARED | MAP_FIXED;
501 if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
504 /* mmap the devmem region in the host address space */
505 ptr = mmap(base + VM_MMAP_GUARD_SIZE, len, PROT_RW, flags, fd, 0);
513 vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
514 uint64_t base, uint32_t limit, uint32_t access)
517 struct vm_seg_desc vmsegdesc;
519 bzero(&vmsegdesc, sizeof(vmsegdesc));
520 vmsegdesc.cpuid = vcpu;
521 vmsegdesc.regnum = reg;
522 vmsegdesc.desc.base = base;
523 vmsegdesc.desc.limit = limit;
524 vmsegdesc.desc.access = access;
526 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc);
531 vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
532 uint64_t *base, uint32_t *limit, uint32_t *access)
535 struct vm_seg_desc vmsegdesc;
537 bzero(&vmsegdesc, sizeof(vmsegdesc));
538 vmsegdesc.cpuid = vcpu;
539 vmsegdesc.regnum = reg;
541 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc);
543 *base = vmsegdesc.desc.base;
544 *limit = vmsegdesc.desc.limit;
545 *access = vmsegdesc.desc.access;
551 vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc)
555 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit,
561 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
564 struct vm_register vmreg;
566 bzero(&vmreg, sizeof(vmreg));
571 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg);
576 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val)
579 struct vm_register vmreg;
581 bzero(&vmreg, sizeof(vmreg));
585 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg);
586 *ret_val = vmreg.regval;
591 vm_set_register_set(struct vmctx *ctx, int vcpu, unsigned int count,
592 const int *regnums, uint64_t *regvals)
595 struct vm_register_set vmregset;
597 bzero(&vmregset, sizeof(vmregset));
598 vmregset.cpuid = vcpu;
599 vmregset.count = count;
600 vmregset.regnums = regnums;
601 vmregset.regvals = regvals;
603 error = ioctl(ctx->fd, VM_SET_REGISTER_SET, &vmregset);
608 vm_get_register_set(struct vmctx *ctx, int vcpu, unsigned int count,
609 const int *regnums, uint64_t *regvals)
612 struct vm_register_set vmregset;
614 bzero(&vmregset, sizeof(vmregset));
615 vmregset.cpuid = vcpu;
616 vmregset.count = count;
617 vmregset.regnums = regnums;
618 vmregset.regvals = regvals;
620 error = ioctl(ctx->fd, VM_GET_REGISTER_SET, &vmregset);
625 vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit)
630 bzero(&vmrun, sizeof(vmrun));
633 error = ioctl(ctx->fd, VM_RUN, &vmrun);
634 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit));
639 vm_suspend(struct vmctx *ctx, enum vm_suspend_how how)
641 struct vm_suspend vmsuspend;
643 bzero(&vmsuspend, sizeof(vmsuspend));
645 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend));
649 vm_reinit(struct vmctx *ctx)
652 return (ioctl(ctx->fd, VM_REINIT, 0));
656 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid,
657 uint32_t errcode, int restart_instruction)
659 struct vm_exception exc;
663 exc.error_code = errcode;
664 exc.error_code_valid = errcode_valid;
665 exc.restart_instruction = restart_instruction;
667 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc));
671 vm_apicid2vcpu(struct vmctx *ctx, int apicid)
674 * The apic id associated with the 'vcpu' has the same numerical value
675 * as the 'vcpu' itself.
681 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector)
683 struct vm_lapic_irq vmirq;
685 bzero(&vmirq, sizeof(vmirq));
687 vmirq.vector = vector;
689 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq));
693 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector)
695 struct vm_lapic_irq vmirq;
697 bzero(&vmirq, sizeof(vmirq));
699 vmirq.vector = vector;
701 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq));
705 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg)
707 struct vm_lapic_msi vmmsi;
709 bzero(&vmmsi, sizeof(vmmsi));
713 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi));
717 vm_ioapic_assert_irq(struct vmctx *ctx, int irq)
719 struct vm_ioapic_irq ioapic_irq;
721 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
722 ioapic_irq.irq = irq;
724 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq));
728 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq)
730 struct vm_ioapic_irq ioapic_irq;
732 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
733 ioapic_irq.irq = irq;
735 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq));
739 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq)
741 struct vm_ioapic_irq ioapic_irq;
743 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
744 ioapic_irq.irq = irq;
746 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq));
750 vm_ioapic_pincount(struct vmctx *ctx, int *pincount)
753 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount));
757 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
759 struct vm_isa_irq isa_irq;
761 bzero(&isa_irq, sizeof(struct vm_isa_irq));
762 isa_irq.atpic_irq = atpic_irq;
763 isa_irq.ioapic_irq = ioapic_irq;
765 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq));
769 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
771 struct vm_isa_irq isa_irq;
773 bzero(&isa_irq, sizeof(struct vm_isa_irq));
774 isa_irq.atpic_irq = atpic_irq;
775 isa_irq.ioapic_irq = ioapic_irq;
777 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq));
781 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
783 struct vm_isa_irq isa_irq;
785 bzero(&isa_irq, sizeof(struct vm_isa_irq));
786 isa_irq.atpic_irq = atpic_irq;
787 isa_irq.ioapic_irq = ioapic_irq;
789 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq));
793 vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq,
794 enum vm_intr_trigger trigger)
796 struct vm_isa_irq_trigger isa_irq_trigger;
798 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger));
799 isa_irq_trigger.atpic_irq = atpic_irq;
800 isa_irq_trigger.trigger = trigger;
802 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger));
806 vm_inject_nmi(struct vmctx *ctx, int vcpu)
810 bzero(&vmnmi, sizeof(vmnmi));
813 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi));
820 { "hlt_exit", VM_CAP_HALT_EXIT },
821 { "mtrap_exit", VM_CAP_MTRAP_EXIT },
822 { "pause_exit", VM_CAP_PAUSE_EXIT },
823 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST },
824 { "enable_invpcid", VM_CAP_ENABLE_INVPCID },
829 vm_capability_name2type(const char *capname)
833 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) {
834 if (strcmp(capstrmap[i].name, capname) == 0)
835 return (capstrmap[i].type);
842 vm_capability_type2name(int type)
846 for (i = 0; capstrmap[i].name != NULL; i++) {
847 if (capstrmap[i].type == type)
848 return (capstrmap[i].name);
855 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
859 struct vm_capability vmcap;
861 bzero(&vmcap, sizeof(vmcap));
865 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap);
866 *retval = vmcap.capval;
871 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val)
873 struct vm_capability vmcap;
875 bzero(&vmcap, sizeof(vmcap));
880 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap));
884 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
886 struct vm_pptdev pptdev;
888 bzero(&pptdev, sizeof(pptdev));
893 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev));
897 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
899 struct vm_pptdev pptdev;
901 bzero(&pptdev, sizeof(pptdev));
906 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev));
910 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
911 vm_paddr_t gpa, size_t len, vm_paddr_t hpa)
913 struct vm_pptdev_mmio pptmmio;
915 bzero(&pptmmio, sizeof(pptmmio));
923 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio));
927 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
928 uint64_t addr, uint64_t msg, int numvec)
930 struct vm_pptdev_msi pptmsi;
932 bzero(&pptmsi, sizeof(pptmsi));
939 pptmsi.numvec = numvec;
941 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi));
945 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
946 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control)
948 struct vm_pptdev_msix pptmsix;
950 bzero(&pptmsix, sizeof(pptmsix));
958 pptmsix.vector_control = vector_control;
960 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix);
964 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
969 static struct vm_stats vmstats;
971 vmstats.cpuid = vcpu;
973 error = ioctl(ctx->fd, VM_STATS, &vmstats);
976 *ret_entries = vmstats.num_entries;
978 *ret_tv = vmstats.tv;
979 return (vmstats.statbuf);
985 vm_get_stat_desc(struct vmctx *ctx, int index)
987 static struct vm_stat_desc statdesc;
989 statdesc.index = index;
990 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0)
991 return (statdesc.desc);
997 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state)
1000 struct vm_x2apic x2apic;
1002 bzero(&x2apic, sizeof(x2apic));
1003 x2apic.cpuid = vcpu;
1005 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic);
1006 *state = x2apic.state;
1011 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state)
1014 struct vm_x2apic x2apic;
1016 bzero(&x2apic, sizeof(x2apic));
1017 x2apic.cpuid = vcpu;
1018 x2apic.state = state;
1020 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic);
1026 * From Intel Vol 3a:
1027 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
1030 vcpu_reset(struct vmctx *vmctx, int vcpu)
1033 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx;
1034 uint32_t desc_access, desc_limit;
1040 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags);
1045 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0)
1049 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0)
1052 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0)
1056 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0)
1060 * CS: present, r/w, accessed, 16-bit, byte granularity, usable
1062 desc_base = 0xffff0000;
1063 desc_limit = 0xffff;
1064 desc_access = 0x0093;
1065 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS,
1066 desc_base, desc_limit, desc_access);
1071 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0)
1075 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity
1078 desc_limit = 0xffff;
1079 desc_access = 0x0093;
1080 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS,
1081 desc_base, desc_limit, desc_access);
1085 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS,
1086 desc_base, desc_limit, desc_access);
1090 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES,
1091 desc_base, desc_limit, desc_access);
1095 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS,
1096 desc_base, desc_limit, desc_access);
1100 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS,
1101 desc_base, desc_limit, desc_access);
1106 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0)
1108 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0)
1110 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0)
1112 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0)
1114 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0)
1117 /* General purpose registers */
1119 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0)
1121 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0)
1123 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0)
1125 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0)
1127 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0)
1129 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0)
1131 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0)
1133 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0)
1138 desc_limit = 0xffff;
1140 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR,
1141 desc_base, desc_limit, desc_access);
1145 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR,
1146 desc_base, desc_limit, desc_access);
1152 desc_limit = 0xffff;
1153 desc_access = 0x0000008b;
1154 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access);
1159 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0)
1164 desc_limit = 0xffff;
1165 desc_access = 0x00000082;
1166 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base,
1167 desc_limit, desc_access);
1172 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0)
1175 /* XXX cr2, debug registers */
1183 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
1186 struct vm_gpa_pte gpapte;
1188 bzero(&gpapte, sizeof(gpapte));
1191 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte);
1194 *num = gpapte.ptenum;
1195 for (i = 0; i < gpapte.ptenum; i++)
1196 pte[i] = gpapte.pte[i];
1203 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
1206 struct vm_hpet_cap cap;
1208 bzero(&cap, sizeof(struct vm_hpet_cap));
1209 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
1210 if (capabilities != NULL)
1211 *capabilities = cap.capabilities;
1216 vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1217 uint64_t gla, int prot, uint64_t *gpa, int *fault)
1219 struct vm_gla2gpa gg;
1222 bzero(&gg, sizeof(struct vm_gla2gpa));
1226 gg.paging = *paging;
1228 error = ioctl(ctx->fd, VM_GLA2GPA, &gg);
1237 vm_gla2gpa_nofault(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1238 uint64_t gla, int prot, uint64_t *gpa, int *fault)
1240 struct vm_gla2gpa gg;
1243 bzero(&gg, sizeof(struct vm_gla2gpa));
1247 gg.paging = *paging;
1249 error = ioctl(ctx->fd, VM_GLA2GPA_NOFAULT, &gg);
1258 #define min(a,b) (((a) < (b)) ? (a) : (b))
1262 vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1263 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt,
1268 int error, i, n, off;
1270 for (i = 0; i < iovcnt; i++) {
1271 iov[i].iov_base = 0;
1277 error = vm_gla2gpa(ctx, vcpu, paging, gla, prot, &gpa, fault);
1278 if (error || *fault)
1281 off = gpa & PAGE_MASK;
1282 n = min(len, PAGE_SIZE - off);
1284 va = vm_map_gpa(ctx, gpa, n);
1300 vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt)
1307 vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len)
1315 assert(iov->iov_len);
1316 n = min(len, iov->iov_len);
1317 src = iov->iov_base;
1327 vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov,
1336 assert(iov->iov_len);
1337 n = min(len, iov->iov_len);
1338 dst = iov->iov_base;
1348 vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus)
1350 struct vm_cpuset vm_cpuset;
1353 bzero(&vm_cpuset, sizeof(struct vm_cpuset));
1354 vm_cpuset.which = which;
1355 vm_cpuset.cpusetsize = sizeof(cpuset_t);
1356 vm_cpuset.cpus = cpus;
1358 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset);
1363 vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus)
1366 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus));
1370 vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus)
1373 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus));
1377 vm_debug_cpus(struct vmctx *ctx, cpuset_t *cpus)
1380 return (vm_get_cpus(ctx, VM_DEBUG_CPUS, cpus));
1384 vm_activate_cpu(struct vmctx *ctx, int vcpu)
1386 struct vm_activate_cpu ac;
1389 bzero(&ac, sizeof(struct vm_activate_cpu));
1391 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac);
1396 vm_suspend_cpu(struct vmctx *ctx, int vcpu)
1398 struct vm_activate_cpu ac;
1401 bzero(&ac, sizeof(struct vm_activate_cpu));
1403 error = ioctl(ctx->fd, VM_SUSPEND_CPU, &ac);
1408 vm_resume_cpu(struct vmctx *ctx, int vcpu)
1410 struct vm_activate_cpu ac;
1413 bzero(&ac, sizeof(struct vm_activate_cpu));
1415 error = ioctl(ctx->fd, VM_RESUME_CPU, &ac);
1420 vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2)
1422 struct vm_intinfo vmii;
1425 bzero(&vmii, sizeof(struct vm_intinfo));
1427 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii);
1429 *info1 = vmii.info1;
1430 *info2 = vmii.info2;
1436 vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1)
1438 struct vm_intinfo vmii;
1441 bzero(&vmii, sizeof(struct vm_intinfo));
1444 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii);
1449 vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value)
1451 struct vm_rtc_data rtcdata;
1454 bzero(&rtcdata, sizeof(struct vm_rtc_data));
1455 rtcdata.offset = offset;
1456 rtcdata.value = value;
1457 error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata);
1462 vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval)
1464 struct vm_rtc_data rtcdata;
1467 bzero(&rtcdata, sizeof(struct vm_rtc_data));
1468 rtcdata.offset = offset;
1469 error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata);
1471 *retval = rtcdata.value;
1476 vm_rtc_settime(struct vmctx *ctx, time_t secs)
1478 struct vm_rtc_time rtctime;
1481 bzero(&rtctime, sizeof(struct vm_rtc_time));
1482 rtctime.secs = secs;
1483 error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime);
1488 vm_rtc_gettime(struct vmctx *ctx, time_t *secs)
1490 struct vm_rtc_time rtctime;
1493 bzero(&rtctime, sizeof(struct vm_rtc_time));
1494 error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime);
1496 *secs = rtctime.secs;
1501 vm_restart_instruction(void *arg, int vcpu)
1503 struct vmctx *ctx = arg;
1505 return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu));
1509 vm_set_topology(struct vmctx *ctx,
1510 uint16_t sockets, uint16_t cores, uint16_t threads, uint16_t maxcpus)
1512 struct vm_cpu_topology topology;
1514 bzero(&topology, sizeof (struct vm_cpu_topology));
1515 topology.sockets = sockets;
1516 topology.cores = cores;
1517 topology.threads = threads;
1518 topology.maxcpus = maxcpus;
1519 return (ioctl(ctx->fd, VM_SET_TOPOLOGY, &topology));
1523 vm_get_topology(struct vmctx *ctx,
1524 uint16_t *sockets, uint16_t *cores, uint16_t *threads, uint16_t *maxcpus)
1526 struct vm_cpu_topology topology;
1529 bzero(&topology, sizeof (struct vm_cpu_topology));
1530 error = ioctl(ctx->fd, VM_GET_TOPOLOGY, &topology);
1532 *sockets = topology.sockets;
1533 *cores = topology.cores;
1534 *threads = topology.threads;
1535 *maxcpus = topology.maxcpus;
1541 vm_get_device_fd(struct vmctx *ctx)
1548 vm_get_ioctls(size_t *len)
1551 /* keep in sync with machine/vmm_dev.h */
1552 static const cap_ioctl_t vm_ioctl_cmds[] = { VM_RUN, VM_SUSPEND, VM_REINIT,
1553 VM_ALLOC_MEMSEG, VM_GET_MEMSEG, VM_MMAP_MEMSEG, VM_MMAP_MEMSEG,
1554 VM_MMAP_GETNEXT, VM_SET_REGISTER, VM_GET_REGISTER,
1555 VM_SET_SEGMENT_DESCRIPTOR, VM_GET_SEGMENT_DESCRIPTOR,
1556 VM_SET_REGISTER_SET, VM_GET_REGISTER_SET,
1557 VM_INJECT_EXCEPTION, VM_LAPIC_IRQ, VM_LAPIC_LOCAL_IRQ,
1558 VM_LAPIC_MSI, VM_IOAPIC_ASSERT_IRQ, VM_IOAPIC_DEASSERT_IRQ,
1559 VM_IOAPIC_PULSE_IRQ, VM_IOAPIC_PINCOUNT, VM_ISA_ASSERT_IRQ,
1560 VM_ISA_DEASSERT_IRQ, VM_ISA_PULSE_IRQ, VM_ISA_SET_IRQ_TRIGGER,
1561 VM_SET_CAPABILITY, VM_GET_CAPABILITY, VM_BIND_PPTDEV,
1562 VM_UNBIND_PPTDEV, VM_MAP_PPTDEV_MMIO, VM_PPTDEV_MSI,
1563 VM_PPTDEV_MSIX, VM_INJECT_NMI, VM_STATS, VM_STAT_DESC,
1564 VM_SET_X2APIC_STATE, VM_GET_X2APIC_STATE,
1565 VM_GET_HPET_CAPABILITIES, VM_GET_GPA_PMAP, VM_GLA2GPA,
1567 VM_ACTIVATE_CPU, VM_GET_CPUS, VM_SUSPEND_CPU, VM_RESUME_CPU,
1568 VM_SET_INTINFO, VM_GET_INTINFO,
1569 VM_RTC_WRITE, VM_RTC_READ, VM_RTC_SETTIME, VM_RTC_GETTIME,
1570 VM_RESTART_INSTRUCTION, VM_SET_TOPOLOGY, VM_GET_TOPOLOGY };
1573 cmds = malloc(sizeof(vm_ioctl_cmds));
1576 bcopy(vm_ioctl_cmds, cmds, sizeof(vm_ioctl_cmds));
1580 *len = nitems(vm_ioctl_cmds);