2 * Copyright (c) 2011 NetApp, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/sysctl.h>
34 #include <sys/ioctl.h>
36 #include <sys/_iovec.h>
37 #include <sys/cpuset.h>
39 #include <x86/segments.h>
40 #include <machine/specialreg.h>
52 #include <machine/vmm.h>
53 #include <machine/vmm_dev.h>
57 #define MB (1024 * 1024UL)
58 #define GB (1024 * 1024 * 1024UL)
61 * Size of the guard region before and after the virtual address space
62 * mapping the guest physical memory. This must be a multiple of the
63 * superpage size for performance reasons.
65 #define VM_MMAP_GUARD_SIZE (4 * MB)
67 #define PROT_RW (PROT_READ | PROT_WRITE)
68 #define PROT_ALL (PROT_READ | PROT_WRITE | PROT_EXEC)
72 uint32_t lowmem_limit;
80 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x)))
81 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x)))
84 vm_device_open(const char *name)
89 len = strlen("/dev/vmm/") + strlen(name) + 1;
91 assert(vmfile != NULL);
92 snprintf(vmfile, len, "/dev/vmm/%s", name);
94 /* Open the device file */
95 fd = open(vmfile, O_RDWR, 0);
102 vm_create(const char *name)
105 return (CREATE((char *)name));
109 vm_open(const char *name)
113 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1);
118 vm->lowmem_limit = 3 * GB;
119 vm->name = (char *)(vm + 1);
120 strcpy(vm->name, name);
122 if ((vm->fd = vm_device_open(vm->name)) < 0)
132 vm_destroy(struct vmctx *vm)
144 vm_parse_memsize(const char *optarg, size_t *ret_memsize)
150 optval = strtoul(optarg, &endptr, 0);
151 if (*optarg != '\0' && *endptr == '\0') {
153 * For the sake of backward compatibility if the memory size
154 * specified on the command line is less than a megabyte then
155 * it is interpreted as being in units of MB.
159 *ret_memsize = optval;
162 error = expand_number(optarg, ret_memsize);
168 vm_get_lowmem_limit(struct vmctx *ctx)
171 return (ctx->lowmem_limit);
175 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit)
178 ctx->lowmem_limit = limit;
182 vm_set_memflags(struct vmctx *ctx, int flags)
185 ctx->memflags = flags;
189 vm_get_memflags(struct vmctx *ctx)
192 return (ctx->memflags);
196 * Map segment 'segid' starting at 'off' into guest address range [gpa,gpa+len).
199 vm_mmap_memseg(struct vmctx *ctx, vm_paddr_t gpa, int segid, vm_ooffset_t off,
200 size_t len, int prot)
202 struct vm_memmap memmap;
206 memmap.segid = segid;
212 if (ctx->memflags & VM_MEM_F_WIRED)
213 memmap.flags |= VM_MEMMAP_F_WIRED;
216 * If this mapping already exists then don't create it again. This
217 * is the common case for SYSMEM mappings created by bhyveload(8).
219 error = vm_mmap_getnext(ctx, &gpa, &segid, &off, &len, &prot, &flags);
220 if (error == 0 && gpa == memmap.gpa) {
221 if (segid != memmap.segid || off != memmap.segoff ||
222 prot != memmap.prot || flags != memmap.flags) {
230 error = ioctl(ctx->fd, VM_MMAP_MEMSEG, &memmap);
235 vm_mmap_getnext(struct vmctx *ctx, vm_paddr_t *gpa, int *segid,
236 vm_ooffset_t *segoff, size_t *len, int *prot, int *flags)
238 struct vm_memmap memmap;
241 bzero(&memmap, sizeof(struct vm_memmap));
243 error = ioctl(ctx->fd, VM_MMAP_GETNEXT, &memmap);
246 *segid = memmap.segid;
247 *segoff = memmap.segoff;
250 *flags = memmap.flags;
256 * Return 0 if the segments are identical and non-zero otherwise.
258 * This is slightly complicated by the fact that only device memory segments
262 cmpseg(size_t len, const char *str, size_t len2, const char *str2)
266 if ((!str && !str2) || (str && str2 && !strcmp(str, str2)))
273 vm_alloc_memseg(struct vmctx *ctx, int segid, size_t len, const char *name)
275 struct vm_memseg memseg;
280 * If the memory segment has already been created then just return.
281 * This is the usual case for the SYSMEM segment created by userspace
282 * loaders like bhyveload(8).
284 error = vm_get_memseg(ctx, segid, &memseg.len, memseg.name,
285 sizeof(memseg.name));
289 if (memseg.len != 0) {
290 if (cmpseg(len, name, memseg.len, VM_MEMSEG_NAME(&memseg))) {
298 bzero(&memseg, sizeof(struct vm_memseg));
299 memseg.segid = segid;
302 n = strlcpy(memseg.name, name, sizeof(memseg.name));
303 if (n >= sizeof(memseg.name)) {
304 errno = ENAMETOOLONG;
309 error = ioctl(ctx->fd, VM_ALLOC_MEMSEG, &memseg);
314 vm_get_memseg(struct vmctx *ctx, int segid, size_t *lenp, char *namebuf,
317 struct vm_memseg memseg;
321 memseg.segid = segid;
322 error = ioctl(ctx->fd, VM_GET_MEMSEG, &memseg);
325 n = strlcpy(namebuf, memseg.name, bufsize);
327 errno = ENAMETOOLONG;
335 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char *base)
340 /* Map 'len' bytes starting at 'gpa' in the guest address space */
341 error = vm_mmap_memseg(ctx, gpa, VM_SYSMEM, gpa, len, PROT_ALL);
345 flags = MAP_SHARED | MAP_FIXED;
346 if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
349 /* mmap into the process address space on the host */
350 ptr = mmap(base + gpa, len, PROT_RW, flags, ctx->fd, gpa);
351 if (ptr == MAP_FAILED)
358 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms)
362 char *baseaddr, *ptr;
365 assert(vms == VM_MMAP_ALL);
368 * If 'memsize' cannot fit entirely in the 'lowmem' segment then
369 * create another 'highmem' segment above 4GB for the remainder.
371 if (memsize > ctx->lowmem_limit) {
372 ctx->lowmem = ctx->lowmem_limit;
373 ctx->highmem = memsize - ctx->lowmem_limit;
374 objsize = 4*GB + ctx->highmem;
376 ctx->lowmem = memsize;
378 objsize = ctx->lowmem;
381 error = vm_alloc_memseg(ctx, VM_SYSMEM, objsize, NULL);
386 * Stake out a contiguous region covering the guest physical memory
387 * and the adjoining guard regions.
389 len = VM_MMAP_GUARD_SIZE + objsize + VM_MMAP_GUARD_SIZE;
390 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER;
391 ptr = mmap(NULL, len, PROT_NONE, flags, -1, 0);
392 if (ptr == MAP_FAILED)
395 baseaddr = ptr + VM_MMAP_GUARD_SIZE;
396 if (ctx->highmem > 0) {
399 error = setup_memory_segment(ctx, gpa, len, baseaddr);
404 if (ctx->lowmem > 0) {
407 error = setup_memory_segment(ctx, gpa, len, baseaddr);
412 ctx->baseaddr = baseaddr;
418 * Returns a non-NULL pointer if [gaddr, gaddr+len) is entirely contained in
419 * the lowmem or highmem regions.
421 * In particular return NULL if [gaddr, gaddr+len) falls in guest MMIO region.
422 * The instruction emulation code depends on this behavior.
425 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len)
428 if (ctx->lowmem > 0) {
429 if (gaddr < ctx->lowmem && len <= ctx->lowmem &&
430 gaddr + len <= ctx->lowmem)
431 return (ctx->baseaddr + gaddr);
434 if (ctx->highmem > 0) {
436 if (gaddr < 4*GB + ctx->highmem &&
437 len <= ctx->highmem &&
438 gaddr + len <= 4*GB + ctx->highmem)
439 return (ctx->baseaddr + gaddr);
447 vm_get_lowmem_size(struct vmctx *ctx)
450 return (ctx->lowmem);
454 vm_get_highmem_size(struct vmctx *ctx)
457 return (ctx->highmem);
461 vm_create_devmem(struct vmctx *ctx, int segid, const char *name, size_t len)
463 char pathname[MAXPATHLEN];
466 int fd, error, flags;
470 if (name == NULL || strlen(name) == 0) {
475 error = vm_alloc_memseg(ctx, segid, len, name);
479 strlcpy(pathname, "/dev/vmm.io/", sizeof(pathname));
480 strlcat(pathname, ctx->name, sizeof(pathname));
481 strlcat(pathname, ".", sizeof(pathname));
482 strlcat(pathname, name, sizeof(pathname));
484 fd = open(pathname, O_RDWR);
489 * Stake out a contiguous region covering the device memory and the
490 * adjoining guard regions.
492 len2 = VM_MMAP_GUARD_SIZE + len + VM_MMAP_GUARD_SIZE;
493 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER;
494 base = mmap(NULL, len2, PROT_NONE, flags, -1, 0);
495 if (base == MAP_FAILED)
498 flags = MAP_SHARED | MAP_FIXED;
499 if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
502 /* mmap the devmem region in the host address space */
503 ptr = mmap(base + VM_MMAP_GUARD_SIZE, len, PROT_RW, flags, fd, 0);
511 vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
512 uint64_t base, uint32_t limit, uint32_t access)
515 struct vm_seg_desc vmsegdesc;
517 bzero(&vmsegdesc, sizeof(vmsegdesc));
518 vmsegdesc.cpuid = vcpu;
519 vmsegdesc.regnum = reg;
520 vmsegdesc.desc.base = base;
521 vmsegdesc.desc.limit = limit;
522 vmsegdesc.desc.access = access;
524 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc);
529 vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
530 uint64_t *base, uint32_t *limit, uint32_t *access)
533 struct vm_seg_desc vmsegdesc;
535 bzero(&vmsegdesc, sizeof(vmsegdesc));
536 vmsegdesc.cpuid = vcpu;
537 vmsegdesc.regnum = reg;
539 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc);
541 *base = vmsegdesc.desc.base;
542 *limit = vmsegdesc.desc.limit;
543 *access = vmsegdesc.desc.access;
549 vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc)
553 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit,
559 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
562 struct vm_register vmreg;
564 bzero(&vmreg, sizeof(vmreg));
569 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg);
574 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val)
577 struct vm_register vmreg;
579 bzero(&vmreg, sizeof(vmreg));
583 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg);
584 *ret_val = vmreg.regval;
589 vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit)
594 bzero(&vmrun, sizeof(vmrun));
597 error = ioctl(ctx->fd, VM_RUN, &vmrun);
598 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit));
603 vm_suspend(struct vmctx *ctx, enum vm_suspend_how how)
605 struct vm_suspend vmsuspend;
607 bzero(&vmsuspend, sizeof(vmsuspend));
609 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend));
613 vm_reinit(struct vmctx *ctx)
616 return (ioctl(ctx->fd, VM_REINIT, 0));
620 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid,
621 uint32_t errcode, int restart_instruction)
623 struct vm_exception exc;
627 exc.error_code = errcode;
628 exc.error_code_valid = errcode_valid;
629 exc.restart_instruction = restart_instruction;
631 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc));
635 vm_apicid2vcpu(struct vmctx *ctx, int apicid)
638 * The apic id associated with the 'vcpu' has the same numerical value
639 * as the 'vcpu' itself.
645 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector)
647 struct vm_lapic_irq vmirq;
649 bzero(&vmirq, sizeof(vmirq));
651 vmirq.vector = vector;
653 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq));
657 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector)
659 struct vm_lapic_irq vmirq;
661 bzero(&vmirq, sizeof(vmirq));
663 vmirq.vector = vector;
665 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq));
669 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg)
671 struct vm_lapic_msi vmmsi;
673 bzero(&vmmsi, sizeof(vmmsi));
677 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi));
681 vm_ioapic_assert_irq(struct vmctx *ctx, int irq)
683 struct vm_ioapic_irq ioapic_irq;
685 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
686 ioapic_irq.irq = irq;
688 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq));
692 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq)
694 struct vm_ioapic_irq ioapic_irq;
696 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
697 ioapic_irq.irq = irq;
699 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq));
703 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq)
705 struct vm_ioapic_irq ioapic_irq;
707 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
708 ioapic_irq.irq = irq;
710 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq));
714 vm_ioapic_pincount(struct vmctx *ctx, int *pincount)
717 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount));
721 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
723 struct vm_isa_irq isa_irq;
725 bzero(&isa_irq, sizeof(struct vm_isa_irq));
726 isa_irq.atpic_irq = atpic_irq;
727 isa_irq.ioapic_irq = ioapic_irq;
729 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq));
733 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
735 struct vm_isa_irq isa_irq;
737 bzero(&isa_irq, sizeof(struct vm_isa_irq));
738 isa_irq.atpic_irq = atpic_irq;
739 isa_irq.ioapic_irq = ioapic_irq;
741 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq));
745 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
747 struct vm_isa_irq isa_irq;
749 bzero(&isa_irq, sizeof(struct vm_isa_irq));
750 isa_irq.atpic_irq = atpic_irq;
751 isa_irq.ioapic_irq = ioapic_irq;
753 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq));
757 vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq,
758 enum vm_intr_trigger trigger)
760 struct vm_isa_irq_trigger isa_irq_trigger;
762 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger));
763 isa_irq_trigger.atpic_irq = atpic_irq;
764 isa_irq_trigger.trigger = trigger;
766 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger));
770 vm_inject_nmi(struct vmctx *ctx, int vcpu)
774 bzero(&vmnmi, sizeof(vmnmi));
777 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi));
784 { "hlt_exit", VM_CAP_HALT_EXIT },
785 { "mtrap_exit", VM_CAP_MTRAP_EXIT },
786 { "pause_exit", VM_CAP_PAUSE_EXIT },
787 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST },
788 { "enable_invpcid", VM_CAP_ENABLE_INVPCID },
793 vm_capability_name2type(const char *capname)
797 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) {
798 if (strcmp(capstrmap[i].name, capname) == 0)
799 return (capstrmap[i].type);
806 vm_capability_type2name(int type)
810 for (i = 0; capstrmap[i].name != NULL; i++) {
811 if (capstrmap[i].type == type)
812 return (capstrmap[i].name);
819 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
823 struct vm_capability vmcap;
825 bzero(&vmcap, sizeof(vmcap));
829 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap);
830 *retval = vmcap.capval;
835 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val)
837 struct vm_capability vmcap;
839 bzero(&vmcap, sizeof(vmcap));
844 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap));
848 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
850 struct vm_pptdev pptdev;
852 bzero(&pptdev, sizeof(pptdev));
857 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev));
861 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
863 struct vm_pptdev pptdev;
865 bzero(&pptdev, sizeof(pptdev));
870 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev));
874 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
875 vm_paddr_t gpa, size_t len, vm_paddr_t hpa)
877 struct vm_pptdev_mmio pptmmio;
879 bzero(&pptmmio, sizeof(pptmmio));
887 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio));
891 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
892 uint64_t addr, uint64_t msg, int numvec)
894 struct vm_pptdev_msi pptmsi;
896 bzero(&pptmsi, sizeof(pptmsi));
903 pptmsi.numvec = numvec;
905 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi));
909 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
910 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control)
912 struct vm_pptdev_msix pptmsix;
914 bzero(&pptmsix, sizeof(pptmsix));
922 pptmsix.vector_control = vector_control;
924 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix);
928 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
933 static struct vm_stats vmstats;
935 vmstats.cpuid = vcpu;
937 error = ioctl(ctx->fd, VM_STATS, &vmstats);
940 *ret_entries = vmstats.num_entries;
942 *ret_tv = vmstats.tv;
943 return (vmstats.statbuf);
949 vm_get_stat_desc(struct vmctx *ctx, int index)
951 static struct vm_stat_desc statdesc;
953 statdesc.index = index;
954 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0)
955 return (statdesc.desc);
961 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state)
964 struct vm_x2apic x2apic;
966 bzero(&x2apic, sizeof(x2apic));
969 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic);
970 *state = x2apic.state;
975 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state)
978 struct vm_x2apic x2apic;
980 bzero(&x2apic, sizeof(x2apic));
982 x2apic.state = state;
984 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic);
991 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
994 vcpu_reset(struct vmctx *vmctx, int vcpu)
997 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx;
998 uint32_t desc_access, desc_limit;
1004 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags);
1009 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0)
1013 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0)
1016 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0)
1020 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0)
1024 * CS: present, r/w, accessed, 16-bit, byte granularity, usable
1026 desc_base = 0xffff0000;
1027 desc_limit = 0xffff;
1028 desc_access = 0x0093;
1029 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS,
1030 desc_base, desc_limit, desc_access);
1035 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0)
1039 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity
1042 desc_limit = 0xffff;
1043 desc_access = 0x0093;
1044 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS,
1045 desc_base, desc_limit, desc_access);
1049 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS,
1050 desc_base, desc_limit, desc_access);
1054 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES,
1055 desc_base, desc_limit, desc_access);
1059 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS,
1060 desc_base, desc_limit, desc_access);
1064 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS,
1065 desc_base, desc_limit, desc_access);
1070 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0)
1072 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0)
1074 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0)
1076 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0)
1078 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0)
1081 /* General purpose registers */
1083 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0)
1085 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0)
1087 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0)
1089 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0)
1091 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0)
1093 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0)
1095 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0)
1097 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0)
1102 desc_limit = 0xffff;
1104 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR,
1105 desc_base, desc_limit, desc_access);
1109 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR,
1110 desc_base, desc_limit, desc_access);
1116 desc_limit = 0xffff;
1117 desc_access = 0x0000008b;
1118 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access);
1123 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0)
1128 desc_limit = 0xffff;
1129 desc_access = 0x00000082;
1130 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base,
1131 desc_limit, desc_access);
1136 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0)
1139 /* XXX cr2, debug registers */
1147 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
1150 struct vm_gpa_pte gpapte;
1152 bzero(&gpapte, sizeof(gpapte));
1155 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte);
1158 *num = gpapte.ptenum;
1159 for (i = 0; i < gpapte.ptenum; i++)
1160 pte[i] = gpapte.pte[i];
1167 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
1170 struct vm_hpet_cap cap;
1172 bzero(&cap, sizeof(struct vm_hpet_cap));
1173 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
1174 if (capabilities != NULL)
1175 *capabilities = cap.capabilities;
1180 vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1181 uint64_t gla, int prot, uint64_t *gpa, int *fault)
1183 struct vm_gla2gpa gg;
1186 bzero(&gg, sizeof(struct vm_gla2gpa));
1190 gg.paging = *paging;
1192 error = ioctl(ctx->fd, VM_GLA2GPA, &gg);
1201 #define min(a,b) (((a) < (b)) ? (a) : (b))
1205 vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
1206 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt,
1211 int error, i, n, off;
1213 for (i = 0; i < iovcnt; i++) {
1214 iov[i].iov_base = 0;
1220 error = vm_gla2gpa(ctx, vcpu, paging, gla, prot, &gpa, fault);
1221 if (error || *fault)
1224 off = gpa & PAGE_MASK;
1225 n = min(len, PAGE_SIZE - off);
1227 va = vm_map_gpa(ctx, gpa, n);
1243 vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt)
1250 vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len)
1258 assert(iov->iov_len);
1259 n = min(len, iov->iov_len);
1260 src = iov->iov_base;
1270 vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov,
1279 assert(iov->iov_len);
1280 n = min(len, iov->iov_len);
1281 dst = iov->iov_base;
1291 vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus)
1293 struct vm_cpuset vm_cpuset;
1296 bzero(&vm_cpuset, sizeof(struct vm_cpuset));
1297 vm_cpuset.which = which;
1298 vm_cpuset.cpusetsize = sizeof(cpuset_t);
1299 vm_cpuset.cpus = cpus;
1301 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset);
1306 vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus)
1309 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus));
1313 vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus)
1316 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus));
1320 vm_activate_cpu(struct vmctx *ctx, int vcpu)
1322 struct vm_activate_cpu ac;
1325 bzero(&ac, sizeof(struct vm_activate_cpu));
1327 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac);
1332 vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2)
1334 struct vm_intinfo vmii;
1337 bzero(&vmii, sizeof(struct vm_intinfo));
1339 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii);
1341 *info1 = vmii.info1;
1342 *info2 = vmii.info2;
1348 vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1)
1350 struct vm_intinfo vmii;
1353 bzero(&vmii, sizeof(struct vm_intinfo));
1356 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii);
1361 vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value)
1363 struct vm_rtc_data rtcdata;
1366 bzero(&rtcdata, sizeof(struct vm_rtc_data));
1367 rtcdata.offset = offset;
1368 rtcdata.value = value;
1369 error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata);
1374 vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval)
1376 struct vm_rtc_data rtcdata;
1379 bzero(&rtcdata, sizeof(struct vm_rtc_data));
1380 rtcdata.offset = offset;
1381 error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata);
1383 *retval = rtcdata.value;
1388 vm_rtc_settime(struct vmctx *ctx, time_t secs)
1390 struct vm_rtc_time rtctime;
1393 bzero(&rtctime, sizeof(struct vm_rtc_time));
1394 rtctime.secs = secs;
1395 error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime);
1400 vm_rtc_gettime(struct vmctx *ctx, time_t *secs)
1402 struct vm_rtc_time rtctime;
1405 bzero(&rtctime, sizeof(struct vm_rtc_time));
1406 error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime);
1408 *secs = rtctime.secs;
1413 vm_restart_instruction(void *arg, int vcpu)
1415 struct vmctx *ctx = arg;
1417 return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu));
1421 vm_get_device_fd(struct vmctx *ctx)
1428 vm_get_ioctls(size_t *len)
1431 /* keep in sync with machine/vmm_dev.h */
1432 static const cap_ioctl_t vm_ioctl_cmds[] = { VM_RUN, VM_SUSPEND, VM_REINIT,
1433 VM_ALLOC_MEMSEG, VM_GET_MEMSEG, VM_MMAP_MEMSEG, VM_MMAP_MEMSEG,
1434 VM_MMAP_GETNEXT, VM_SET_REGISTER, VM_GET_REGISTER,
1435 VM_SET_SEGMENT_DESCRIPTOR, VM_GET_SEGMENT_DESCRIPTOR,
1436 VM_INJECT_EXCEPTION, VM_LAPIC_IRQ, VM_LAPIC_LOCAL_IRQ,
1437 VM_LAPIC_MSI, VM_IOAPIC_ASSERT_IRQ, VM_IOAPIC_DEASSERT_IRQ,
1438 VM_IOAPIC_PULSE_IRQ, VM_IOAPIC_PINCOUNT, VM_ISA_ASSERT_IRQ,
1439 VM_ISA_DEASSERT_IRQ, VM_ISA_PULSE_IRQ, VM_ISA_SET_IRQ_TRIGGER,
1440 VM_SET_CAPABILITY, VM_GET_CAPABILITY, VM_BIND_PPTDEV,
1441 VM_UNBIND_PPTDEV, VM_MAP_PPTDEV_MMIO, VM_PPTDEV_MSI,
1442 VM_PPTDEV_MSIX, VM_INJECT_NMI, VM_STATS, VM_STAT_DESC,
1443 VM_SET_X2APIC_STATE, VM_GET_X2APIC_STATE,
1444 VM_GET_HPET_CAPABILITIES, VM_GET_GPA_PMAP, VM_GLA2GPA,
1445 VM_ACTIVATE_CPU, VM_GET_CPUS, VM_SET_INTINFO, VM_GET_INTINFO,
1446 VM_RTC_WRITE, VM_RTC_READ, VM_RTC_SETTIME, VM_RTC_GETTIME,
1447 VM_RESTART_INSTRUCTION };
1450 cmds = malloc(sizeof(vm_ioctl_cmds));
1453 bcopy(vm_ioctl_cmds, cmds, sizeof(vm_ioctl_cmds));
1457 *len = nitems(vm_ioctl_cmds);