1 from __future__ import print_function
3 from lldbsuite.test.lldbtest import *
4 from lldbsuite.test.decorators import *
5 from gdbclientutils import *
7 class TestTargetXMLArch(GDBRemoteTestBase):
9 @skipIfXmlSupportMissing
10 @expectedFailureAll(archs=["i386"])
14 Test lldb's parsing of the <architecture> tag in the target.xml register
17 class MyResponder(MockGDBServerResponder):
19 def qXferRead(self, obj, annex, offset, length):
20 if annex == "target.xml":
21 return """<?xml version="1.0"?>
22 <target version="1.0">
23 <architecture>i386:x86-64</architecture>
24 <feature name="org.gnu.gdb.i386.core">
26 <flags id="i386_eflags" size="4">
27 <field name="CF" start="0" end="0"/>
28 <field name="" start="1" end="1"/>
29 <field name="PF" start="2" end="2"/>
30 <field name="AF" start="4" end="4"/>
31 <field name="ZF" start="6" end="6"/>
32 <field name="SF" start="7" end="7"/>
33 <field name="TF" start="8" end="8"/>
34 <field name="IF" start="9" end="9"/>
35 <field name="DF" start="10" end="10"/>
36 <field name="OF" start="11" end="11"/>
37 <field name="NT" start="14" end="14"/>
38 <field name="RF" start="16" end="16"/>
39 <field name="VM" start="17" end="17"/>
40 <field name="AC" start="18" end="18"/>
41 <field name="VIF" start="19" end="19"/>
42 <field name="VIP" start="20" end="20"/>
43 <field name="ID" start="21" end="21"/>
46 <reg name="rax" bitsize="64" regnum="0" type="int" group="general"/>
47 <reg name="rbx" bitsize="64" regnum="1" type="int" group="general"/>
48 <reg name="rcx" bitsize="64" regnum="2" type="int" group="general"/>
49 <reg name="rdx" bitsize="64" regnum="3" type="int" group="general"/>
50 <reg name="rsi" bitsize="64" regnum="4" type="int" group="general"/>
51 <reg name="rdi" bitsize="64" regnum="5" type="int" group="general"/>
52 <reg name="rbp" bitsize="64" regnum="6" type="data_ptr" group="general"/>
53 <reg name="rsp" bitsize="64" regnum="7" type="data_ptr" group="general"/>
54 <reg name="r8" bitsize="64" regnum="8" type="int" group="general"/>
55 <reg name="r9" bitsize="64" regnum="9" type="int" group="general"/>
56 <reg name="r10" bitsize="64" regnum="10" type="int" group="general"/>
57 <reg name="r11" bitsize="64" regnum="11" type="int" group="general"/>
58 <reg name="r12" bitsize="64" regnum="12" type="int" group="general"/>
59 <reg name="r13" bitsize="64" regnum="13" type="int" group="general"/>
60 <reg name="r14" bitsize="64" regnum="14" type="int" group="general"/>
61 <reg name="r15" bitsize="64" regnum="15" type="int" group="general"/>
62 <reg name="rip" bitsize="64" regnum="16" type="code_ptr" group="general"/>
63 <reg name="eflags" bitsize="32" regnum="17" type="i386_eflags" group="general"/>
65 <reg name="cs" bitsize="32" regnum="18" type="int" group="general"/>
66 <reg name="ss" bitsize="32" regnum="19" type="int" group="general"/>
67 <reg name="ds" bitsize="32" regnum="20" type="int" group="general"/>
68 <reg name="es" bitsize="32" regnum="21" type="int" group="general"/>
69 <reg name="fs" bitsize="32" regnum="22" type="int" group="general"/>
70 <reg name="gs" bitsize="32" regnum="23" type="int" group="general"/>
72 <reg name="st0" bitsize="80" regnum="24" type="i387_ext" group="float"/>
73 <reg name="st1" bitsize="80" regnum="25" type="i387_ext" group="float"/>
74 <reg name="st2" bitsize="80" regnum="26" type="i387_ext" group="float"/>
75 <reg name="st3" bitsize="80" regnum="27" type="i387_ext" group="float"/>
76 <reg name="st4" bitsize="80" regnum="28" type="i387_ext" group="float"/>
77 <reg name="st5" bitsize="80" regnum="29" type="i387_ext" group="float"/>
78 <reg name="st6" bitsize="80" regnum="30" type="i387_ext" group="float"/>
79 <reg name="st7" bitsize="80" regnum="31" type="i387_ext" group="float"/>
81 <reg name="fctrl" bitsize="32" regnum="32" type="int" group="float"/>
82 <reg name="fstat" bitsize="32" regnum="33" type="int" group="float"/>
83 <reg name="ftag" bitsize="32" regnum="34" type="int" group="float"/>
84 <reg name="fiseg" bitsize="32" regnum="35" type="int" group="float"/>
85 <reg name="fioff" bitsize="32" regnum="36" type="int" group="float"/>
86 <reg name="foseg" bitsize="32" regnum="37" type="int" group="float"/>
87 <reg name="fooff" bitsize="32" regnum="38" type="int" group="float"/>
88 <reg name="fop" bitsize="32" regnum="39" type="int" group="float"/>
98 return "T05thread:00000001;06:9038d60f00700000;07:98b4062680ffffff;10:c0d7bf1b80ffffff;"
100 def readRegister(self, register):
101 regs = {0x0: "00b0060000610000",
102 0xa: "68fe471c80ffffff",
103 0xc: "60574a1c80ffffff",
104 0xd: "18f3042680ffffff",
105 0xe: "be8a4d7142000000",
106 0xf: "50df471c80ffffff",
107 0x10: "c0d7bf1b80ffffff" }
109 return regs[register]
111 return "0000000000000000"
113 self.server.responder = MyResponder()
114 interp = self.dbg.GetCommandInterpreter()
115 result = lldb.SBCommandReturnObject()
117 interp.HandleCommand("log enable gdb-remote packets", result)
118 target = self.dbg.CreateTarget('')
119 self.assertEqual('', target.GetTriple())
120 process = self.connect(target)
122 interp.HandleCommand("target list", result)
123 print(result.GetOutput())
124 self.assertTrue(target.GetTriple().startswith('x86_64--'))