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39 .Nd "Chelsio T4 10Gb and 1Gb Ethernet adapter driver"
41 To compile this driver into the kernel,
42 place the following lines in your
43 kernel configuration file:
44 .Bd -ragged -offset indent
48 To load the driver as a
49 module at boot time, place the following line in
51 .Bd -literal -offset indent
57 driver provides support for PCI Express Ethernet adapters based on
58 the Chelsio Terminator 4 (T4) ASIC.
59 The driver supports Jumbo Frames, Transmit/Receive checksum offload,
60 TCP segmentation offload (TSO), Large Receive Offload (LRO), VLAN
61 tag insertion/extraction, VLAN checksum offload, VLAN TSO, and
62 Receive Side Steering (RSS).
63 For further hardware information and questions related to hardware
65 .Pa http://www.chelsio.com/ .
67 For more information on configuring this device, see
72 driver supports 10Gb and 1Gb Ethernet adapters based on the T4 ASIC:
97 Tunables can be set at the
99 prompt before booting the kernel or stored in
101 .Bl -tag -width indent
102 .It Va hw.cxgbe.ntxq10g
103 The number of tx queues to use for a 10Gb port.
104 The default is 16 or the number
105 of CPU cores in the system, whichever is less.
106 .It Va hw.cxgbe.nrxq10g
107 The number of rx queues to use for a 10Gb port.
108 The default is 8 or the number
109 of CPU cores in the system, whichever is less.
110 .It Va hw.cxgbe.ntxq1g
111 The number of tx queues to use for a 1Gb port.
112 The default is 4 or the number
113 of CPU cores in the system, whichever is less.
114 .It Va hw.cxgbe.nrxq1g
115 The number of rx queues to use for a 1Gb port.
116 The default is 2 or the number
117 of CPU cores in the system, whichever is less.
118 .It Va hw.cxgbe.nofldtxq10g
119 The number of TOE tx queues to use for a 10Gb port.
120 The default is 8 or the
121 number of CPU cores in the system, whichever is less.
122 .It Va hw.cxgbe.nofldrxq10g
123 The number of TOE rx queues to use for a 10Gb port.
124 The default is 2 or the
125 number of CPU cores in the system, whichever is less.
126 .It Va hw.cxgbe.nofldtxq1g
127 The number of TOE tx queues to use for a 1Gb port.
128 The default is 2 or the
129 number of CPU cores in the system, whichever is less.
130 .It Va hw.cxgbe.nofldrxq1g
131 The number of TOE rx queues to use for a 1Gb port.
133 .It Va hw.cxgbe.holdoff_timer_idx_10G
134 .It Va hw.cxgbe.holdoff_timer_idx_1G
135 The timer index value to use to delay interrupts.
136 The holdoff timer list has the values 1, 5, 10, 50, 100, and 200
137 by default (all values are in microseconds) and the index selects a
138 value from this list.
139 The default value is 1 for both 10Gb and 1Gb ports, which means the
141 Different cxgbe interfaces can be assigned different values at any time via the
142 dev.cxgbe.X.holdoff_tmr_idx sysctl.
143 .It Va hw.cxgbe.holdoff_pktc_idx_10G
144 .It Va hw.cxgbe.holdoff_pktc_idx_1G
145 The packet-count index value to use to delay interrupts.
146 The packet-count list has the values 1, 8, 16, and 32 by default
147 and the index selects a value from this list.
148 The default value is 2 for both 10Gb and 1Gb ports, which means 16
149 packets (or the holdoff timer going off) before an interrupt is
151 -1 disables packet counting.
152 Different cxgbe interfaces can be assigned different values via the
153 dev.cxgbe.X.holdoff_pktc_idx sysctl.
154 This sysctl works only when the interface has never been marked up (as done by
156 .It Va hw.cxgbe.qsize_txq
157 The size, in number of entries, of the descriptor ring used for a tx
159 A buf_ring of the same size is also allocated for additional
163 The default value is 1024.
164 Different cxgbe interfaces can be assigned different values via the
165 dev.cxgbe.X.qsize_txq sysctl.
166 This sysctl works only when the interface has never been marked up (as done by
168 .It Va hw.cxgbe.qsize_rxq
169 The size, in number of entries, of the descriptor ring used for an
171 The default value is 1024.
172 Different cxgbe interfaces can be assigned different values via the
173 dev.cxgbe.X.qsize_rxq sysctl.
174 This sysctl works only when the interface has never been marked up (as done by
176 .It Va hw.cxgbe.interrupt_types
177 The interrupt types that the driver is allowed to use.
178 Bit 0 represents INTx (line interrupts), bit 1 MSI, bit 2 MSI-X.
179 The default is 7 (all allowed).
180 The driver will select the best possible type out of the allowed types by
182 .It Va hw.cxgbe.config_file
183 Select a pre-packaged device configuration file.
184 A configuration file contains a recipe for partitioning and configuring the
185 hardware resources on the card.
186 This tunable is for specialized applications only and should not be used in
188 The configuration profile currently in use is available in the dev.t4nex.X.cf
189 and dev.t4nex.X.cfcsum sysctls.
190 .It Va hw.cxgbe.linkcaps_allowed
191 .It Va hw.cxgbe.niccaps_allowed
192 .It Va hw.cxgbe.toecaps_allowed
193 .It Va hw.cxgbe.rdmacaps_allowed
194 .It Va hw.cxgbe.iscsicaps_allowed
195 .It Va hw.cxgbe.fcoecaps_allowed
196 Disallowing capabilities provides a hint to the driver and firmware to not
197 reserve hardware resources for that feature.
198 Each of these is a bit field with a bit for each sub-capability within the
200 This tunable is for specialized applications only and should not be used in
202 The capabilities for which hardware resources have been reserved are listed in
203 dev.t4nex.X.*caps sysctls.
206 For general information and support,
207 go to the Chelsio support website at:
208 .Pa http://www.chelsio.com/ .
210 If an issue is identified with this driver with a supported adapter,
211 email all the specific information related to the issue to
212 .Aq support@chelsio.com .
223 device driver first appeared in
229 driver was written by
230 .An Navdeep Parhar Aq np@FreeBSD.org .