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33 .Nd I2C generic I/O device driver
41 device driver provides generic I/O to any
44 In order to control I2C devices, use
48 .Bl -tag -width ".Dv I2CRPTSTART"
50 .Pq Vt "struct iiccmd"
51 Sends the start condition to the slave specified by the
56 element consists of a 7-bit address and a read/write bit
57 (that is, a 7-bit address << 1 | r/w).
58 A read operation is initiated when the read/write bit is set, or a write
59 operation when it is cleared.
60 All other elements are ignored.
61 If successful, the file descriptor receives exclusive
62 ownership of the underlying iicbus instance.
64 .Pq Vt "struct iiccmd"
65 Sends the repeated start condition to the slave specified by the
68 The slave address should be specified as in
70 All other elements are ignored.
72 must have previously been issued on the same file descriptor.
74 No argument is passed.
75 Sends the stop condition to the bus.
78 was previously issued on the file descriptor, the current transaction is
79 terminated and exclusive ownership of the underlying iicbus instance is
81 Otherwise, no action is performed.
83 .Pq Vt "struct iiccmd"
85 The argument is completely ignored.
86 This command does not require
88 to have been previously issued on the file descriptor.
89 If it was previously issued, exclusive ownership of the underlying iicbus
92 .Pq Vt "struct iiccmd"
95 The bus must already be started by a previous
97 on the file descriptor.
103 element is the number of bytes to write.
106 element is a boolean flag.
107 It is non-zero when additional write commands will follow.
110 element is a pointer to the data to write to the bus.
112 .Pq Vt "struct iiccmd"
115 The bus must already be started by a previous
117 on the file descriptor.
123 element is the number of bytes to write.
126 element is a boolean flag.
127 It is non-zero when additional write commands will follow.
130 element is a pointer to where to store the data read from the bus.
131 Short reads on the bus produce undefined results.
133 .Pq Vt "struct iic_rdwr_data"
134 Generic read/write interface.
135 Allows for an arbitrary number of commands to be sent to
136 an arbitrary number of devices on the bus.
137 Any previous transaction started by
139 must be terminated by
145 can be issued on the same file descriptor.
146 A read transfer is specified if
150 Otherwise the transfer is a write transfer.
153 element specifies the 7-bit address with the read/write bit for the transfer.
154 The read/write bit will be handled by the iicbus stack based on the specified
158 element is the number of
159 .Pq Vt "struct iic_msg"
161 .Pq Vt "struct iic_rdwr_data" .
164 element is a buffer for that data.
165 This ioctl is intended to be
170 Associate the specified address with the file descriptor for use by
176 The argument is an 8-bit address (that is, a 7-bit address << 1).
177 The read/write bit in the least-significant position is ignored.
178 Any subsequent read or write operation will set or clear that bit as needed.
181 The following data structures are defined in
183 and referenced above:
184 .Bd -literal -offset indent
192 /* Designed to be compatible with linux's struct i2c_msg */
197 #define IIC_M_WR 0 /* Fake flag for write */
198 #define IIC_M_RD 0x0001 /* read vs write */
199 #define IIC_M_NOSTOP 0x0002 /* do not send a I2C stop after message */
200 #define IIC_M_NOSTART 0x0004 /* do not send a I2C start before message */
201 uint16_t len; /* msg length */
205 struct iic_rdwr_data {
206 struct iic_msg *msgs;
211 It is also possible to use
215 in which case the I2C start/stop handshake is managed by
217 The address used for the read/write operation is the one passed to the most
227 Closing the file descriptor clears any addressing state established by a
232 stops any transaction established by a not-yet-terminated
234 and releases iicbus ownership.
235 Because addressing state is stored on a per-file-descriptor basis, it is
236 permissible for multiple file descriptors to be simultaneously open on the
240 Concurrent transactions on those descriptors are synchronized by the
241 exclusive-ownership requests issued to the underlying iicbus instance.
250 manual page first appeared in
255 manual page was written by