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32 .Nd Intel I/O Acceleration Technology
34 To compile this driver into your kernel,
35 place the following line in your kernel configuration file:
36 .Bd -ragged -offset indent
40 Or, to load the driver as a module at boot, place the following line in
42 .Bd -literal -offset indent
49 .Cd hw.ioat.force_legacy_interrupts=0
55 .Cd hw.ioat.enable_ioat_test=0
56 .Cd hw.ioat.debug_level=0
57 (only critical errors; maximum of 3)
60 .Fn (*bus_dmaengine_callback_t) "void *arg" "int error"
63 .Fn ioat_get_dmaengine "uint32_t channel_index"
65 .Fn ioat_put_dmaengine "bus_dmaengine_t dmaengine"
67 .Fn ioat_get_hwversion "bus_dmaengine_t dmaengine"
69 .Fn ioat_get_max_io_size "bus_dmaengine_t dmaengine"
71 .Fn ioat_set_interrupt_coalesce "bus_dmaengine_t dmaengine" "uint16_t delay"
73 .Fn ioat_get_max_coalesce_period "bus_dmaengine_t dmaengine"
75 .Fn ioat_acquire "bus_dmaengine_t dmaengine"
77 .Fn ioat_acquire_reserve "bus_dmaengine_t dmaengine" "uint32_t n" "int mflags"
79 .Fn ioat_release "bus_dmaengine_t dmaengine"
80 .Ft struct bus_dmadesc *
82 .Fa "bus_dmaengine_t dmaengine"
86 .Fa "bus_dmaengine_callback_t callback_fn"
87 .Fa "void *callback_arg"
90 .Ft struct bus_dmadesc *
91 .Fo ioat_copy_8k_aligned
92 .Fa "bus_dmaengine_t dmaengine"
97 .Fa "bus_dmaengine_callback_t callback_fn"
98 .Fa "void *callback_arg"
101 .Ft struct bus_dmadesc *
103 .Fa "bus_dmaengine_t dmaengine"
105 .Fa "uint64_t fillpattern"
107 .Fa "bus_dmaengine_callback_t callback_fn"
108 .Fa "void *callback_arg"
111 .Ft struct bus_dmadesc *
113 .Fa "bus_dmaengine_t dmaengine"
114 .Fa "bus_dmaengine_callback_t callback_fn"
115 .Fa "void *callback_arg"
121 driver provides a kernel API to a variety of DMA engines on some Intel server
124 There is a number of DMA channels per CPU package.
126 Each may be used independently.
127 Operations on a single channel proceed sequentially.
129 Blockfill operations can be used to write a 64-bit pattern to memory.
131 Copy operations can be used to offload memory copies to the DMA engines.
133 Null operations do nothing, but may be used to test the interrupt and callback
136 All operations can optionally trigger an interrupt at completion with the
139 For example, a user might submit multiple operations to the same channel and
140 only enable an interrupt and callback for the last operation.
142 The hardware can delay and coalesce interrupts on a given channel for a
143 configurable period of time, in microseconds.
144 This may be desired to reduce the processing and interrupt overhead per
145 descriptor, especially for workflows consisting of many small operations.
146 Software can control this on a per-channel basis with the
147 .Fn ioat_set_interrupt_coalesce
150 .Fn ioat_get_max_coalesce_period
151 API can be used to determine the maximum coalescing period supported by the
152 hardware, in microseconds.
153 Current platforms support up to a 16.383 millisecond coalescing period.
154 Optimal configuration will vary by workflow and desired operation latency.
156 All operations are safe to use in a non-blocking context with the
159 (Of course, allocations may fail and operations requested with
163 Operations that depend on the result of prior operations should use
165 For example, such a scenario can happen when two related DMA operations are
167 First, a DMA copy to one location (A), followed directly by a DMA copy
169 In this scenario, some classes of I/OAT hardware may prefetch A for the second
170 operation before it is written by the first operation.
171 To avoid reading a stale value in sequences of dependent operations, use
174 All operations, as well as
175 .Fn ioat_get_dmaengine ,
176 can return NULL in special circumstances.
179 driver is being unloaded, or the administrator has induced a hardware reset, or
180 a usage error has resulted in a hardware error state that needs to be recovered
183 It is invalid to attempt to submit new DMA operations in a
184 .Fa bus_dmaengine_callback_t
187 A typical user will lookup the DMA engine object for a given channel with
188 .Fn ioat_get_dmaengine .
189 When the user wants to offload a copy, they will first
193 object for exclusive access to enqueue operations on that channel.
194 Optionally, the user can reserve space by using
195 .Fn ioat_acquire_reserve
198 .Fn ioat_acquire_reserve
199 succeeds, there is guaranteed to be room for
201 new operations in the internal ring buffer.
202 Then, they will submit one or more operations using
207 After queuing one or more individual DMA operations, they will
211 to drop their exclusive access to the channel.
212 The routine they provided for the
214 argument will be invoked with the provided
216 when the operation is complete.
217 When they are finished with the
218 .Ar bus_dmaengine_t ,
220 .Fn ioat_put_dmaengine .
222 Users MUST NOT block between
226 Users SHOULD NOT hold
228 references for a very long time to enable fault recovery and kernel module
231 For an example of usage, see
232 .Pa src/sys/dev/ioat/ioat_test.c .
235 .It Pa /dev/ioat_test
244 driver first appeared in
249 driver was developed by
250 .An \&Jim Harris Aq Mt jimharris@FreeBSD.org ,
251 .An \&Carl Delsey Aq Mt carl.r.delsey@intel.com ,
253 .An \&Conrad Meyer Aq Mt cem@FreeBSD.org .
254 This manual page was written by
255 .An \&Conrad Meyer Aq Mt cem@FreeBSD.org .
257 Copy operation takes bus addresses as parameters, not virtual addresses.
259 Buffers for individual copy operations must be physically contiguous.
261 Copies larger than max transfer size (1MB, but may vary by hardware) are not
263 Future versions will likely support this by breaking up the transfer into
268 driver only supports blockfill, copy, and null operations at this time.
269 The driver does not yet support advanced DMA modes, such as XOR, that some
270 I/OAT devices support.