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30 .\" nvme driver man page.
32 .\" Author: Jim Harris <jimharris@FreeBSD.org>
41 .Nd NVM Express core driver
43 To compile this driver into your kernel,
44 place the following line in your kernel configuration file:
45 .Bd -ragged -offset indent
49 Or, to load the driver as a module at boot, place the following line in
51 .Bd -literal -offset indent
55 Most users will also want to enable
59 to expose NVM Express namespaces as disk devices which can be
61 Note that in NVM Express terms, a namespace is roughly equivalent to a
66 driver provides support for NVM Express (NVMe) controllers, such as:
69 Hardware initialization
71 Per-CPU IO queue pairs
73 API for registering NVMe namespace consumers such as
78 API for submitting NVM commands to namespaces
80 Ioctls for controller and namespace configuration and management
85 driver creates controller device nodes in the format
87 and namespace device nodes in
90 Note that the NVM Express specification starts numbering namespaces at 1,
91 not 0, and this driver follows that convention.
95 will create an I/O queue pair for each CPU, provided enough MSI-X vectors
96 and NVMe queue pairs can be allocated.
97 If not enough vectors or queue
98 pairs are available, nvme(4) will use a smaller number of queue pairs and
99 assign multiple CPUs per queue pair.
101 To force a single I/O queue pair shared by all CPUs, set the following
104 .Bd -literal -offset indent
105 hw.nvme.per_cpu_io_queues=0
108 To assign more than one CPU per I/O queue pair, thereby reducing the number
109 of MSI-X vectors consumed by the device, set the following tunable value in
111 .Bd -literal -offset indent
112 hw.nvme.min_cpus_per_ioq=X
115 To force legacy interrupts for all
117 driver instances, set the following tunable value in
119 .Bd -literal -offset indent
123 Note that use of INTx implies disabling of per-CPU I/O queue pairs.
125 To control maximum amount of system RAM in bytes to use as Host Memory
126 Buffer for capable devices, set the following tunable:
127 .Bd -literal -offset indent
131 The default value is 5% of physical memory size per device.
135 driver is used to provide a disk driver to the system by default.
138 driver can also be used instead.
141 driver performs better with smaller transactions and few TRIM
143 It sends all commands directly to the drive immediately.
146 driver performs better with larger transactions and also collapses
147 TRIM commands giving better performance.
148 It can queue commands to the drive; combine
150 commands into a single trip; and
151 use the CAM I/O scheduler to bias one type of operation over another.
154 driver, set the following tunable value in
156 .Bd -literal -offset indent
157 hw.nvme.verbose_cmd_dump=1
161 The following controller-level sysctls are currently implemented:
162 .Bl -tag -width indent
163 .It Va dev.nvme.0.num_cpus_per_ioq
164 (R) Number of CPUs associated with each I/O queue pair.
165 .It Va dev.nvme.0.int_coal_time
166 (R/W) Interrupt coalescing timer period in microseconds.
168 .It Va dev.nvme.0.int_coal_threshold
169 (R/W) Interrupt coalescing threshold in number of command completions.
173 The following queue pair-level sysctls are currently implemented.
174 Admin queue sysctls take the format of dev.nvme.0.adminq and I/O queue sysctls
175 take the format of dev.nvme.0.ioq0.
176 .Bl -tag -width indent
177 .It Va dev.nvme.0.ioq0.num_entries
178 (R) Number of entries in this queue pair's command and completion queue.
179 .It Va dev.nvme.0.ioq0.num_tr
180 (R) Number of nvme_tracker structures currently allocated for this queue pair.
181 .It Va dev.nvme.0.ioq0.num_prp_list
182 (R) Number of nvme_prp_list structures currently allocated for this queue pair.
183 .It Va dev.nvme.0.ioq0.sq_head
184 (R) Current location of the submission queue head pointer as observed by
186 The head pointer is incremented by the controller as it takes commands off
187 of the submission queue.
188 .It Va dev.nvme.0.ioq0.sq_tail
189 (R) Current location of the submission queue tail pointer as observed by
191 The driver increments the tail pointer after writing a command
192 into the submission queue to signal that a new command is ready to be
194 .It Va dev.nvme.0.ioq0.cq_head
195 (R) Current location of the completion queue head pointer as observed by
197 The driver increments the head pointer after finishing
198 with a completion entry that was posted by the controller.
199 .It Va dev.nvme.0.ioq0.num_cmds
200 (R) Number of commands that have been submitted on this queue pair.
201 .It Va dev.nvme.0.ioq0.dump_debug
202 (W) Writing 1 to this sysctl will dump the full contents of the submission
203 and completion queues to the console.
206 In addition to the typical pci attachment, the
208 driver supports attaching to a
211 Intel's Rapid Storage Technology (RST) hides the nvme device
212 behind the AHCI device due to limitations in Windows.
213 However, this effectively hides it from the
216 To work around this limitation,
218 detects that the AHCI device supports RST and when it is enabled.
231 driver first appeared in
237 driver was developed by Intel and originally written by
238 .An Jim Harris Aq Mt jimharris@FreeBSD.org ,
239 with contributions from
243 This man page was written by
244 .An Jim Harris Aq Mt jimharris@FreeBSD.org .