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34 .Nd Architecture-specific details
36 Differences between CPU architectures and platforms supported by
39 This document is a quick reference of key ABI details of
42 For full details consult the processor-specific ABI supplement
45 If not explicitly mentioned, sizes are in bytes.
46 The architecture details in this document apply to
48 and later, unless otherwise noted.
51 uses a flat address space.
57 and pointers all have the same representation.
59 In order to maximize compatibility with future pointer integrity mechanisms,
60 manipulations of pointers as integers should be performed via
71 On some architectures, e.g.,
76 the kernel uses a separate address space.
77 On other architectures, kernel and a user mode process share a
79 The kernel is located at the highest addresses.
81 On each architecture, the main user mode thread's stack starts near
82 the highest user address and grows down.
85 architecture support varies by release.
86 This table shows the first
88 release to support each architecture, and, for discontinued
89 architectures, the final release.
91 .Bl -column -offset indent "Architecture" "Initial Release" "Final Release"
92 .It Sy Architecture Ta Sy Initial Release Ta Sy Final Release
94 .It alpha Ta 3.2 Ta 6.4
96 .It arm Ta 6.0 Ta 12.x
97 .It armeb Ta 8.0 Ta 11.x
100 .It ia64 Ta 5.0 Ta 10.4
109 .It mips64elhf Ta 12.0
111 .It pc98 Ta 2.2 Ta 11.x
113 .It powerpcspe Ta 12.0
116 .It riscv64sf Ta 12.0
117 .It sparc64 Ta 5.0 Ta 12.x
122 architectures use some variant of the ELF (see
124 .Sy Application Binary Interface
125 (ABI) for the machine processor.
126 All supported ABIs can be divided into two groups:
127 .Bl -tag -width "Dv ILP32"
132 types machine representations all have 4-byte size.
135 type machine representation uses 4 bytes,
143 Some machines support more than one
146 Typically these are 64-bit machines, where the
149 execution environment is accompanied by the
152 environment, which was the historical 32-bit predecessor for 64-bit evolution.
154 .Bl -column -offset indent "powerpc64" "ILP32 counterpart"
155 .It Sy LP64 Ta Sy ILP32 counterpart
156 .It Dv amd64 Ta Dv i386
157 .It Dv powerpc64 Ta Dv powerpc
158 .It Dv mips64* Ta Dv mips*
162 currently does not support execution of
166 binaries, even if the CPU implements
170 On all supported architectures:
171 .Bl -column -offset -indent "long long" "Size"
172 .It Sy Type Ta Sy Size
175 .It long Ta sizeof(void*)
181 Integers are represented in two's complement.
182 Alignment of integer and pointer types is natural, that is,
183 the address of the variable must be congruent to zero modulo the type size.
184 Most ILP32 ABIs, except
186 require only 4-byte alignment for 64-bit integers.
188 Machine-dependent type sizes:
189 .Bl -column -offset indent "Architecture" "void *" "long double" "time_t"
190 .It Sy Architecture Ta Sy void * Ta Sy long double Ta Sy time_t
191 .It aarch64 Ta 8 Ta 16 Ta 8
192 .It amd64 Ta 8 Ta 16 Ta 8
193 .It arm Ta 4 Ta 8 Ta 8
194 .It armv6 Ta 4 Ta 8 Ta 8
195 .It i386 Ta 4 Ta 12 Ta 4
196 .It mips Ta 4 Ta 8 Ta 8
197 .It mipsel Ta 4 Ta 8 Ta 8
198 .It mipselhf Ta 4 Ta 8 Ta 8
199 .It mipshf Ta 4 Ta 8 Ta 8
200 .It mipsn32 Ta 4 Ta 8 Ta 8
201 .It mips64 Ta 8 Ta 8 Ta 8
202 .It mips64el Ta 8 Ta 8 Ta 8
203 .It mips64elhf Ta 8 Ta 8 Ta 8
204 .It mips64hf Ta 8 Ta 8 Ta 8
205 .It powerpc Ta 4 Ta 8 Ta 8
206 .It powerpcspe Ta 4 Ta 8 Ta 8
207 .It powerpc64 Ta 8 Ta 8 Ta 8
208 .It riscv64 Ta 8 Ta 16 Ta 8
209 .It riscv64sf Ta 8 Ta 16 Ta 8
210 .It sparc64 Ta 8 Ta 16 Ta 8
214 is 8 bytes on all supported architectures except i386.
215 .Ss Endianness and Char Signedness
216 .Bl -column -offset indent "Architecture" "Endianness" "char Signedness"
217 .It Sy Architecture Ta Sy Endianness Ta Sy char Signedness
218 .It aarch64 Ta little Ta unsigned
219 .It amd64 Ta little Ta signed
220 .It arm Ta little Ta unsigned
221 .It armv6 Ta little Ta unsigned
222 .It armv7 Ta little Ta unsigned
223 .It i386 Ta little Ta signed
224 .It mips Ta big Ta signed
225 .It mipsel Ta little Ta signed
226 .It mipselhf Ta little Ta signed
227 .It mipshf Ta big Ta signed
228 .It mipsn32 Ta big Ta signed
229 .It mips64 Ta big Ta signed
230 .It mips64el Ta little Ta signed
231 .It mips64elhf Ta little Ta signed
232 .It mips64hf Ta big Ta signed
233 .It powerpc Ta big Ta unsigned
234 .It powerpcspe Ta big Ta unsigned
235 .It powerpc64 Ta big Ta unsigned
236 .It riscv64 Ta little Ta signed
237 .It riscv64sf Ta little Ta signed
238 .It sparc64 Ta big Ta signed
241 .Bl -column -offset indent "Architecture" "Page Sizes"
242 .It Sy Architecture Ta Sy Page Sizes
243 .It aarch64 Ta 4K, 2M, 1G
244 .It amd64 Ta 4K, 2M, 1G
248 .It i386 Ta 4K, 2M (PAE), 4M
261 .It riscv64 Ta 4K, 2M, 1G
262 .It riscv64sf Ta 4K, 2M, 1G
266 .Bl -column -offset indent "Architecture" "float, double" "long double"
267 .It Sy Architecture Ta Sy float, double Ta Sy long double
268 .It aarch64 Ta hard Ta soft, quad precision
269 .It amd64 Ta hard Ta hard, 80 bit
270 .It arm Ta soft Ta soft, double precision
271 .It armv6 Ta hard(1) Ta hard, double precision
272 .It armv7 Ta hard(1) Ta hard, double precision
273 .It i386 Ta hard Ta hard, 80 bit
274 .It mips Ta soft Ta identical to double
275 .It mipsel Ta soft Ta identical to double
276 .It mipselhf Ta hard Ta identical to double
277 .It mipshf Ta hard Ta identical to double
278 .It mipsn32 Ta soft Ta identical to double
279 .It mips64 Ta soft Ta identical to double
280 .It mips64el Ta soft Ta identical to double
281 .It mips64elhf Ta hard Ta identical to double
282 .It mips64hf Ta hard Ta identical to double
283 .It powerpc Ta hard Ta hard, double precision
284 .It powerpcspe Ta hard Ta hard, double precision
285 .It powerpc64 Ta hard Ta hard, double precision
286 .It riscv64 Ta hard Ta hard, quad precision
287 .It riscv64sf Ta soft Ta soft, quad precision
288 .It sparc64 Ta hard Ta hard, quad precision
293 armv6 used the softfp ABI even though it supported only processors
294 with a floating point unit.
295 .Ss Default Tool Chain
296 .Fx uses a variety of tool chain components for the supported CPU
301 provided by the base system,
306 or an external toolchain compiler and linker provided by a port or package.
307 This table shows the default tool chain for each architecture.
308 .Bl -column -offset indent "Architecture" "Compiler" "Linker"
309 .It Sy Architecture Ta Sy Compiler Ta Sy Linker
310 .It aarch64 Ta Clang Ta lld
311 .It amd64 Ta Clang Ta lld
312 .It arm Ta Clang Ta GNU ld 2.17.50
313 .It armv6 Ta Clang Ta lld
314 .It armv7 Ta Clang Ta lld
315 .It i386 Ta Clang Ta lld
316 .It mips Ta GCC 4.2.1 Ta GNU ld 2.17.50
317 .It mipsel Ta GCC 4.2.1 Ta GNU ld 2.17.50
318 .It mipselhf Ta GCC 4.2.1 Ta GNU ld 2.17.50
319 .It mipshf Ta GCC 4.2.1 Ta GNU ld 2.17.50
320 .It mipsn32 Ta GCC 4.2.1 Ta GNU ld 2.17.50
321 .It mips64 Ta GCC 4.2.1 Ta GNU ld 2.17.50
322 .It mips64el Ta GCC 4.2.1 Ta GNU ld 2.17.50
323 .It mips64elhf Ta GCC 4.2.1 Ta GNU ld 2.17.50
324 .It mips64hf Ta GCC 4.2.1 Ta GNU ld 2.17.50
325 .It powerpc Ta GCC 4.2.1 Ta GNU ld 2.17.50
326 .It powerpcspe Ta GCC 4.2.1 Ta GNU ld 2.17.50
327 .It powerpc64 Ta GCC 4.2.1 Ta GNU ld 2.17.50
328 .It riscv64 Ta Clang Ta lld
329 .It riscv64sf Ta Clang Ta lld
330 .It sparc64 Ta GCC 4.2.1 Ta GNU ld 2.17.50
333 Note that GCC 4.2.1 is deprecated, and scheduled for removal on 2020-03-31.
334 Any CPU architectures not migrated by then
335 (to either base system Clang or external toolchain)
336 may be removed from the tree after that date.
337 .Ss Predefined Macros
338 The compiler provides a number of predefined macros.
339 Some of these provide architecture-specific details and are explained below.
340 Other macros, including those required by the language standard, are not
343 The full set of predefined macros can be obtained with this command:
344 .Bd -literal -offset indent
345 cc -x c -dM -E /dev/null
348 Common type size and endianness macros:
349 .Bl -column -offset indent "BYTE_ORDER" "Meaning"
350 .It Sy Macro Ta Sy Meaning
351 .It Dv __LP64__ Ta 64-bit (8-byte) long and pointer, 32-bit (4-byte) int
352 .It Dv __ILP32__ Ta 32-bit (4-byte) int, long and pointer
353 .It Dv BYTE_ORDER Ta Either Dv BIG_ENDIAN or Dv LITTLE_ENDIAN .
359 Architecture-specific macros:
360 .Bl -column -offset indent "Architecture" "Predefined macros"
361 .It Sy Architecture Ta Sy Predefined macros
362 .It aarch64 Ta Dv __aarch64__
363 .It amd64 Ta Dv __amd64__, Dv __x86_64__
364 .It arm Ta Dv __arm__
365 .It armv6 Ta Dv __arm__, Dv __ARM_ARCH >= 6
366 .It armv7 Ta Dv __arm__, Dv __ARM_ARCH >= 7
367 .It i386 Ta Dv __i386__
368 .It mips Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32
369 .It mipsel Ta Dv __mips__, Dv __mips_o32
370 .It mipselhf Ta Dv __mips__, Dv __mips_o32
371 .It mipshf Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32
372 .It mipsn32 Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n32
373 .It mips64 Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n64
374 .It mips64el Ta Dv __mips__, Dv __mips_n64
375 .It mips64elhf Ta Dv __mips__, Dv __mips_n64
376 .It mips64hf Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n64
377 .It powerpc Ta Dv __powerpc__
378 .It powerpcspe Ta Dv __powerpc__, Dv __SPE__
379 .It powerpc64 Ta Dv __powerpc__, Dv __powerpc64__
380 .It riscv64 Ta Dv __riscv, Dv __riscv_xlen == 64
381 .It riscv64sf Ta Dv __riscv, Dv __riscv_xlen == 64, Dv __riscv_float_abi_soft
382 .It sparc64 Ta Dv __sparc64__
385 Compilers may define additional variants of architecture-specific macros.
386 The macros above are preferred for use in
388 .Ss Important Xr make 1 variables
389 Most of the externally settable variables are defined in the
392 These variables are not otherwise documented and are used extensively
394 .Bl -tag -width "MACHINE_CPUARCH"
396 Represents the hardware platform.
397 This is the same as the native platform's
401 It defines both the userland / kernel interface, as well as the
402 bootloader / kernel interface.
403 It should only be used in these contexts.
404 Each CPU architecture may have multiple hardware platforms it supports
408 It is used to collect together all the files from
411 It is often the same as
413 just as one CPU architecture can be implemented by many different
414 hardware platforms, one hardware platform may support multiple CPU
415 architecture family members, though with different binaries.
418 of i386 supported the IBM-AT hardware platform while the
420 of pc98 supported the Japanese company NEC's PC-9801 and PC-9821
422 Both of these hardware platforms supported only the
424 of i386 where they shared a common ABI, except for certain kernel /
425 userland interfaces relating to underlying hardware platform
426 differences in bus architecture, device enumeration and boot interface.
429 should only be used in src/sys and src/stand or in system imagers or
432 Represents the CPU processor architecture.
433 This is the same as the native platforms
437 It defines the CPU instruction family supported.
438 It may also encode a variation in the byte ordering of multi-byte
440 It may also encode a variation in the size of the integer or pointer.
441 It may also encode a ISA revision.
442 It may also encode hard versus soft floating point ABI and usage.
443 It may also encode a variant ABI when the other factors do not
444 uniquely define the ABI (e.g., MIPS' n32 ABI).
447 defines the ABI used by the system.
448 For example, the MIPS CPU processor family supports 9 different
449 combinations encoding pointer size, endian and hard versus soft float (for
450 8 combinations) as well as N32 (which only ever had one variation of
452 Generally, the plain CPU name specifies the most common (or at least
453 first) variant of the CPU.
454 This is why mips and mips64 imply 'big endian' while 'arm' and 'armv7'
456 If we ever were to support the so-called x32 ABI (using 32-bit
457 pointers on the amd64 architecture), it would most likely be encoded
459 It is unfortunate that amd64 specifies the 64-bit evolution of the x86
460 platform (it matches the 'first rule') as everybody else uses x86_64.
461 There is no standard name for the processor: each OS selects its own
463 .It Dv MACHINE_CPUARCH
464 Represents the source location for a given
468 is defined to be mips for all the flavors of mips that we support
469 since we support them all with a shared set of sources.
470 While amd64 and i386 are closely related, MACHINE_CPUARCH is not x86
472 The FreeBSD source base supports amd64 and i386 with two
473 distinct source bases living in subdirectories named amd64 and i386
474 (though behind the scenes there's some sharing that fits into this
480 It is used to optimize the build for a specific CPU / core that the
482 Generally, this does not change the ABI, though it can be a fine line
483 between optimization for specific cases.
487 in the top level Makefile for cross building.
488 Unused outside of that scope.
489 It is not passed down to the rest of the build.
490 Makefiles outside of the top level should not use it at all (though
491 some have their own private copy for hysterical raisons).
495 by the top level Makefile for cross building.
498 it is unused outside of that scope.
506 manual page appeared in