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29 .Dd September 22, 2020
34 .Nd Architecture-specific details
36 Differences between CPU architectures and platforms supported by
39 This document is a quick reference of key ABI details of
42 For full details consult the processor-specific ABI supplement
45 If not explicitly mentioned, sizes are in bytes.
46 The architecture details in this document apply to
48 and later, unless otherwise noted.
51 uses a flat address space.
57 and pointers all have the same representation.
59 In order to maximize compatibility with future pointer integrity mechanisms,
60 manipulations of pointers as integers should be performed via
71 On some architectures, e.g.,
75 the kernel uses a separate address space.
76 On other architectures, kernel and a user mode process share a
78 The kernel is located at the highest addresses.
80 On each architecture, the main user mode thread's stack starts near
81 the highest user address and grows down.
84 architecture support varies by release.
85 This table shows the first
87 release to support each architecture, and, for discontinued
88 architectures, the final release.
89 .Bl -column -offset indent "Architecture" "Initial Release" "Final Release"
90 .It Sy Architecture Ta Sy Initial Release Ta Sy Final Release
92 .It alpha Ta 3.2 Ta 6.4
94 .It arm Ta 6.0 Ta 12.x
95 .It armeb Ta 8.0 Ta 11.x
98 .It ia64 Ta 5.0 Ta 10.4
107 .It mips64elhf Ta 12.0
109 .It pc98 Ta 2.2 Ta 11.x
111 .It powerpcspe Ta 12.0
113 .It powerpc64le Ta 13.0
115 .It riscv64sf Ta 12.0
116 .It sparc64 Ta 5.0 Ta 12.x
121 architectures use some variant of the ELF (see
123 .Sy Application Binary Interface
124 (ABI) for the machine processor.
125 All supported ABIs can be divided into two groups:
126 .Bl -tag -width "Dv ILP32"
131 types machine representations all have 4-byte size.
134 type machine representation uses 4 bytes,
142 Some machines support more than one
145 Typically these are 64-bit machines, where the
148 execution environment is accompanied by the
151 environment, which was the historical 32-bit predecessor for 64-bit evolution.
153 .Bl -column -offset indent "powerpc64" "ILP32 counterpart"
154 .It Sy LP64 Ta Sy ILP32 counterpart
155 .It Dv amd64 Ta Dv i386
156 .It Dv powerpc64 Ta Dv powerpc
157 .It Dv mips64* Ta Dv mips*
158 .It Dv aarch64 Ta Dv armv6/armv7
162 will support execution of
166 binaries if the CPU implements
168 execution state, however
170 binaries aren't supported.
172 On all supported architectures:
173 .Bl -column -offset -indent "long long" "Size"
174 .It Sy Type Ta Sy Size
177 .It long Ta sizeof(void*)
183 Integers are represented in two's complement.
184 Alignment of integer and pointer types is natural, that is,
185 the address of the variable must be congruent to zero modulo the type size.
186 Most ILP32 ABIs, except
188 require only 4-byte alignment for 64-bit integers.
190 Machine-dependent type sizes:
191 .Bl -column -offset indent "Architecture" "void *" "long double" "time_t"
192 .It Sy Architecture Ta Sy void * Ta Sy long double Ta Sy time_t
193 .It aarch64 Ta 8 Ta 16 Ta 8
194 .It amd64 Ta 8 Ta 16 Ta 8
195 .It armv6 Ta 4 Ta 8 Ta 8
196 .It armv7 Ta 4 Ta 8 Ta 8
197 .It i386 Ta 4 Ta 12 Ta 4
198 .It mips Ta 4 Ta 8 Ta 8
199 .It mipsel Ta 4 Ta 8 Ta 8
200 .It mipselhf Ta 4 Ta 8 Ta 8
201 .It mipshf Ta 4 Ta 8 Ta 8
202 .It mipsn32 Ta 4 Ta 8 Ta 8
203 .It mips64 Ta 8 Ta 8 Ta 8
204 .It mips64el Ta 8 Ta 8 Ta 8
205 .It mips64elhf Ta 8 Ta 8 Ta 8
206 .It mips64hf Ta 8 Ta 8 Ta 8
207 .It powerpc Ta 4 Ta 8 Ta 8
208 .It powerpcspe Ta 4 Ta 8 Ta 8
209 .It powerpc64 Ta 8 Ta 8 Ta 8
210 .It powerpc64le Ta 8 Ta 8 Ta 8
211 .It riscv64 Ta 8 Ta 16 Ta 8
212 .It riscv64sf Ta 8 Ta 16 Ta 8
216 is 8 bytes on all supported architectures except i386.
217 .Ss Endianness and Char Signedness
218 .Bl -column -offset indent "Architecture" "Endianness" "char Signedness"
219 .It Sy Architecture Ta Sy Endianness Ta Sy char Signedness
220 .It aarch64 Ta little Ta unsigned
221 .It amd64 Ta little Ta signed
222 .It armv6 Ta little Ta unsigned
223 .It armv7 Ta little Ta unsigned
224 .It i386 Ta little Ta signed
225 .It mips Ta big Ta signed
226 .It mipsel Ta little Ta signed
227 .It mipselhf Ta little Ta signed
228 .It mipshf Ta big Ta signed
229 .It mipsn32 Ta big Ta signed
230 .It mips64 Ta big Ta signed
231 .It mips64el Ta little Ta signed
232 .It mips64elhf Ta little Ta signed
233 .It mips64hf Ta big Ta signed
234 .It powerpc Ta big Ta unsigned
235 .It powerpcspe Ta big Ta unsigned
236 .It powerpc64 Ta big Ta unsigned
237 .It powerpc64le Ta little Ta unsigned
238 .It riscv64 Ta little Ta signed
239 .It riscv64sf Ta little Ta signed
242 .Bl -column -offset indent "Architecture" "Page Sizes"
243 .It Sy Architecture Ta Sy Page Sizes
244 .It aarch64 Ta 4K, 2M, 1G
245 .It amd64 Ta 4K, 2M, 1G
248 .It i386 Ta 4K, 2M (PAE), 4M
261 .It powerpc64le Ta 4K
262 .It riscv64 Ta 4K, 2M, 1G
263 .It riscv64sf Ta 4K, 2M, 1G
266 .Bl -column -offset indent "Architecture" "float, double" "long double"
267 .It Sy Architecture Ta Sy float, double Ta Sy long double
268 .It aarch64 Ta hard Ta soft, quad precision
269 .It amd64 Ta hard Ta hard, 80 bit
270 .It armv6 Ta hard Ta hard, double precision
271 .It armv7 Ta hard Ta hard, double precision
272 .It i386 Ta hard Ta hard, 80 bit
273 .It mips Ta soft Ta identical to double
274 .It mipsel Ta soft Ta identical to double
275 .It mipselhf Ta hard Ta identical to double
276 .It mipshf Ta hard Ta identical to double
277 .It mipsn32 Ta soft Ta identical to double
278 .It mips64 Ta soft Ta identical to double
279 .It mips64el Ta soft Ta identical to double
280 .It mips64elhf Ta hard Ta identical to double
281 .It mips64hf Ta hard Ta identical to double
282 .It powerpc Ta hard Ta hard, double precision
283 .It powerpcspe Ta hard Ta hard, double precision
284 .It powerpc64 Ta hard Ta hard, double precision
285 .It powerpc64le Ta hard Ta hard, double precision
286 .It riscv64 Ta hard Ta hard, quad precision
287 .It riscv64sf Ta soft Ta soft, quad precision
289 .Ss Default Tool Chain
293 as the default compiler on all supported CPU architectures,
296 as the default linker, and
297 ELF Tool Chain binary utilities such as
301 .Ss MACHINE_ARCH vs MACHINE_CPUARCH vs MACHINE
303 should be preferred in Makefiles when the generic
304 architecture is being tested.
306 should be preferred when there is something specific to a particular type of
307 architecture where there is a choice of many, or could be a choice of many.
310 when referring to the kernel, interfaces dependent on a specific type of kernel
311 or similar things like boot sequences.
312 .Bl -column -offset indent "Dv MACHINE" "Dv MACHINE_CPUARCH" "Dv MACHINE_ARCH"
313 .It Dv MACHINE Ta Dv MACHINE_CPUARCH Ta Dv MACHINE_ARCH
314 .It arm64 Ta aarch64 Ta aarch64
315 .It amd64 Ta amd64 Ta amd64
316 .It arm Ta arm Ta armv6, armv7
317 .It i386 Ta i386 Ta i386
318 .It mips Ta mips Ta mips, mipsel, mips64, mips64el, mipshf, mipselhf, mips64elhf, mipsn32
319 .It powerpc Ta powerpc Ta powerpc, powerpcspe, powerpc64, powerpc64le
320 .It riscv Ta riscv Ta riscv64, riscv64sf
322 .Ss Predefined Macros
323 The compiler provides a number of predefined macros.
324 Some of these provide architecture-specific details and are explained below.
325 Other macros, including those required by the language standard, are not
328 The full set of predefined macros can be obtained with this command:
329 .Bd -literal -offset indent
330 cc -x c -dM -E /dev/null
333 Common type size and endianness macros:
334 .Bl -column -offset indent "BYTE_ORDER" "Meaning"
335 .It Sy Macro Ta Sy Meaning
336 .It Dv __LP64__ Ta 64-bit (8-byte) long and pointer, 32-bit (4-byte) int
337 .It Dv __ILP32__ Ta 32-bit (4-byte) int, long and pointer
338 .It Dv BYTE_ORDER Ta Either Dv BIG_ENDIAN or Dv LITTLE_ENDIAN .
344 Architecture-specific macros:
345 .Bl -column -offset indent "Architecture" "Predefined macros"
346 .It Sy Architecture Ta Sy Predefined macros
347 .It aarch64 Ta Dv __aarch64__
348 .It amd64 Ta Dv __amd64__ , Dv __x86_64__
349 .It armv6 Ta Dv __arm__ , Dv __ARM_ARCH >= 6
350 .It armv7 Ta Dv __arm__ , Dv __ARM_ARCH >= 7
351 .It i386 Ta Dv __i386__
352 .It mips Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_o32
353 .It mipsel Ta Dv __mips__ , Dv __mips_o32
354 .It mipselhf Ta Dv __mips__ , Dv __mips_o32
355 .It mipshf Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_o32
356 .It mipsn32 Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n32
357 .It mips64 Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n64
358 .It mips64el Ta Dv __mips__ , Dv __mips_n64
359 .It mips64elhf Ta Dv __mips__ , Dv __mips_n64
360 .It mips64hf Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n64
361 .It powerpc Ta Dv __powerpc__
362 .It powerpcspe Ta Dv __powerpc__ , Dv __SPE__
363 .It powerpc64 Ta Dv __powerpc__ , Dv __powerpc64__
364 .It powerpc64le Ta Dv __powerpc__ , Dv __powerpc64__
365 .It riscv64 Ta Dv __riscv , Dv __riscv_xlen == 64
366 .It riscv64sf Ta Dv __riscv , Dv __riscv_xlen == 64 , Dv __riscv_float_abi_soft
369 Compilers may define additional variants of architecture-specific macros.
370 The macros above are preferred for use in
372 .Ss Important Xr make 1 variables
373 Most of the externally settable variables are defined in the
376 These variables are not otherwise documented and are used extensively
378 .Bl -tag -width "MACHINE_CPUARCH"
380 Represents the hardware platform.
381 This is the same as the native platform's
385 It defines both the userland / kernel interface, as well as the
386 bootloader / kernel interface.
387 It should only be used in these contexts.
388 Each CPU architecture may have multiple hardware platforms it supports
392 It is used to collect together all the files from
395 It is often the same as
397 just as one CPU architecture can be implemented by many different
398 hardware platforms, one hardware platform may support multiple CPU
399 architecture family members, though with different binaries.
402 of i386 supported the IBM-AT hardware platform while the
404 of pc98 supported the Japanese company NEC's PC-9801 and PC-9821
406 Both of these hardware platforms supported only the
408 of i386 where they shared a common ABI, except for certain kernel /
409 userland interfaces relating to underlying hardware platform
410 differences in bus architecture, device enumeration and boot interface.
413 should only be used in src/sys and src/stand or in system imagers or
416 Represents the CPU processor architecture.
417 This is the same as the native platforms
421 It defines the CPU instruction family supported.
422 It may also encode a variation in the byte ordering of multi-byte
424 It may also encode a variation in the size of the integer or pointer.
425 It may also encode a ISA revision.
426 It may also encode hard versus soft floating point ABI and usage.
427 It may also encode a variant ABI when the other factors do not
428 uniquely define the ABI (e.g., MIPS' n32 ABI).
431 defines the ABI used by the system.
432 For example, the MIPS CPU processor family supports 9 different
433 combinations encoding pointer size, endian and hard versus soft float (for
434 8 combinations) as well as N32 (which only ever had one variation of
436 Generally, the plain CPU name specifies the most common (or at least
437 first) variant of the CPU.
438 This is why mips and mips64 imply 'big endian' while 'armv6' and 'armv7'
440 If we ever were to support the so-called x32 ABI (using 32-bit
441 pointers on the amd64 architecture), it would most likely be encoded
443 It is unfortunate that amd64 specifies the 64-bit evolution of the x86
444 platform (it matches the 'first rule') as everybody else uses x86_64.
445 There is no standard name for the processor: each OS selects its own
447 .It Dv MACHINE_CPUARCH
448 Represents the source location for a given
450 It is generally the common prefix for all the MACHINE_ARCH that
451 share the same implementation, though 'riscv' breaks this rule.
454 is defined to be mips for all the flavors of mips that we support
455 since we support them all with a shared set of sources.
456 While amd64 and i386 are closely related, MACHINE_CPUARCH is not x86
460 source base supports amd64 and i386 with two
461 distinct source bases living in subdirectories named amd64 and i386
462 (though behind the scenes there's some sharing that fits into this
468 It is used to optimize the build for a specific CPU / core that the
470 Generally, this does not change the ABI, though it can be a fine line
471 between optimization for specific cases.
475 in the top level Makefile for cross building.
476 Unused outside of that scope.
477 It is not passed down to the rest of the build.
478 Makefiles outside of the top level should not use it at all (though
479 some have their own private copy for hysterical raisons).
483 by the top level Makefile for cross building.
486 it is unused outside of that scope.
494 manual page appeared in