1 .\" Copyright (c) 2016-2017 The FreeBSD Foundation. All rights reserved.
3 .\" This documentation was created by Ed Maste under sponsorship of
4 .\" The FreeBSD Foundation.
6 .\" Redistribution and use in source and binary forms, with or without
7 .\" modification, are permitted provided that the following conditions
9 .\" 1. Redistributions of source code must retain the above copyright
10 .\" notice, this list of conditions and the following disclaimer.
11 .\" 2. Redistributions in binary form must reproduce the above copyright
12 .\" notice, this list of conditions and the following disclaimer in the
13 .\" documentation and/or other materials provided with the distribution.
15 .\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND
16 .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE
19 .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 .Nd Architecture-specific details
36 Differences between CPU architectures and platforms supported by
39 This document is a quick reference of key ABI details of
42 For full details consult the processor-specific ABI supplement
45 If not explicitly mentioned, sizes are in bytes.
46 The architecture details in this document apply to
48 and later, unless otherwise noted.
51 uses a flat address space.
57 and pointers all have the same representation.
59 In order to maximize compatibility with future pointer integrity mechanisms,
60 manipulations of pointers as integers should be performed via
71 On some architectures, e.g.,
76 the kernel uses a separate address space.
77 On other architectures, kernel and a user mode process share a
79 The kernel is located at the highest addresses.
81 On each architecture, the main user mode thread's stack starts near
82 the highest user address and grows down.
85 architecture support varies by release.
86 This table shows the first
88 release to support each architecture, and, for discontinued
89 architectures, the final release.
91 .Bl -column -offset indent "Sy Architecture" "Sy Initial Release" "Sy Final Release"
92 .It Sy Architecture Ta Sy Initial Release Ta Sy Final Release
94 .It alpha Ta 3.2 Ta 6.4
96 .It arm Ta 6.0 Ta 12.x
97 .It armeb Ta 8.0 Ta 11.x
100 .It ia64 Ta 5.0 Ta 10.4
109 .It mips64elhf Ta 12.0
111 .It pc98 Ta 2.2 Ta 11.x
113 .It powerpcspe Ta 12.0
116 .It riscv64sf Ta 12.0
117 .It sparc64 Ta 5.0 Ta 12.x
122 architectures use some variant of the ELF (see
124 .Sy Application Binary Interface
125 (ABI) for the machine processor.
126 All supported ABIs can be divided into two groups:
127 .Bl -tag -width "Dv ILP32"
132 types machine representations all have 4-byte size.
135 type machine representation uses 4 bytes,
144 symbol when compiling for an
148 Some machines support more that one
151 Typically these are 64-bit machines, where the
154 execution environment is accompanied by the
157 environment, which was historical 32-bit predecessor for 64-bit evolution.
159 .Bl -column -offset indent "Dv powerpc64" "Sy ILP32 counterpart"
160 .It Sy LP64 Ta Sy ILP32 counterpart
161 .It Dv amd64 Ta Dv i386
162 .It Dv powerpc64 Ta Dv powerpc
163 .It Dv mips64* Ta Dv mips*
164 .It Dv aarch64 Ta Dv armv6/armv7
167 will support execution of
171 binaries if the CPU implements
173 execution state, however
175 binaries aren't supported.
177 On all supported architectures:
178 .Bl -column -offset -indent "long long" "Size"
179 .It Sy Type Ta Sy Size
182 .It long Ta sizeof(void*)
187 Integers are represented in two's complement.
188 Alignment of integer and pointer types is natural, that is,
189 the address of the variable must be congruent to zero modulo the type size.
190 Most ILP32 ABIs, except
192 require only 4-byte alignment for 64-bit integers.
194 Machine-dependent type sizes:
195 .Bl -column -offset indent "Sy Architecture" "Sy void *" "Sy long double" "Sy time_t"
196 .It Sy Architecture Ta Sy void * Ta Sy long double Ta Sy time_t
197 .It aarch64 Ta 8 Ta 16 Ta 8
198 .It amd64 Ta 8 Ta 16 Ta 8
199 .It arm Ta 4 Ta 8 Ta 8
200 .It armv6 Ta 4 Ta 8 Ta 8
201 .It i386 Ta 4 Ta 12 Ta 4
202 .It mips Ta 4 Ta 8 Ta 8
203 .It mipsel Ta 4 Ta 8 Ta 8
204 .It mipselhf Ta 4 Ta 8 Ta 8
205 .It mipshf Ta 4 Ta 8 Ta 8
206 .It mipsn32 Ta 4 Ta 8 Ta 8
207 .It mips64 Ta 8 Ta 8 Ta 8
208 .It mips64el Ta 8 Ta 8 Ta 8
209 .It mips64elhf Ta 8 Ta 8 Ta 8
210 .It mips64hf Ta 8 Ta 8 Ta 8
211 .It powerpc Ta 4 Ta 8 Ta 8
212 .It powerpcspe Ta 4 Ta 8 Ta 8
213 .It powerpc64 Ta 8 Ta 8 Ta 8
214 .It riscv64 Ta 8 Ta 16 Ta 8
215 .It riscv64sf Ta 8 Ta 16 Ta 8
216 .It sparc64 Ta 8 Ta 16 Ta 8
220 is 8 bytes on all supported architectures except i386.
221 .Ss Endianness and Char Signedness
222 .Bl -column -offset indent "Sy Architecture" "Sy Endianness" "Sy char Signedness"
223 .It Sy Architecture Ta Sy Endianness Ta Sy char Signedness
224 .It aarch64 Ta little Ta unsigned
225 .It amd64 Ta little Ta signed
226 .It arm Ta little Ta unsigned
227 .It armv6 Ta little Ta unsigned
228 .It armv7 Ta little Ta unsigned
229 .It i386 Ta little Ta signed
230 .It mips Ta big Ta signed
231 .It mipsel Ta little Ta signed
232 .It mipselhf Ta little Ta signed
233 .It mipshf Ta big Ta signed
234 .It mipsn32 Ta big Ta signed
235 .It mips64 Ta big Ta signed
236 .It mips64el Ta little Ta signed
237 .It mips64elhf Ta little Ta signed
238 .It mips64hf Ta big Ta signed
239 .It powerpc Ta big Ta unsigned
240 .It powerpcspe Ta big Ta unsigned
241 .It powerpc64 Ta big Ta unsigned
242 .It riscv64 Ta little Ta signed
243 .It riscv64sf Ta little Ta signed
244 .It sparc64 Ta big Ta signed
247 .Bl -column -offset indent "Sy Architecture" "Sy Page Sizes"
248 .It Sy Architecture Ta Sy Page Sizes
249 .It aarch64 Ta 4K, 2M, 1G
250 .It amd64 Ta 4K, 2M, 1G
254 .It i386 Ta 4K, 2M (PAE), 4M
272 .Bl -column -offset indent "Sy Architecture" "Sy float, double" "Sy long double"
273 .It Sy Architecture Ta Sy float, double Ta Sy long double
274 .It aarch64 Ta hard Ta soft, quad precision
275 .It amd64 Ta hard Ta hard, 80 bit
276 .It arm Ta soft Ta soft, double precision
277 .It armv6 Ta hard Ta hard, double precision
278 .It armv7 Ta hard Ta hard, double precision
279 .It i386 Ta hard Ta hard, 80 bit
280 .It mips Ta soft Ta identical to double
281 .It mipsel Ta soft Ta identical to double
282 .It mipselhf Ta hard Ta identical to double
283 .It mipshf Ta hard Ta identical to double
284 .It mipsn32 Ta soft Ta identical to double
285 .It mips64 Ta soft Ta identical to double
286 .It mips64el Ta soft Ta identical to double
287 .It mips64elhf Ta hard Ta identical to double
288 .It mips64hf Ta hard Ta identical to double
289 .It powerpc Ta hard Ta hard, double precision
290 .It powerpcspe Ta hard Ta hard, double precision
291 .It powerpc64 Ta hard Ta hard, double precision
292 .It riscv64 Ta hard Ta hard, double precision
293 .It riscv64sf Ta soft Ta soft, double precision
294 .It sparc64 Ta hard Ta hard, quad precision
296 .Ss Default Tool Chain
297 .Fx uses a variety of tool chain components for the supported CPU
302 provided by the base system,
307 or an external toolchain compiler and linker provided by a port or package.
308 This table shows the default tool chain for each architecture.
309 .Bl -column -offset indent "Sy Architecture" "Sy Compiler" "Sy Linker"
310 .It Sy Architecture Ta Sy Compiler Ta Sy Linker
311 .It aarch64 Ta Clang Ta lld
312 .It amd64 Ta Clang Ta lld
313 .It arm Ta Clang Ta GNU ld 2.17.50
314 .It armv6 Ta Clang Ta lld
315 .It armv7 Ta Clang Ta lld
316 .It i386 Ta Clang Ta lld
317 .It mips Ta GCC 4.2.1 Ta GNU ld 2.17.50
318 .It mipsel Ta GCC 4.2.1 Ta GNU ld 2.17.50
319 .It mipselhf Ta GCC 4.2.1 Ta GNU ld 2.17.50
320 .It mipshf Ta GCC 4.2.1 Ta GNU ld 2.17.50
321 .It mipsn32 Ta GCC 4.2.1 Ta GNU ld 2.17.50
322 .It mips64 Ta GCC 4.2.1 Ta GNU ld 2.17.50
323 .It mips64el Ta GCC 4.2.1 Ta GNU ld 2.17.50
324 .It mips64elhf Ta GCC 4.2.1 Ta GNU ld 2.17.50
325 .It mips64hf Ta GCC 4.2.1 Ta GNU ld 2.17.50
326 .It powerpc Ta GCC 4.2.1 Ta GNU ld 2.17.50
327 .It powerpcspe Ta GCC 4.2.1 Ta GNU ld 2.17.50
328 .It powerpc64 Ta GCC 4.2.1 Ta GNU ld 2.17.50
329 .It riscv64 Ta GCC(1) Ta GNU ld(1)
330 .It riscv64sf Ta GCC(1) Ta GNU ld(1)
331 .It sparc64 Ta GCC 4.2.1 Ta GNU ld 2.17.50
334 (1) External toolchain provided by ports/packages.
336 Note that GCC 4.2.1 is deprecated, and scheduled for removal on 2020-03-31.
337 Any CPU architectures not migrated by then
338 (to either base system Clang or external toolchain)
339 may be removed from the tree after that date.
340 Unless the make variable
341 .Dv MAKE_OBSOLETE_GCC
342 is defined, make universe will not build mips, powerpc, nor sparc64
343 architectures unless the xtoolchain binaries have been installed for
345 .Ss MACHINE_ARCH vs MACHINE_CPUARCH vs MACHINE
347 should be preferred in Makefiles when the generic
348 architecture is being tested.
350 should be preferred when there is something specific to a particular type of
351 architecture where there is a choice of many, or could be a choice of many.
354 when referring to the kernel, interfaces dependent on a specific type of kernel
355 or similar things like boot sequences.
356 .Bl -column -offset indent "Dv MACHINE" "Dv MACHINE_CPUARCH" "Dv MACHINE_ARCH"
357 .It Dv MACHINE Ta Dv MACHINE_CPUARCH Ta Dv MACHINE_ARCH
358 .It arm64 Ta aarch64 Ta aarch64
359 .It amd64 Ta amd64 Ta amd64
360 .It arm Ta arm Ta arm, armv6, armv7
361 .It i386 Ta i386 Ta i386
362 .It mips Ta mips Ta mips, mipsel, mips64, mips64el, mipshf, mipselhf, mips64elhf, mipsn32
363 .It powerpc Ta powerpc Ta powerpc, powerpcspe, powerpc64
364 .It riscv Ta riscv Ta riscv64, riscv64sf
365 .It sparc64 Ta sparc64 Ta sparc64
367 .Ss Predefined Macros
368 The compiler provides a number of predefined macros.
369 Some of these provide architecture-specific details and are explained below.
370 Other macros, including those required by the language standard, are not
373 The full set of predefined macros can be obtained with this command:
374 .Bd -literal -offset indent
375 cc -x c -dM -E /dev/null
378 Common type size and endianness macros:
379 .Bl -column -offset indent "BYTE_ORDER" "Sy Meaning"
380 .It Sy Macro Ta Sy Meaning
381 .It Dv __LP64__ Ta 64-bit (8-byte) long and pointer, 32-bit (4-byte) int
382 .It Dv __ILP32__ Ta 32-bit (4-byte) int, long and pointer
383 .It Dv BYTE_ORDER Ta Either Dv BIG_ENDIAN or Dv LITTLE_ENDIAN .
389 Architecture-specific macros:
390 .Bl -column -offset indent "Sy Architecture" "Sy Predefined macros"
391 .It Sy Architecture Ta Sy Predefined macros
392 .It aarch64 Ta Dv __aarch64__
393 .It amd64 Ta Dv __amd64__, Dv __x86_64__
394 .It arm Ta Dv __arm__
395 .It armv6 Ta Dv __arm__, Dv __ARM_ARCH >= 6
396 .It armv7 Ta Dv __arm__, Dv __ARM_ARCH >= 7
397 .It i386 Ta Dv __i386__
398 .It mips Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32
399 .It mipsel Ta Dv __mips__, Dv __mips_o32
400 .It mipselhf Ta Dv __mips__, Dv __mips_o32
401 .It mipshf Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32
402 .It mipsn32 Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n32
403 .It mips64 Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n64
404 .It mips64el Ta Dv __mips__, Dv __mips_n64
405 .It mips64elhf Ta Dv __mips__, Dv __mips_n64
406 .It mips64hf Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n64
407 .It powerpc Ta Dv __powerpc__
408 .It powerpcspe Ta Dv __powerpc__, Dv __SPE__
409 .It powerpc64 Ta Dv __powerpc__, Dv __powerpc64__
410 .It riscv64 Ta Dv __riscv, Dv __riscv_xlen == 64
411 .It riscv64sf Ta Dv __riscv, Dv __riscv_xlen == 64
412 .It sparc64 Ta Dv __sparc64__
415 Compilers may define additional variants of architecture-specific macros.
416 The macros above are preferred for use in
418 .Ss Important Xr make 1 variables
419 Most of the externally settable variables are defined in the
422 These variables are not otherwise documented and are used extensively
424 .Bl -column -offset indent "Sy Variable" "Sy Meaning and usage"
425 .It Dv MACHINE Represent the hardware platform.
426 This is the same as the native platform's
430 It defines both the userland / kernel interface, as well as the
431 bootloader / kernel interface.
432 It should only be used in these contexts.
433 Each CPU architecture may have multiple hardware platforms it supports
437 It is used to collect together all the files from
440 It is often the same as
442 just as one CPU architecture can be implemented by many different
443 hardware platforms, one hardware platform may support multiple CPU
444 architecture family members, though with different binaries.
447 of i386 supported the IBM-AT hardware platform while the
449 of pc98 supported the Japanese company NEC's PC-9801 and PC-9821
451 Both of these hardware platforms supported only the
453 of i386 where they shared a common ABI, except for certain kernel /
454 userland interfaces relating to underlying hardware platform
455 differences in bus architecture, device enumeration and boot interface.
458 should only be used in src/sys and src/stand or in system imagers or
460 .It Dv MACHINE_ARCH Represents the CPU processor architecture.
461 This is the same as the native platforms
465 It defines the CPU instruction family supported.
466 It may also encode a variation in the byte ordering of multi-byte
468 It may also encode a variation in the size of the integer or pointer.
469 It may also encode a ISA revision.
470 It may also encode hard versus soft floating point ABI and usage.
471 It may also encode a variant ABI when the other factors do not
472 uniquely define the ABI (e.g., MIPS' n32 ABI).
475 defines the ABI used by the system.
476 For example, the MIPS CPU processor family supports 9 different
477 combinations encoding pointer size, endian and hard versus soft float (for
478 8 combinations) as well as N32 (which only ever had one variation of
480 Generally, the plain CPU name specifies the most common (or at least
481 first) variant of the CPU.
482 This is why mips and mips64 imply 'big endian' while 'arm' and 'armv7'
484 If we ever were to support the so-called x32 ABI (using 32-bit
485 pointers on the amd64 architecture), it would most likely be encoded
487 It is unfortunate that amd64 specifies the 64-bit evolution of the x86
488 platform (it matches the 'first rule') as everybody else uses x86_64.
489 There is no standard name for the processor: each OS selects its own
491 .It Dv MACHINE_CPUARCH Represents the source location for a given
493 It is generally the common prefix for all the MACHINE_ARCH that
494 share the same implementation, though 'riscv' breaks this rule.
497 is defined to be mips for all the flavors of mips that we support
498 since we support them all with a shared set of sources.
499 While amd64 and i386 are closely related, MACHINE_CPUARCH is not x86
501 The FreeBSD source base supports amd64 and i386 with two
502 distinct source bases living in subdirectories named amd64 and i386
503 (though behind the scenes there's some sharing that fits into this
505 .It Dv CPUTYPE Sets the flavor of
508 It is used to optimize the build for a specific CPU / core that the
510 Generally, this does not change the ABI, though it can be a fine line
511 between optimization for specific cases.
512 .It Dv TARGET Used to set
514 in the top level Makefile for cross building.
515 Unused outside of that scope.
516 It is not passed down to the rest of the build.
517 Makefiles outside of the top level should not use it at all (though
518 some have their own private copy for hysterical raisons).
519 .It Dv TARGET_ARCH Used to set
521 by the top level Makefile for cross building.
523 .Dv TARGET , it is unused outside of that scope.
531 manual page appeared in