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34 .Nm atomic_readandclear ,
43 .Fn atomic_add_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
45 .Fn atomic_clear_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
47 .Fo atomic_cmpset_[acq_|rel_]<type>
48 .Fa "volatile <type> *dst"
53 .Fn atomic_load_acq_<type> "volatile <type> *p"
55 .Fn atomic_readandclear_<type> "volatile <type> *p"
57 .Fn atomic_set_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
59 .Fn atomic_subtract_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
61 .Fn atomic_store_rel_<type> "volatile <type> *p" "<type> v"
64 Each of the atomic operations is guaranteed to be atomic in the presence of
66 They can be used to implement reference counts or as building blocks for more
67 advanced synchronization primitives such as mutexes.
69 Each atomic operation operates on a specific
71 The type to use is indicated in the function name.
72 The available types that can be used are:
74 .Bl -tag -offset indent -width short -compact
80 unsigned integer the size of a pointer
82 unsigned 32-bit integer
84 unsigned 64-bit integer
87 For example, the function to atomically add two integers is called
90 Certain architectures also provide operations for types smaller than
93 .Bl -tag -offset indent -width short -compact
97 unsigned short integer
99 unsigned 8-bit integer
101 unsigned 16-bit integer
104 These must not be used in MI code because the instructions to implement them
105 efficiently may not be available.
107 Memory barriers are used to guarantee the order of data accesses in
109 First, they specify hints to the compiler to not re-order or optimize the
111 Second, on architectures that do not guarantee ordered data accesses,
112 special instructions or special variants of instructions are used to indicate
113 to the processor that data accesses need to occur in a certain order.
114 As a result, most of the atomic operations have three variants in order to
115 include optional memory barriers.
116 The first form just performs the operation without any explicit barriers.
117 The second form uses a read memory barrier, and the third variant uses a write
120 The second variant of each operation includes a read memory barrier.
121 This barrier ensures that the effects of this operation are completed before the
122 effects of any later data accesses.
123 As a result, the operation is said to have acquire semantics as it acquires a
124 pseudo-lock requiring further operations to wait until it has completed.
125 To denote this, the suffix
127 is inserted into the function name immediately prior to the
128 .Dq Li _ Ns Aq Fa type
130 For example, to subtract two integers ensuring that any later writes will
131 happen after the subtraction is performed, use
132 .Fn atomic_subtract_acq_int .
134 The third variant of each operation includes a write memory barrier.
135 This ensures that all effects of all previous data accesses are completed
136 before this operation takes place.
137 As a result, the operation is said to have release semantics as it releases
138 any pending data accesses to be completed before its operation is performed.
139 To denote this, the suffix
141 is inserted into the function name immediately prior to the
142 .Dq Li _ Ns Aq Fa type
144 For example, to add two long integers ensuring that all previous
145 writes will happen first, use
146 .Fn atomic_add_rel_long .
148 A practical example of using memory barriers is to ensure that data accesses
149 that are protected by a lock are all performed while the lock is held.
150 To achieve this, one would use a read barrier when acquiring the lock to
151 guarantee that the lock is held before any protected operations are performed.
152 Finally, one would use a write barrier when releasing the lock to ensure that
153 all of the protected operations are completed before the lock is released.
154 .Ss Multiple Processors
155 The current set of atomic operations do not necessarily guarantee atomicity
156 across multiple processors.
157 To guarantee atomicity across processors, not only does the individual
158 operation need to be atomic on the processor performing the operation, but
159 the result of the operation needs to be pushed out to stable storage and the
160 caches of all other processors on the system need to invalidate any cache
161 lines that include the affected memory region.
164 architecture, the cache coherency model requires that the hardware perform
165 this task, thus the atomic operations are atomic across multiple processors.
168 architecture, coherency is only guaranteed for pages that are configured to
169 using a caching policy of either uncached or write back.
171 This section describes the semantics of each operation using a C like notation.
173 .It Fn atomic_add p v
174 .Bd -literal -compact
177 .It Fn atomic_clear p v
178 .Bd -literal -compact
181 .It Fn atomic_cmpset dst old new
182 .Bd -literal -compact
193 functions are not implemented for the types
200 .It Fn atomic_load addr
201 .Bd -literal -compact
208 functions always have acquire semantics.
210 .It Fn atomic_readandclear addr
211 .Bd -literal -compact
219 .Fn atomic_readandclear
220 functions are not implemented for the types
228 not have any variants with memory barriers at this time.
230 .It Fn atomic_set p v
231 .Bd -literal -compact
234 .It Fn atomic_subtract p v
235 .Bd -literal -compact
238 .It Fn atomic_store p v
239 .Bd -literal -compact
246 functions always have release semantics.
250 is currently not implemented for any of the atomic operations on the
257 returns the result of the compare operation.
261 .Fn atomic_readandclear
263 return the value at the specified address.
265 This example uses the
266 .Fn atomic_cmpset_acq_ptr
269 functions to obtain a sleep mutex and handle recursion.
278 #define _obtain_lock(mp, tid) \\
279 atomic_cmpset_acq_ptr(&(mp)->mtx_lock, (void *)MTX_UNOWNED, (tid))
281 /* Get a sleep lock, deal with recursion inline. */
282 #define _getlock_sleep(mp, tid, type) do { \\
283 if (!_obtain_lock(mp, tid)) { \\
284 if (((mp)->mtx_lock & MTX_FLAGMASK) != ((uintptr_t)(tid)))\\
285 mtx_enter_hard(mp, (type) & MTX_HARDOPTS, 0); \\
287 atomic_set_ptr(&(mp)->mtx_lock, MTX_RECURSE); \\
288 (mp)->mtx_recurse++; \\
300 operations were first introduced in
302 This first set only supported the types
311 .Fn atomic_readandclear ,
314 operations were added in
323 and all of the acquire and release variants