2 .\" Copyright (c) 2013 Gleb Smirnoff <glebius@FreeBSD.org>
3 .\" All rights reserved.
5 .\" Redistribution and use in source and binary forms, with or without
6 .\" modification, are permitted provided that the following conditions
8 .\" 1. Redistributions of source code must retain the above copyright
9 .\" notice, this list of conditions and the following disclaimer.
10 .\" 2. Redistributions in binary form must reproduce the above copyright
11 .\" notice, this list of conditions and the following disclaimer in the
12 .\" documentation and/or other materials provided with the distribution.
14 .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 .\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 .Nd "SMP-friendly kernel counter implementation"
39 .Fn counter_u64_alloc "int wait"
41 .Fn counter_u64_free "counter_u64_t c"
43 .Fn counter_u64_add "counter_u64_t c" "int64_t v"
49 .Fn counter_u64_add_protected "counter_u64_t c" "int64_t v"
51 .Fn counter_u64_fetch "counter_u64_t c"
53 .Fn counter_u64_zero "counter_u64_t c"
55 .Fn counter_ratecheck "struct counter_rate *cr" "int64_t limit"
56 .Fn COUNTER_U64_SYSINIT "counter_u64_t c"
57 .Fn COUNTER_U64_DEFINE_EARLY "counter_u64_t c"
59 .Fn SYSCTL_COUNTER_U64 parent nbr name access ptr descr
60 .Fn SYSCTL_ADD_COUNTER_U64 ctx parent nbr name access ptr descr
61 .Fn SYSCTL_COUNTER_U64_ARRAY parent nbr name access ptr len descr
62 .Fn SYSCTL_ADD_COUNTER_U64_ARRAY ctx parent nbr name access ptr len descr
65 is a generic facility to create counters
66 that can be utilized for any purpose (such as collecting statistical
70 is guaranteed to be lossless when several kernel threads do simultaneous
74 does not block the calling thread,
77 operations are used for the update, therefore the counters
78 can be used in any non-interrupt context.
81 has special optimisations for SMP environments, making
83 update faster than simple arithmetic on the global variable.
86 is considered suitable for accounting in the performance-critical
88 .Bl -tag -width indent
89 .It Fn counter_u64_alloc wait
90 Allocate a new 64-bit unsigned counter.
95 wait flag, should be either
101 is specified the operation may fail and return
103 .It Fn counter_u64_free c
104 Free the previously allocated counter
108 .It Fn counter_u64_add c v
113 The KPI does not guarantee any protection from wraparound.
115 Enter mode that would allow the safe update of several counters via
116 .Fn counter_u64_add_protected .
117 On some machines this expands to
119 section, while on other is a nop.
121 .Sx IMPLEMENTATION DETAILS .
123 Exit mode for updating several counters.
124 .It Fn counter_u64_add_protected c v
126 .Fn counter_u64_add ,
127 but should be preceded by
129 .It Fn counter_u64_fetch c
130 Take a snapshot of counter
132 The data obtained is not guaranteed to reflect the real cumulative
133 value for any moment.
134 .It Fn counter_u64_zero c
138 .It Fn counter_ratecheck cr limit
139 The function is a multiprocessor-friendly version of
144 Returns non-negative value if the rate is not yet reached during the current
145 second, and a negative value otherwise.
146 If the limit was reached on previous second, but was just reset back to zero,
148 .Fn counter_ratecheck
149 returns number of events since previous reset.
150 .It Fn COUNTER_U64_SYSINIT c
153 initializer for the global counter
155 .It Fn COUNTER_U64_DEFINE_EARLY c
156 Define and initialize a global counter
158 It is always safe to increment
160 though updates prior to the
164 .It Fn SYSCTL_COUNTER_U64 parent nbr name access ptr descr
167 oid that would represent a
171 argument should be a pointer to allocated
173 A read of the oid returns value obtained through
174 .Fn counter_u64_fetch .
175 Any write to the oid zeroes it.
176 .It Fn SYSCTL_ADD_COUNTER_U64 ctx parent nbr name access ptr descr
179 oid that would represent a
183 argument should be a pointer to allocated
185 A read of the oid returns value obtained through
186 .Fn counter_u64_fetch .
187 Any write to the oid zeroes it.
188 .It Fn SYSCTL_COUNTER_U64_ARRAY parent nbr name access ptr len descr
191 oid that would represent an array of
195 argument should be a pointer to allocated array of
196 .Vt counter_u64_t's .
199 argument should specify number of elements in the array.
200 A read of the oid returns len-sized array of
202 values obtained through
203 .Fn counter_u64_fetch .
204 Any write to the oid zeroes all array elements.
205 .It Fn SYSCTL_ADD_COUNTER_U64_ARRAY ctx parent nbr name access ptr len descr
208 oid that would represent an array of
212 argument should be a pointer to allocated array of
213 .Vt counter_u64_t's .
216 argument should specify number of elements in the array.
217 A read of the oid returns len-sized array of
219 values obtained through
220 .Fn counter_u64_fetch .
221 Any write to the oid zeroes all array elements.
223 .Sh IMPLEMENTATION DETAILS
226 is implemented using per-CPU data fields that are specially aligned
227 in memory, to avoid inter-CPU bus traffic due to shared use
228 of the variables between CPUs.
229 These are allocated using
233 The update operation only touches the field that is private to current CPU.
234 Fetch operation loops through all per-CPU fields and obtains a snapshot
239 update is implemented as a single instruction without lock semantics,
240 operating on the private data for the current CPU,
241 which is safe against preemption and interrupts.
243 On i386 architecture, when machine supports the cmpxchg8 instruction,
244 this instruction is used.
245 The multi-instruction sequence provides the same guarantees as the
246 amd64 single-instruction implementation.
248 On some architectures updating a counter require a
252 The following example creates a static counter array exported to
253 userspace through a sysctl:
254 .Bd -literal -offset indent
256 static counter_u64_t array[MY_SIZE];
257 SYSCTL_COUNTER_U64_ARRAY(_debug, OID_AUTO, counter_array, CTLFLAG_RW,
258 &array[0], MY_SIZE, "Test counter array");
272 facility first appeared in
278 facility was written by
281 .An Konstantin Belousov .