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32 .Nd ppbus microsequencer developer's guide
35 .In dev/ppbus/ppbconf.h
36 .In dev/ppbus/ppb_msq.h
40 for ppbus description and general info about the microsequencer.
42 The purpose of this document is to encourage developers to use the
43 microsequencer mechanism in order to have:
44 .Bl -enum -offset indent
46 a uniform programming model
51 Before using microsequences, you are encouraged to look at
53 microsequencer implementation and an example of how using it in
55 .Sh PPBUS register model
57 The parallel port model chosen for ppbus is the PC parallel port model.
58 Thus, any register described later has the same semantic than its counterpart
59 in a PC parallel port.
60 For more info about ISA/ECP programming, get the
61 Microsoft standard referenced as "Extended Capabilities Port Protocol and
62 ISA interface Standard".
63 Registers described later are standard parallel port
66 Mask macros are defined in the standard ppbus include files for each valid
67 bit of parallel port registers.
69 In compatible or nibble mode, writing to this register will drive data to the
70 parallel port data lines.
71 In any other mode, drivers may be tri-stated by
72 setting the direction bit (PCD) in the control register.
73 Reads to this register
74 return the value on the data lines.
75 .Ss Device status register
76 This read-only register reflects the inputs on the parallel port interface.
78 .Bl -column "Bit" "Name" "Description" -compact
79 .It Em Bit Ta Em Name Ta Em Description
80 .It 7 Ta nBUSY Ta "inverted version of parallel port Busy signal"
81 .It 6 Ta nACK Ta "version of parallel port nAck signal"
82 .It 5 Ta PERROR Ta "version of parallel port PERROR signal"
83 .It 4 Ta SELECT Ta "version of parallel port Select signal"
84 .It 3 Ta nFAULT Ta "version of parallel port nFault signal"
87 Others are reserved and return undefined result when read.
88 .Ss Device control register
89 This register directly controls several output signals as well as enabling
92 .Bl -column "Bit" "Name " "Description" -compact
93 .It Em Bit Ta Em Name Ta Em Description
94 .It 5 Ta PCD Ta "direction bit in extended modes"
95 .It 4 Ta IRQENABLE Ta "1 enables an interrupt on the rising edge of nAck"
96 .It 3 Ta SELECTIN Ta "inverted and driven as parallel port nSelectin signal"
97 .It 2 Ta nINIT Ta "driven as parallel port nInit signal"
98 .It 1 Ta AUTOFEED Ta "inverted and driven as parallel port nAutoFd signal"
99 .It 0 Ta STROBE Ta "inverted and driven as parallel port nStrobe signal"
101 .Sh MICROINSTRUCTIONS
103 .Em Microinstructions
104 are either parallel port accesses, program iterations, submicrosequence or
106 The parallel port must be considered as the logical model described in
109 Available microinstructions are:
111 #define MS_OP_GET 0 /* get <ptr>, <len> */
112 #define MS_OP_PUT 1 /* put <ptr>, <len> */
113 #define MS_OP_RFETCH 2 /* rfetch <reg>, <mask>, <ptr> */
114 #define MS_OP_RSET 3 /* rset <reg>, <mask>, <mask> */
115 #define MS_OP_RASSERT 4 /* rassert <reg>, <mask> */
116 #define MS_OP_DELAY 5 /* delay <val> */
117 #define MS_OP_SET 6 /* set <val> */
118 #define MS_OP_DBRA 7 /* dbra <offset> */
119 #define MS_OP_BRSET 8 /* brset <mask>, <offset> */
120 #define MS_OP_BRCLEAR 9 /* brclear <mask>, <offset> */
121 #define MS_OP_RET 10 /* ret <retcode> */
122 #define MS_OP_C_CALL 11 /* c_call <function>, <parameter> */
123 #define MS_OP_PTR 12 /* ptr <pointer> */
124 #define MS_OP_ADELAY 13 /* adelay <val> */
125 #define MS_OP_BRSTAT 14 /* brstat <mask>, <mask>, <offset> */
126 #define MS_OP_SUBRET 15 /* subret <code> */
127 #define MS_OP_CALL 16 /* call <microsequence> */
128 #define MS_OP_RASSERT_P 17 /* rassert_p <iter>, <reg> */
129 #define MS_OP_RFETCH_P 18 /* rfetch_p <iter>, <reg>, <mask> */
130 #define MS_OP_TRIG 19 /* trigger <reg>, <len>, <array> */
132 .Ss Execution context
134 .Em execution context
135 of microinstructions is:
136 .Bl -bullet -offset indent
140 which points to the next microinstruction to execute either in the main
141 microsequence or in a subcall
145 which points to the next char to send/receive
147 the current value of the internal
151 This data is modified by some of the microinstructions, not all.
152 .Ss MS_OP_GET and MS_OP_PUT
153 are microinstructions used to do either predefined standard IEEE1284-1994
154 transfers or programmed non-standard io.
155 .Ss MS_OP_RFETCH - Register FETCH
156 is used to retrieve the current value of a parallel port register, apply a
157 mask and save it in a buffer.
160 .Bl -enum -offset indent
166 pointer to the buffer
169 Predefined macro: MS_RFETCH(reg,mask,ptr)
170 .Ss MS_OP_RSET - Register SET
171 is used to assert/clear some bits of a particular parallel port register,
172 two masks are applied.
175 .Bl -enum -offset indent
179 mask of bits to assert
181 mask of bits to clear
184 Predefined macro: MS_RSET(reg,assert,clear)
185 .Ss MS_OP_RASSERT - Register ASSERT
186 is used to assert all bits of a particular parallel port register.
189 .Bl -enum -offset indent
196 Predefined macro: MS_RASSERT(reg,byte)
197 .Ss MS_OP_DELAY - microsecond DELAY
198 is used to delay the execution of the microsequence.
201 .Bl -enum -offset indent
203 delay in microseconds
206 Predefined macro: MS_DELAY(delay)
207 .Ss MS_OP_SET - SET internal branch register
208 is used to set the value of the internal branch register.
211 .Bl -enum -offset indent
216 Predefined macro: MS_SET(accum)
217 .Ss MS_OP_DBRA - \&Do BRAnch
218 is used to branch if internal branch register decremented by one result value
222 .Bl -enum -offset indent
224 integer offset in the current executed (sub)microsequence.
226 the index of the next microinstruction to execute.
229 Predefined macro: MS_DBRA(offset)
230 .Ss MS_OP_BRSET - BRanch on SET
231 is used to branch if some of the status register bits of the parallel port
235 .Bl -enum -offset indent
237 bits of the status register
239 integer offset in the current executed (sub)microsequence.
241 the index of the next microinstruction to execute.
244 Predefined macro: MS_BRSET(mask,offset)
245 .Ss MS_OP_BRCLEAR - BRanch on CLEAR
246 is used to branch if some of the status register bits of the parallel port
250 .Bl -enum -offset indent
252 bits of the status register
254 integer offset in the current executed (sub)microsequence.
256 the index of the next microinstruction to execute.
259 Predefined macro: MS_BRCLEAR(mask,offset)
260 .Ss MS_OP_RET - RETurn
261 is used to return from a microsequence.
262 This instruction is mandatory.
264 is the only way for the microsequencer to detect the end of the microsequence.
265 The return code is returned in the integer pointed by the (int *) parameter
266 of the ppb_MS_microseq().
269 .Bl -enum -offset indent
274 Predefined macro: MS_RET(code)
275 .Ss MS_OP_C_CALL - C function CALL
276 is used to call C functions from microsequence execution.
278 when a non-standard i/o is performed to retrieve a data character from the
282 .Bl -enum -offset indent
284 the C function to call
286 the parameter to pass to the function call
289 The C function shall be declared as a
290 .Ft int(*)(void *p, char *ptr) .
291 The ptr parameter is the current position in the buffer currently scanned.
293 Predefined macro: MS_C_CALL(func,param)
294 .Ss MS_OP_PTR - initialize internal PTR
295 is used to initialize the internal pointer to the currently scanned buffer.
296 This pointer is passed to any C call (see above).
299 .Bl -enum -offset indent
301 pointer to the buffer that shall be accessed by xxx_P() microsequence calls.
302 Note that this pointer is automatically incremented during xxx_P() calls
305 Predefined macro: MS_PTR(ptr)
306 .Ss MS_OP_ADELAY - do an Asynchronous DELAY
307 is used to make a tsleep() during microsequence execution.
309 executed at PPBPRI level.
312 .Bl -enum -offset indent
317 Predefined macro: MS_ADELAY(delay)
318 .Ss MS_OP_BRSTAT - BRanch on STATe
319 is used to branch on status register state condition.
322 .Bl -enum -offset indent
324 mask of asserted bits.
325 Bits that shall be asserted in the status register
328 mask of cleared bits.
329 Bits that shall be cleared in the status register
332 integer offset in the current executed (sub)microsequence.
334 to the index of the next microinstruction to execute.
337 Predefined macro: MS_BRSTAT(asserted_bits,clear_bits,offset)
338 .Ss MS_OP_SUBRET - SUBmicrosequence RETurn
339 is used to return from the submicrosequence call.
340 This action is mandatory
342 Some microinstructions (PUT, GET) may not be callable
343 within a submicrosequence.
347 Predefined macro: MS_SUBRET()
348 .Ss MS_OP_CALL - submicrosequence CALL
349 is used to call a submicrosequence.
350 A submicrosequence is a microsequence with
353 .Bl -enum -offset indent
355 the submicrosequence to execute
358 Predefined macro: MS_CALL(microseq)
359 .Ss MS_OP_RASSERT_P - Register ASSERT from internal PTR
360 is used to assert a register with data currently pointed by the internal PTR
363 .Bl -enum -offset indent
365 amount of data to write to the register
370 Predefined macro: MS_RASSERT_P(iter,reg)
371 .Ss MS_OP_RFETCH_P - Register FETCH to internal PTR
372 is used to fetch data from a register.
373 Data is stored in the buffer currently
374 pointed by the internal PTR pointer.
376 .Bl -enum -offset indent
378 amount of data to read from the register
382 mask applied to fetched data
385 Predefined macro: MS_RFETCH_P(iter,reg,mask)
386 .Ss MS_OP_TRIG - TRIG register
387 is used to trigger the parallel port.
388 This microinstruction is intended to
389 provide a very efficient control of the parallel port.
390 Triggering a register
391 is writing data, wait a while, write data, wait a while...
393 write magic sequences to the port.
395 .Bl -enum -offset indent
397 amount of data to read from the register
403 array of unsigned chars.
404 Each couple of u_chars define the data to write to
405 the register and the delay in us to wait.
406 The delay is limited to 255 us to
407 simplify and reduce the size of the array.
410 Predefined macro: MS_TRIG(reg,len,array)
418 int (* f)(void *, char *);
421 struct ppb_microseq {
422 int opcode; /* microins. opcode */
423 union ppb_insarg arg[PPB_MS_MAXARGS]; /* arguments */
426 .Ss Using microsequences
427 To instantiate a microsequence, just declare an array of ppb_microseq
428 structures and initialize it as needed.
429 You may either use predefined macros
430 or code directly your microinstructions according to the ppb_microseq
434 struct ppb_microseq select_microseq[] = {
438 #define SELECT_TARGET MS_PARAM(0, 1, MS_TYP_INT)
439 #define SELECT_INITIATOR MS_PARAM(3, 1, MS_TYP_INT)
441 /* send the select command to the drive */
443 MS_CASS(H_nAUTO | H_nSELIN | H_INIT | H_STROBE),
444 MS_CASS( H_AUTO | H_nSELIN | H_INIT | H_STROBE),
446 MS_CASS( H_AUTO | H_nSELIN | H_nINIT | H_STROBE),
448 /* now, wait until the drive is ready */
450 /* loop: */ MS_BRSET(H_ACK, 2 /* ready */),
451 MS_DBRA(-2 /* loop */),
452 /* error: */ MS_RET(1),
453 /* ready: */ MS_RET(0)
457 Here, some parameters are undefined and must be filled before executing
459 In order to initialize each microsequence, one
460 should use the ppb_MS_init_msq() function like this:
462 ppb_MS_init_msq(select_microseq, 2,
463 SELECT_TARGET, 1 << target,
464 SELECT_INITIATOR, 1 << initiator);
467 and then execute the microsequence.
468 .Ss The microsequencer
469 The microsequencer is executed either at ppbus or adapter level (see
471 for info about ppbus system layers).
472 Most of the microsequencer is executed
473 at ppc level to avoid ppbus to adapter function call overhead.
475 actions like deciding whereas the transfer is IEEE1284-1994 compliant are
476 executed at ppbus layer.
478 Only one level of submicrosequences is allowed.
480 When triggering the port, maximum delay allowed is 255 us.
488 manual page first appeared in
492 manual page was written by