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35 .Nm pci_disable_busmaster ,
37 .Nm pci_enable_busmaster ,
45 .Nm pci_find_pcie_root_port ,
47 .Nm pci_get_max_read_req ,
48 .Nm pci_get_powerstate ,
49 .Nm pci_get_vpd_ident ,
50 .Nm pci_get_vpd_readonly ,
55 .Nm pci_msix_pba_bar ,
56 .Nm pci_msix_table_bar ,
57 .Nm pci_pending_msix ,
61 .Nm pci_restore_state ,
63 .Nm pci_set_max_read_req ,
64 .Nm pci_set_powerstate ,
65 .Nm pci_write_config ,
66 .Nm pcie_adjust_config ,
67 .Nm pcie_read_config ,
75 .Fn pci_alloc_msi "device_t dev" "int *count"
77 .Fn pci_alloc_msix "device_t dev" "int *count"
79 .Fn pci_disable_busmaster "device_t dev"
81 .Fn pci_disable_io "device_t dev" "int space"
83 .Fn pci_enable_busmaster "device_t dev"
85 .Fn pci_enable_io "device_t dev" "int space"
87 .Fn pci_find_bsf "uint8_t bus" "uint8_t slot" "uint8_t func"
89 .Fn pci_find_cap "device_t dev" "int capability" "int *capreg"
91 .Fn pci_find_dbsf "uint32_t domain" "uint8_t bus" "uint8_t slot" "uint8_t func"
93 .Fn pci_find_device "uint16_t vendor" "uint16_t device"
95 .Fn pci_find_extcap "device_t dev" "int capability" "int *capreg"
97 .Fn pci_find_htcap "device_t dev" "int capability" "int *capreg"
99 .Fn pci_find_pcie_root_port "device_t dev"
101 .Fn pci_get_id "device_t dev" "enum pci_id_type type" "uintptr_t *id"
103 .Fn pci_get_max_read_req "device_t dev"
105 .Fn pci_get_powerstate "device_t dev"
107 .Fn pci_get_vpd_ident "device_t dev" "const char **identptr"
109 .Fn pci_get_vpd_readonly "device_t dev" "const char *kw" "const char **vptr"
111 .Fn pci_msi_count "device_t dev"
113 .Fn pci_msix_count "device_t dev"
115 .Fn pci_msix_pba_bar "device_t dev"
117 .Fn pci_msix_table_bar "device_t dev"
119 .Fn pci_pending_msix "device_t dev" "u_int index"
121 .Fn pci_read_config "device_t dev" "int reg" "int width"
123 .Fn pci_release_msi "device_t dev"
125 .Fn pci_remap_msix "device_t dev" "int count" "const u_int *vectors"
127 .Fn pci_restore_state "device_t dev"
129 .Fn pci_save_state "device_t dev"
131 .Fn pci_set_max_read_req "device_t dev" "int size"
133 .Fn pci_set_powerstate "device_t dev" "int state"
135 .Fn pci_write_config "device_t dev" "int reg" "uint32_t val" "int width"
137 .Fo pcie_adjust_config
145 .Fn pcie_read_config "device_t dev" "int reg" "int width"
147 .Fn pcie_write_config "device_t dev" "int reg" "uint32_t val" "int width"
148 .In dev/pci/pci_iov.h
150 .Fn pci_iov_attach "device_t dev" "nvlist_t *pf_schema" "nvlist_t *vf_schema"
152 .Fn pci_iov_detach "device_t dev"
156 set of functions are used for managing PCI devices.
157 The functions are split into several groups:
158 raw configuration access,
161 device configuration,
163 message signaled interrupts.
164 .Ss Raw Configuration Access
167 function is used to read data from the PCI configuration
174 specifying the size of the access.
178 function is used to write the value
180 to the PCI configuration
187 specifying the size of the access.
190 .Fn pcie_adjust_config
191 function is used to modify the value of a register in the PCI-express
192 capability register set of device
196 specifies a relative offset in the register set with
198 specifying the size of the access.
199 The new value of the register is computed by modifying bits set in
203 Any bits not specified in
206 The previous value of the register is returned.
210 function is used to read the value of a register in the PCI-express
211 capability register set of device
215 specifies a relative offset in the register set with
217 specifying the size of the access.
220 .Fn pcie_write_config
221 function is used to write the value
223 to a register in the PCI-express capability register set of device
227 specifies a relative offset in the register set with
229 specifying the size of the access.
232 Device drivers should only use these functions for functionality that
233 is not available via another
239 function looks up the
241 of a PCI device, given its
248 number actually refers to the number of the device on the bus,
249 which does not necessarily indicate its geographic location
250 in terms of a physical slot.
251 Note that in case the system has multiple PCI domains,
254 function only searches the first one.
255 Actually, it is equivalent to:
256 .Bd -literal -offset indent
257 pci_find_dbsf(0, bus, slot, func);
262 function looks up the
264 of a PCI device, given its
272 number actually refers to the number of the device on the bus,
273 which does not necessarily indicate its geographic location
274 in terms of a physical slot.
278 function looks up the
280 of a PCI device, given its
285 Note that there can be multiple matches for this search; this function
286 only returns the first matching device.
287 .Ss Device Information
290 function is used to locate the first instance of a PCI capability
291 register set for the device
293 The capability to locate is specified by ID via
295 Constant macros of the form
297 for standard capability IDs are defined in
298 .In dev/pci/pcireg.h .
299 If the capability is found, then
301 is set to the offset in configuration space of the capability register set,
305 If the capability is not found or the device does not support capabilities,
311 function is used to locate the first instance of a PCI-express
312 extended capability register set for the device
314 The extended capability to locate is specified by ID via
316 Constant macros of the form
318 for standard extended capability IDs are defined in
319 .In dev/pci/pcireg.h .
320 If the extended capability is found, then
322 is set to the offset in configuration space of the extended capability
326 If the extended capability is not found or the device is not a
333 function is used to locate the first instance of a HyperTransport capability
334 register set for the device
336 The capability to locate is specified by type via
338 Constant macros of the form
340 for standard HyperTransport capability types are defined in
341 .In dev/pci/pcireg.h .
342 If the capability is found, then
344 is set to the offset in configuration space of the capability register set,
348 If the capability is not found or the device is not a HyperTransport device,
353 .Fn pci_find_pcie_root_port
354 function walks up the PCI device hierarchy to locate the PCI-express root
357 If a root port is not found,
358 .Fn pci_find_pcie_root_port
364 function is used to read an identifier from a device.
367 flag is used to specify which identifier to read.
368 The following flags are supported:
369 .Bl -hang -width ".Dv PCI_ID_RID"
371 Read the routing identifier for the device.
373 Read the MSI routing ID.
374 This is needed by some interrupt controllers to route MSI and MSI-X interrupts.
378 .Fn pci_get_vpd_ident
379 function is used to fetch a device's Vital Product Data
384 supports VPD and provides an identifier string,
387 is set to point at a read-only, null-terminated copy of the identifier
390 .Fn pci_get_vpd_ident
392 If the device does not support VPD or does not provide an identifier
395 .Fn pci_get_vpd_ident
399 .Fn pci_get_vpd_readonly
400 function is used to fetch the value of a single VPD read-only keyword
403 The keyword to fetch is identified by the two character string
405 If the device supports VPD and provides a read-only value for the
409 is set to point at a read-only, null-terminated copy of the value,
411 .Fn pci_get_vpd_readonly
413 If the device does not support VPD or does not provide the requested
416 .Fn pci_get_vpd_readonly
418 .Ss Device Configuration
420 .Fn pci_enable_busmaster
421 function enables PCI bus mastering for the device
424 .Dv PCIM_CMD_BUSMASTEREN
429 .Fn pci_disable_busmaster
430 function clears this bit.
434 function enables memory or I/O port address decoding for the device
442 register appropriately.
445 function clears the appropriate bit.
448 argument specifies which resource is affected; this can be either
453 Device drivers should generally not use these routines directly.
454 The PCI bus will enable decoding automatically when a
458 resource is activated via
459 .Xr bus_alloc_resource 9
461 .Xr bus_activate_resource 9 .
464 .Fn pci_get_max_read_req
465 function returns the current maximum read request size in bytes for a
469 device is not a PCI-express device,
470 .Fn pci_get_max_read_req
474 .Fn pci_set_max_read_req
475 sets the PCI-express maximum read request size for
481 .Fn pci_set_max_read_req
482 returns the actual size set in bytes.
485 device is not a PCI-express device,
486 .Fn pci_set_max_read_req
490 .Fn pci_get_powerstate
491 function returns the current power state of the device
493 If the device does not support power management capabilities, then the default
495 .Dv PCI_POWERSTATE_D0
497 The following power states are defined by PCI:
498 .Bl -hang -width ".Dv PCI_POWERSTATE_UNKNOWN"
499 .It Dv PCI_POWERSTATE_D0
500 State in which device is on and running.
501 It is receiving full power from the system and delivering
502 full functionality to the user.
503 .It Dv PCI_POWERSTATE_D1
504 Class-specific low-power state in which device context may or
506 Busses in this state cannot do anything to the bus, to
507 force devices to lose context.
508 .It Dv PCI_POWERSTATE_D2
509 Class-specific low-power state in which device context may or
511 Attains greater power savings than
512 .Dv PCI_POWERSTATE_D1 .
513 Busses in this state can cause devices to lose some context.
516 be prepared for the bus to be in this state or higher.
517 .It Dv PCI_POWERSTATE_D3
518 State in which the device is off and not running.
519 Device context is lost, and power from the device can
521 .It Dv PCI_POWERSTATE_UNKNOWN
522 State of the device is unknown.
526 .Fn pci_set_powerstate
527 function is used to transition the device
529 to the PCI power state
531 If the device does not support power management capabilities or
532 it does not support the specific power state
534 then the function will fail with
539 function is used to advertise that the given device
540 .Pq and associated device driver
541 supports PCI Single-Root I/O Virtualization
543 A driver that supports SR-IOV must implement the
549 This function should be called during the
552 If this function returns an error, it is recommended that the device driver
553 still successfully attaches, but runs with SR-IOV disabled.
558 parameters are used to define what device-specific configuration parameters the
559 device driver accepts when SR-IOV is enabled for the Physical Function
561 and for individual Virtual Functions
566 for details on how to construct the schema.
571 is invalid or specifies parameter names that conflict with parameter names that
574 will return an error and SR-IOV will not be available on the PF device.
575 If a driver does not accept configuration parameters for either the PF device
576 or the VF devices, the driver must pass an empty schema for that device.
577 The SR-IOV infrastructure takes ownership of the
581 and is responsible for freeing them.
582 The driver must never free the schemas itself.
586 function is used to advise the SR-IOV infrastructure that the driver for the
587 given device is attempting to detach and that all SR-IOV resources for the
588 device must be released.
589 This function must be called during the
593 was successfully called on the device and
595 has not subsequently been called on the device and returned no error.
596 If this function returns an error, the
598 method must fail and return an error, as detaching the PF driver while VF
599 devices are active would cause system instability.
600 This function is safe to call and will always succeed if
602 previously failed with an error on the given device, or if
604 was never called on the device.
609 .Fn pci_restore_state
610 functions can be used by a device driver to save and restore standard PCI
614 function must be invoked while the device has valid state before
615 .Fn pci_restore_state
617 If the device is not in the fully-powered state
618 .Pq Dv PCI_POWERSTATE_D0
620 .Fn pci_restore_state
622 then the device will be transitioned to
623 .Dv PCI_POWERSTATE_D0
624 before any config registers are restored.
625 .Ss Message Signaled Interrupts
626 Message Signaled Interrupts
629 Enhanced Message Signaled Interrupts
631 are PCI capabilities that provide an alternate method for PCI
632 devices to signal interrupts.
633 The legacy INTx interrupt is available to PCI devices as a
635 resource with a resource ID of zero.
636 MSI and MSI-X interrupts are available to PCI devices as one or more
638 resources with resource IDs greater than zero.
639 A driver must ask the PCI bus to allocate MSI or MSI-X interrupts
644 before it can use MSI or MSI-X
647 A driver is not allowed to use the legacy INTx
649 resource if MSI or MSI-X interrupts have been allocated,
650 and attempts to allocate MSI or MSI-X interrupts will fail if the
651 driver is currently using the legacy INTx
654 A driver is only allowed to use either MSI or MSI-X,
659 function returns the maximum number of MSI messages supported by the
662 If the device does not support MSI,
669 function attempts to allocate
671 MSI messages for the device
675 function may allocate fewer messages than requested for various
676 reasons including requests for more messages than the device
679 or if the system has a shortage of available MSI messages.
682 is set to the number of messages allocated and
687 resources for the allocated messages will be available at consecutive
688 resource IDs beginning with one.
691 is not able to allocate any messages,
693 Note that MSI only supports message counts that are powers of two;
694 requests to allocate a non-power of two count of messages will fail.
698 function is used to release any allocated MSI or MSI-X messages back
702 resources are allocated by the driver or have a configured interrupt
704 this function will fail with
708 function returns zero on success and an error on failure.
712 function returns the maximum number of MSI-X messages supported by the
715 If the device does not support MSI-X,
722 function returns the offset in configuration space of the Base Address Register
724 containing the MSI-X Pending Bit Array (PBA) for device
726 The returned value can be used as the resource ID with
727 .Xr bus_alloc_resource 9
729 .Xr bus_release_resource 9
731 If the device does not support MSI-X,
737 .Fn pci_msix_table_bar
738 function returns the offset in configuration space of the BAR
739 containing the MSI-X vector table for device
741 The returned value can be used as the resource ID with
742 .Xr bus_alloc_resource 9
744 .Xr bus_release_resource 9
746 If the device does not support MSI-X,
748 .Fn pci_msix_table_bar
753 function attempts to allocate
755 MSI-X messages for the device
759 function may allocate fewer messages than requested for various
760 reasons including requests for more messages than the device
763 or if the system has a shortage of available MSI-X messages.
766 is set to the number of messages allocated and
770 the resource ID for each
772 resource identifies the index in the MSI-X table of the
773 corresponding message.
774 A resource ID of one maps to the first index of the MSI-X table;
775 a resource ID two identifies the second index in the table, etc.
780 messages allocated to the first
785 is not able to allocate any messages,
788 MSI-X does not require message counts that are powers of two.
790 The BARs containing the MSI-X vector table and PBA must be
792 .Xr bus_alloc_resource 9
795 and must not be released until after calling
796 .Fn pci_release_msi .
797 Note that the vector table and PBA may be stored in the same BAR or in
802 function examines the
805 to determine the pending status of the MSI-X message at table index
807 If the indicated message is pending,
808 this function returns a non-zero value;
813 to this function will result in undefined behavior.
815 As mentioned in the description of
817 MSI-X messages are initially assigned to the first N table entries.
818 A driver may use a different distribution of available messages to
819 table entries via the
822 Note that this function must be called after a successful call to
824 but before any of the
826 resources are allocated.
829 function returns zero on success,
830 or an error on failure.
837 The array maps directly to the MSI-X table in that the first entry in
838 the array specifies the message used for the first entry in the MSI-X
840 the second entry in the array corresponds to the second entry in the
843 The vector value in each array index can either be zero to indicate
844 that no message should be assigned to the corresponding MSI-X table entry,
845 or it can be a number from one to N
847 where N is the count returned from the previous call to
850 to indicate which of the allocated messages should be assigned to the
851 corresponding MSI-X table entry.
856 each MSI-X table entry with a non-zero vector will have an associated
858 resource whose resource ID corresponds to the table index as described
861 MSI-X table entries that with a vector of zero will not have an
866 if any of the original messages allocated by
868 are not used in the new distribution of messages in the MSI-X table,
869 they will be released automatically.
870 Note that if a driver wishes to use fewer messages than were allocated by
872 the driver must use a single, contiguous range of messages beginning
873 with one in the new distribution.
876 function will fail if this condition is not met.
877 .Sh IMPLEMENTATION NOTES
880 type varies according to the size of the PCI bus address
881 space on the target architecture.
885 .Xr bus_alloc_resource 9 ,
887 .Xr bus_release_resource 9 ,
888 .Xr bus_setup_intr 9 ,
889 .Xr bus_teardown_intr 9 ,
895 .%B FreeBSD Developers' Handbook
897 .%U http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/developers-handbook/
902 .%B PCI System Architecture
905 .%O ISBN 0-201-30974-2
909 This manual page was written by
910 .An Bruce M Simpson Aq Mt bms@FreeBSD.org
912 .An John Baldwin Aq Mt jhb@FreeBSD.org .
914 The kernel PCI code has a number of references to
916 These do not refer to the geographic location of PCI devices,
917 but to the device number assigned by the combination of the PCI IDSEL
918 mechanism and the platform firmware.
919 This should be taken note of when working with the kernel PCI code.
921 The PCI bus driver should allocate the MSI-X vector table and PBA internally
922 as necessary rather than requiring the caller to do so.