1 //===-- EmulateInstructionMIPS.h ------------------------------------*- C++
4 // The LLVM Compiler Infrastructure
6 // This file is distributed under the University of Illinois Open Source
7 // License. See LICENSE.TXT for details.
9 //===----------------------------------------------------------------------===//
11 #ifndef EmulateInstructionMIPS_h_
12 #define EmulateInstructionMIPS_h_
16 class MCSubtargetInfo;
24 #include "lldb/Core/EmulateInstruction.h"
25 #include "lldb/Core/Error.h"
26 #include "lldb/Interpreter/OptionValue.h"
28 class EmulateInstructionMIPS : public lldb_private::EmulateInstruction {
30 static void Initialize();
32 static void Terminate();
34 static lldb_private::ConstString GetPluginNameStatic();
36 static const char *GetPluginDescriptionStatic();
38 static lldb_private::EmulateInstruction *
39 CreateInstance(const lldb_private::ArchSpec &arch,
40 lldb_private::InstructionType inst_type);
42 static bool SupportsEmulatingInstructionsOfTypeStatic(
43 lldb_private::InstructionType inst_type) {
45 case lldb_private::eInstructionTypeAny:
46 case lldb_private::eInstructionTypePrologueEpilogue:
47 case lldb_private::eInstructionTypePCModifying:
50 case lldb_private::eInstructionTypeAll:
56 lldb_private::ConstString GetPluginName() override;
58 uint32_t GetPluginVersion() override { return 1; }
60 bool SetTargetTriple(const lldb_private::ArchSpec &arch) override;
62 EmulateInstructionMIPS(const lldb_private::ArchSpec &arch);
64 bool SupportsEmulatingInstructionsOfType(
65 lldb_private::InstructionType inst_type) override {
66 return SupportsEmulatingInstructionsOfTypeStatic(inst_type);
69 bool ReadInstruction() override;
71 bool EvaluateInstruction(uint32_t evaluate_options) override;
73 bool SetInstruction(const lldb_private::Opcode &insn_opcode,
74 const lldb_private::Address &inst_addr,
75 lldb_private::Target *target) override;
77 bool TestEmulation(lldb_private::Stream *out_stream,
78 lldb_private::ArchSpec &arch,
79 lldb_private::OptionValueDictionary *test_data) override {
83 bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
84 lldb_private::RegisterInfo ®_info) override;
87 CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;
92 bool (EmulateInstructionMIPS::*callback)(llvm::MCInst &insn);
93 const char *insn_name;
96 static MipsOpcode *GetOpcodeForInstruction(const char *op_name);
98 uint32_t GetSizeOfInstruction(lldb_private::DataExtractor &data,
101 bool Emulate_ADDiu(llvm::MCInst &insn);
103 bool Emulate_SUBU_ADDU(llvm::MCInst &insn);
105 bool Emulate_LUI(llvm::MCInst &insn);
107 bool Emulate_SW(llvm::MCInst &insn);
109 bool Emulate_LW(llvm::MCInst &insn);
111 bool Emulate_ADDIUSP(llvm::MCInst &insn);
113 bool Emulate_ADDIUS5(llvm::MCInst &insn);
115 bool Emulate_SWSP(llvm::MCInst &insn);
117 bool Emulate_SWM16_32(llvm::MCInst &insn);
119 bool Emulate_LWSP(llvm::MCInst &insn);
121 bool Emulate_LWM16_32(llvm::MCInst &insn);
123 bool Emulate_JRADDIUSP(llvm::MCInst &insn);
125 bool Emulate_LDST_Imm(llvm::MCInst &insn);
127 bool Emulate_LDST_Reg(llvm::MCInst &insn);
129 bool Emulate_BXX_3ops(llvm::MCInst &insn);
131 bool Emulate_BXX_3ops_C(llvm::MCInst &insn);
133 bool Emulate_BXX_2ops(llvm::MCInst &insn);
135 bool Emulate_BXX_2ops_C(llvm::MCInst &insn);
137 bool Emulate_Bcond_Link_C(llvm::MCInst &insn);
139 bool Emulate_Bcond_Link(llvm::MCInst &insn);
141 bool Emulate_FP_branch(llvm::MCInst &insn);
143 bool Emulate_3D_branch(llvm::MCInst &insn);
145 bool Emulate_BAL(llvm::MCInst &insn);
147 bool Emulate_BALC(llvm::MCInst &insn);
149 bool Emulate_BC(llvm::MCInst &insn);
151 bool Emulate_J(llvm::MCInst &insn);
153 bool Emulate_JAL(llvm::MCInst &insn);
155 bool Emulate_JALR(llvm::MCInst &insn);
157 bool Emulate_JIALC(llvm::MCInst &insn);
159 bool Emulate_JIC(llvm::MCInst &insn);
161 bool Emulate_JR(llvm::MCInst &insn);
163 bool Emulate_BC1EQZ(llvm::MCInst &insn);
165 bool Emulate_BC1NEZ(llvm::MCInst &insn);
167 bool Emulate_BNZB(llvm::MCInst &insn);
169 bool Emulate_BNZH(llvm::MCInst &insn);
171 bool Emulate_BNZW(llvm::MCInst &insn);
173 bool Emulate_BNZD(llvm::MCInst &insn);
175 bool Emulate_BZB(llvm::MCInst &insn);
177 bool Emulate_BZH(llvm::MCInst &insn);
179 bool Emulate_BZW(llvm::MCInst &insn);
181 bool Emulate_BZD(llvm::MCInst &insn);
183 bool Emulate_MSA_Branch_DF(llvm::MCInst &insn, int element_byte_size,
186 bool Emulate_BNZV(llvm::MCInst &insn);
188 bool Emulate_BZV(llvm::MCInst &insn);
190 bool Emulate_MSA_Branch_V(llvm::MCInst &insn, bool bnz);
192 bool Emulate_B16_MM(llvm::MCInst &insn);
194 bool Emulate_Branch_MM(llvm::MCInst &insn);
196 bool Emulate_JALRx16_MM(llvm::MCInst &insn);
198 bool Emulate_JALx(llvm::MCInst &insn);
200 bool Emulate_JALRS(llvm::MCInst &insn);
202 bool nonvolatile_reg_p(uint32_t regnum);
204 const char *GetRegisterName(unsigned reg_num, bool altnernate_name);
207 std::unique_ptr<llvm::MCDisassembler> m_disasm;
208 std::unique_ptr<llvm::MCDisassembler> m_alt_disasm;
209 std::unique_ptr<llvm::MCSubtargetInfo> m_subtype_info;
210 std::unique_ptr<llvm::MCSubtargetInfo> m_alt_subtype_info;
211 std::unique_ptr<llvm::MCRegisterInfo> m_reg_info;
212 std::unique_ptr<llvm::MCAsmInfo> m_asm_info;
213 std::unique_ptr<llvm::MCContext> m_context;
214 std::unique_ptr<llvm::MCInstrInfo> m_insn_info;
215 uint32_t m_next_inst_size;
216 bool m_use_alt_disaasm;
219 #endif // EmulateInstructionMIPS_h_