1 //===-- RegisterContextLinux_arm.cpp ---------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===---------------------------------------------------------------------===//
14 #include "lldb/lldb-defines.h"
15 #include "llvm/Support/Compiler.h"
17 #include "RegisterContextLinux_arm.h"
20 using namespace lldb_private;
22 // Based on RegisterContextDarwin_arm.cpp
23 #define GPR_OFFSET(idx) ((idx)*4)
24 #define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterContextLinux_arm::GPR))
25 #define FPSCR_OFFSET \
26 (LLVM_EXTENSION offsetof(RegisterContextLinux_arm::FPU, fpscr) + \
27 sizeof(RegisterContextLinux_arm::GPR))
28 #define EXC_OFFSET(idx) \
29 ((idx)*4 + sizeof(RegisterContextLinux_arm::GPR) + \
30 sizeof(RegisterContextLinux_arm::FPU))
31 #define DBG_OFFSET(reg) \
32 ((LLVM_EXTENSION offsetof(RegisterContextLinux_arm::DBG, reg) + \
33 sizeof(RegisterContextLinux_arm::GPR) + \
34 sizeof(RegisterContextLinux_arm::FPU) + \
35 sizeof(RegisterContextLinux_arm::EXC)))
37 #define DEFINE_DBG(reg, i) \
38 #reg, NULL, sizeof(((RegisterContextLinux_arm::DBG *) NULL)->reg[i]), \
39 DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, \
40 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
41 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
44 #define REG_CONTEXT_SIZE \
45 (sizeof(RegisterContextLinux_arm::GPR) + \
46 sizeof(RegisterContextLinux_arm::FPU) + \
47 sizeof(RegisterContextLinux_arm::EXC))
49 //-----------------------------------------------------------------------------
50 // Include RegisterInfos_arm to declare our g_register_infos_arm structure.
51 //-----------------------------------------------------------------------------
52 #define DECLARE_REGISTER_INFOS_ARM_STRUCT
53 #include "RegisterInfos_arm.h"
54 #undef DECLARE_REGISTER_INFOS_ARM_STRUCT
56 static const lldb_private::RegisterInfo *
57 GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
58 switch (target_arch.GetMachine()) {
59 case llvm::Triple::arm:
60 return g_register_infos_arm;
62 assert(false && "Unhandled target architecture.");
68 GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
69 switch (target_arch.GetMachine()) {
70 case llvm::Triple::arm:
71 return static_cast<uint32_t>(sizeof(g_register_infos_arm) /
72 sizeof(g_register_infos_arm[0]));
74 assert(false && "Unhandled target architecture.");
79 RegisterContextLinux_arm::RegisterContextLinux_arm(
80 const lldb_private::ArchSpec &target_arch)
81 : lldb_private::RegisterInfoInterface(target_arch),
82 m_register_info_p(GetRegisterInfoPtr(target_arch)),
83 m_register_info_count(GetRegisterInfoCount(target_arch)) {}
85 size_t RegisterContextLinux_arm::GetGPRSize() const {
86 return sizeof(struct RegisterContextLinux_arm::GPR);
89 const lldb_private::RegisterInfo *
90 RegisterContextLinux_arm::GetRegisterInfo() const {
91 return m_register_info_p;
94 uint32_t RegisterContextLinux_arm::GetRegisterCount() const {
95 return m_register_info_count;