1 //===-- RegisterInfos_x86_64.h ----------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/Support/Compiler.h"
16 // Computes the offset of the given GPR in the user data area.
17 #define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))
19 // Computes the offset of the given FPR in the extended data area.
20 #define FPR_OFFSET(regname) \
21 (LLVM_EXTENSION offsetof(UserArea, fpr) + \
22 LLVM_EXTENSION offsetof(FPR, xstate) + \
23 LLVM_EXTENSION offsetof(FXSAVE, regname))
25 // Computes the offset of the YMM register assembled from register halves.
26 // Based on DNBArchImplX86_64.cpp from debugserver
27 #define YMM_OFFSET(reg_index) \
28 (LLVM_EXTENSION offsetof(UserArea, fpr) + \
29 LLVM_EXTENSION offsetof(FPR, xstate) + \
30 LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + (32 * reg_index))
32 #define BNDR_OFFSET(reg_index) \
33 (LLVM_EXTENSION offsetof(UserArea, fpr) + \
34 LLVM_EXTENSION offsetof(FPR, xstate) + \
35 LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]))
37 #define BNDC_OFFSET(reg_index) \
38 (LLVM_EXTENSION offsetof(UserArea, fpr) + \
39 LLVM_EXTENSION offsetof(FPR, xstate) + \
40 LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]))
42 #ifdef DECLARE_REGISTER_INFOS_X86_64_STRUCT
44 // Number of bytes needed to represent a FPR.
45 #define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg)
47 // Number of bytes needed to represent the i'th FP register.
48 #define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes)
50 // Number of bytes needed to represent an XMM register.
51 #define XMM_SIZE sizeof(XMMReg)
53 // Number of bytes needed to represent a YMM register.
54 #define YMM_SIZE sizeof(YMMReg)
56 // Number of bytes needed to represent MPX registers.
57 #define BNDR_SIZE sizeof(MPXReg)
58 #define BNDC_SIZE sizeof(MPXCsr)
60 #define DR_SIZE sizeof(((DBG *)nullptr)->dr[0])
62 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
64 // Note that the size and offset will be updated by platform-specific classes.
65 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
67 #reg, alt, sizeof(((GPR *)nullptr)->reg), \
68 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
69 {kind1, kind2, kind3, kind4, \
70 lldb_##reg##_x86_64 }, \
71 nullptr, nullptr, nullptr, 0 \
74 #define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
76 #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
77 {kind1, kind2, kind3, kind4, \
78 lldb_##name##_x86_64 }, \
79 nullptr, nullptr, nullptr, 0 \
82 #define DEFINE_FP_ST(reg, i) \
84 #reg #i, nullptr, FP_SIZE, \
85 LLVM_EXTENSION FPR_OFFSET( \
86 stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \
87 {dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, \
88 LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \
89 nullptr, nullptr, nullptr, 0 \
92 #define DEFINE_FP_MM(reg, i) \
94 #reg #i, nullptr, sizeof(uint64_t), \
95 LLVM_EXTENSION FPR_OFFSET( \
96 stmm[i]), eEncodingUint, eFormatHex, \
97 {dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, \
98 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
99 lldb_mm##i##_x86_64 }, \
100 nullptr, nullptr, nullptr, 0 \
103 #define DEFINE_XMM(reg, i) \
105 #reg #i, nullptr, XMM_SIZE, \
106 LLVM_EXTENSION FPR_OFFSET( \
107 reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
108 {dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, \
109 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
110 lldb_##reg##i##_x86_64 }, \
111 nullptr, nullptr, nullptr, 0 \
114 #define DEFINE_YMM(reg, i) \
116 #reg #i, nullptr, YMM_SIZE, \
117 LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \
118 {dwarf_##reg##i##h_x86_64, \
119 dwarf_##reg##i##h_x86_64, \
120 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
121 lldb_##reg##i##_x86_64 }, \
122 nullptr, nullptr, nullptr, 0 \
125 #define DEFINE_BNDR(reg, i) \
127 #reg #i, nullptr, BNDR_SIZE, \
128 LLVM_EXTENSION BNDR_OFFSET(i), eEncodingVector, eFormatVectorOfUInt64, \
129 {dwarf_##reg##i##_x86_64, \
130 dwarf_##reg##i##_x86_64, \
131 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
132 lldb_##reg##i##_x86_64 }, \
133 nullptr, nullptr, nullptr, 0 \
136 #define DEFINE_BNDC(name, i) \
138 #name, nullptr, BNDC_SIZE, \
139 LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \
140 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
141 LLDB_INVALID_REGNUM, lldb_##name##_x86_64 }, \
142 nullptr, nullptr, nullptr, 0 \
145 #define DEFINE_DR(reg, i) \
147 #reg #i, nullptr, DR_SIZE, \
148 DR_OFFSET(i), eEncodingUint, eFormatHex, \
149 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
150 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
151 LLDB_INVALID_REGNUM }, \
152 nullptr, nullptr, nullptr, 0 \
155 #define DEFINE_GPR_PSEUDO_32(reg32, reg64) \
157 #reg32, nullptr, 4, \
158 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
159 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
160 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
161 lldb_##reg32##_x86_64 }, \
162 RegisterContextPOSIX_x86::g_contained_##reg64, \
163 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
166 #define DEFINE_GPR_PSEUDO_16(reg16, reg64) \
168 #reg16, nullptr, 2, \
169 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
170 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
171 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
172 lldb_##reg16##_x86_64 }, \
173 RegisterContextPOSIX_x86::g_contained_##reg64, \
174 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
177 #define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \
180 GPR_OFFSET(reg64) + 1, eEncodingUint, eFormatHex, \
181 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
182 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
183 lldb_##reg8##_x86_64 }, \
184 RegisterContextPOSIX_x86::g_contained_##reg64, \
185 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
188 #define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \
191 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
192 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
193 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
194 lldb_##reg8##_x86_64 }, \
195 RegisterContextPOSIX_x86::g_contained_##reg64, \
196 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
200 static RegisterInfo g_register_infos_x86_64[] = {
201 // General purpose registers EH_Frame DWARF Generic Process Plugin
202 // =========================== ================== ================ ========================= ====================
203 DEFINE_GPR(rax, nullptr, dwarf_rax_x86_64, dwarf_rax_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
204 DEFINE_GPR(rbx, nullptr, dwarf_rbx_x86_64, dwarf_rbx_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
205 DEFINE_GPR(rcx, "arg4", dwarf_rcx_x86_64, dwarf_rcx_x86_64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM),
206 DEFINE_GPR(rdx, "arg3", dwarf_rdx_x86_64, dwarf_rdx_x86_64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM),
207 DEFINE_GPR(rdi, "arg1", dwarf_rdi_x86_64, dwarf_rdi_x86_64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM),
208 DEFINE_GPR(rsi, "arg2", dwarf_rsi_x86_64, dwarf_rsi_x86_64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM),
209 DEFINE_GPR(rbp, "fp", dwarf_rbp_x86_64, dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM),
210 DEFINE_GPR(rsp, "sp", dwarf_rsp_x86_64, dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM),
211 DEFINE_GPR(r8, "arg5", dwarf_r8_x86_64, dwarf_r8_x86_64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM),
212 DEFINE_GPR(r9, "arg6", dwarf_r9_x86_64, dwarf_r9_x86_64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM),
213 DEFINE_GPR(r10, nullptr, dwarf_r10_x86_64, dwarf_r10_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
214 DEFINE_GPR(r11, nullptr, dwarf_r11_x86_64, dwarf_r11_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
215 DEFINE_GPR(r12, nullptr, dwarf_r12_x86_64, dwarf_r12_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
216 DEFINE_GPR(r13, nullptr, dwarf_r13_x86_64, dwarf_r13_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
217 DEFINE_GPR(r14, nullptr, dwarf_r14_x86_64, dwarf_r14_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
218 DEFINE_GPR(r15, nullptr, dwarf_r15_x86_64, dwarf_r15_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
219 DEFINE_GPR(rip, "pc", dwarf_rip_x86_64, dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
220 DEFINE_GPR(rflags, "flags", dwarf_rflags_x86_64, dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
221 DEFINE_GPR(cs, nullptr, dwarf_cs_x86_64, dwarf_cs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
222 DEFINE_GPR(fs, nullptr, dwarf_fs_x86_64, dwarf_fs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
223 DEFINE_GPR(gs, nullptr, dwarf_gs_x86_64, dwarf_gs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
224 DEFINE_GPR(ss, nullptr, dwarf_ss_x86_64, dwarf_ss_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
225 DEFINE_GPR(ds, nullptr, dwarf_ds_x86_64, dwarf_ds_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
226 DEFINE_GPR(es, nullptr, dwarf_es_x86_64, dwarf_es_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
228 DEFINE_GPR_PSEUDO_32(eax, rax), DEFINE_GPR_PSEUDO_32(ebx, rbx),
229 DEFINE_GPR_PSEUDO_32(ecx, rcx), DEFINE_GPR_PSEUDO_32(edx, rdx),
230 DEFINE_GPR_PSEUDO_32(edi, rdi), DEFINE_GPR_PSEUDO_32(esi, rsi),
231 DEFINE_GPR_PSEUDO_32(ebp, rbp), DEFINE_GPR_PSEUDO_32(esp, rsp),
232 DEFINE_GPR_PSEUDO_32(r8d, r8), DEFINE_GPR_PSEUDO_32(r9d, r9),
233 DEFINE_GPR_PSEUDO_32(r10d, r10), DEFINE_GPR_PSEUDO_32(r11d, r11),
234 DEFINE_GPR_PSEUDO_32(r12d, r12), DEFINE_GPR_PSEUDO_32(r13d, r13),
235 DEFINE_GPR_PSEUDO_32(r14d, r14), DEFINE_GPR_PSEUDO_32(r15d, r15),
236 DEFINE_GPR_PSEUDO_16(ax, rax), DEFINE_GPR_PSEUDO_16(bx, rbx),
237 DEFINE_GPR_PSEUDO_16(cx, rcx), DEFINE_GPR_PSEUDO_16(dx, rdx),
238 DEFINE_GPR_PSEUDO_16(di, rdi), DEFINE_GPR_PSEUDO_16(si, rsi),
239 DEFINE_GPR_PSEUDO_16(bp, rbp), DEFINE_GPR_PSEUDO_16(sp, rsp),
240 DEFINE_GPR_PSEUDO_16(r8w, r8), DEFINE_GPR_PSEUDO_16(r9w, r9),
241 DEFINE_GPR_PSEUDO_16(r10w, r10), DEFINE_GPR_PSEUDO_16(r11w, r11),
242 DEFINE_GPR_PSEUDO_16(r12w, r12), DEFINE_GPR_PSEUDO_16(r13w, r13),
243 DEFINE_GPR_PSEUDO_16(r14w, r14), DEFINE_GPR_PSEUDO_16(r15w, r15),
244 DEFINE_GPR_PSEUDO_8H(ah, rax), DEFINE_GPR_PSEUDO_8H(bh, rbx),
245 DEFINE_GPR_PSEUDO_8H(ch, rcx), DEFINE_GPR_PSEUDO_8H(dh, rdx),
246 DEFINE_GPR_PSEUDO_8L(al, rax), DEFINE_GPR_PSEUDO_8L(bl, rbx),
247 DEFINE_GPR_PSEUDO_8L(cl, rcx), DEFINE_GPR_PSEUDO_8L(dl, rdx),
248 DEFINE_GPR_PSEUDO_8L(dil, rdi), DEFINE_GPR_PSEUDO_8L(sil, rsi),
249 DEFINE_GPR_PSEUDO_8L(bpl, rbp), DEFINE_GPR_PSEUDO_8L(spl, rsp),
250 DEFINE_GPR_PSEUDO_8L(r8l, r8), DEFINE_GPR_PSEUDO_8L(r9l, r9),
251 DEFINE_GPR_PSEUDO_8L(r10l, r10), DEFINE_GPR_PSEUDO_8L(r11l, r11),
252 DEFINE_GPR_PSEUDO_8L(r12l, r12), DEFINE_GPR_PSEUDO_8L(r13l, r13),
253 DEFINE_GPR_PSEUDO_8L(r14l, r14), DEFINE_GPR_PSEUDO_8L(r15l, r15),
255 // i387 Floating point registers. EH_frame DWARF Generic Process Plugin
256 // ====================================== =============== ================== =================== ====================
257 DEFINE_FPR(fctrl, fctrl, dwarf_fctrl_x86_64, dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
258 DEFINE_FPR(fstat, fstat, dwarf_fstat_x86_64, dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
259 DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
260 DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
261 DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
262 DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
263 DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
264 DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
265 DEFINE_FPR(mxcsr, mxcsr, dwarf_mxcsr_x86_64, dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
266 DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
269 DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2),
270 DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5),
271 DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), DEFINE_FP_MM(mm, 0),
272 DEFINE_FP_MM(mm, 1), DEFINE_FP_MM(mm, 2), DEFINE_FP_MM(mm, 3),
273 DEFINE_FP_MM(mm, 4), DEFINE_FP_MM(mm, 5), DEFINE_FP_MM(mm, 6),
277 DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2),
278 DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5),
279 DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7), DEFINE_XMM(xmm, 8),
280 DEFINE_XMM(xmm, 9), DEFINE_XMM(xmm, 10), DEFINE_XMM(xmm, 11),
281 DEFINE_XMM(xmm, 12), DEFINE_XMM(xmm, 13), DEFINE_XMM(xmm, 14),
284 // Copy of YMM registers assembled from xmm and ymmh
285 DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2),
286 DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5),
287 DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7), DEFINE_YMM(ymm, 8),
288 DEFINE_YMM(ymm, 9), DEFINE_YMM(ymm, 10), DEFINE_YMM(ymm, 11),
289 DEFINE_YMM(ymm, 12), DEFINE_YMM(ymm, 13), DEFINE_YMM(ymm, 14),
298 DEFINE_BNDC(bndcfgu, 0),
299 DEFINE_BNDC(bndstatus, 1),
301 // Debug registers for lldb internal use
302 DEFINE_DR(dr, 0), DEFINE_DR(dr, 1), DEFINE_DR(dr, 2), DEFINE_DR(dr, 3),
303 DEFINE_DR(dr, 4), DEFINE_DR(dr, 5), DEFINE_DR(dr, 6), DEFINE_DR(dr, 7)};
307 static_assert((sizeof(g_register_infos_x86_64) /
308 sizeof(g_register_infos_x86_64[0])) == k_num_registers_x86_64,
309 "g_register_infos_x86_64 has wrong number of register infos");
323 #undef DEFINE_GPR_PSEUDO_32
324 #undef DEFINE_GPR_PSEUDO_16
325 #undef DEFINE_GPR_PSEUDO_8H
326 #undef DEFINE_GPR_PSEUDO_8L
328 #endif // DECLARE_REGISTER_INFOS_X86_64_STRUCT
330 #ifdef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
332 #define UPDATE_GPR_INFO(reg, reg64) \
334 g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64); \
337 #define UPDATE_GPR_INFO_8H(reg, reg64) \
339 g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1; \
342 #define UPDATE_FPR_INFO(reg, reg64) \
344 g_register_infos[lldb_##reg##_i386].byte_offset = FPR_OFFSET(reg64); \
347 #define UPDATE_FP_INFO(reg, i) \
349 g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]); \
352 #define UPDATE_XMM_INFO(reg, i) \
354 g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]); \
357 #define UPDATE_YMM_INFO(reg, i) \
359 g_register_infos[lldb_##reg##i##_i386].byte_offset = YMM_OFFSET(i); \
362 #define UPDATE_DR_INFO(reg_index) \
364 g_register_infos[lldb_dr##reg_index##_i386].byte_offset = \
365 DR_OFFSET(reg_index); \
368 // Update the register offsets
369 UPDATE_GPR_INFO(eax, rax);
370 UPDATE_GPR_INFO(ebx, rbx);
371 UPDATE_GPR_INFO(ecx, rcx);
372 UPDATE_GPR_INFO(edx, rdx);
373 UPDATE_GPR_INFO(edi, rdi);
374 UPDATE_GPR_INFO(esi, rsi);
375 UPDATE_GPR_INFO(ebp, rbp);
376 UPDATE_GPR_INFO(esp, rsp);
377 UPDATE_GPR_INFO(eip, rip);
378 UPDATE_GPR_INFO(eflags, rflags);
379 UPDATE_GPR_INFO(cs, cs);
380 UPDATE_GPR_INFO(fs, fs);
381 UPDATE_GPR_INFO(gs, gs);
382 UPDATE_GPR_INFO(ss, ss);
383 UPDATE_GPR_INFO(ds, ds);
384 UPDATE_GPR_INFO(es, es);
386 UPDATE_GPR_INFO(ax, rax);
387 UPDATE_GPR_INFO(bx, rbx);
388 UPDATE_GPR_INFO(cx, rcx);
389 UPDATE_GPR_INFO(dx, rdx);
390 UPDATE_GPR_INFO(di, rdi);
391 UPDATE_GPR_INFO(si, rsi);
392 UPDATE_GPR_INFO(bp, rbp);
393 UPDATE_GPR_INFO(sp, rsp);
394 UPDATE_GPR_INFO_8H(ah, rax);
395 UPDATE_GPR_INFO_8H(bh, rbx);
396 UPDATE_GPR_INFO_8H(ch, rcx);
397 UPDATE_GPR_INFO_8H(dh, rdx);
398 UPDATE_GPR_INFO(al, rax);
399 UPDATE_GPR_INFO(bl, rbx);
400 UPDATE_GPR_INFO(cl, rcx);
401 UPDATE_GPR_INFO(dl, rdx);
403 UPDATE_FPR_INFO(fctrl, fctrl);
404 UPDATE_FPR_INFO(fstat, fstat);
405 UPDATE_FPR_INFO(ftag, ftag);
406 UPDATE_FPR_INFO(fop, fop);
407 UPDATE_FPR_INFO(fiseg, ptr.i386_.fiseg);
408 UPDATE_FPR_INFO(fioff, ptr.i386_.fioff);
409 UPDATE_FPR_INFO(fooff, ptr.i386_.fooff);
410 UPDATE_FPR_INFO(foseg, ptr.i386_.foseg);
411 UPDATE_FPR_INFO(mxcsr, mxcsr);
412 UPDATE_FPR_INFO(mxcsrmask, mxcsrmask);
414 UPDATE_FP_INFO(st, 0);
415 UPDATE_FP_INFO(st, 1);
416 UPDATE_FP_INFO(st, 2);
417 UPDATE_FP_INFO(st, 3);
418 UPDATE_FP_INFO(st, 4);
419 UPDATE_FP_INFO(st, 5);
420 UPDATE_FP_INFO(st, 6);
421 UPDATE_FP_INFO(st, 7);
422 UPDATE_FP_INFO(mm, 0);
423 UPDATE_FP_INFO(mm, 1);
424 UPDATE_FP_INFO(mm, 2);
425 UPDATE_FP_INFO(mm, 3);
426 UPDATE_FP_INFO(mm, 4);
427 UPDATE_FP_INFO(mm, 5);
428 UPDATE_FP_INFO(mm, 6);
429 UPDATE_FP_INFO(mm, 7);
431 UPDATE_XMM_INFO(xmm, 0);
432 UPDATE_XMM_INFO(xmm, 1);
433 UPDATE_XMM_INFO(xmm, 2);
434 UPDATE_XMM_INFO(xmm, 3);
435 UPDATE_XMM_INFO(xmm, 4);
436 UPDATE_XMM_INFO(xmm, 5);
437 UPDATE_XMM_INFO(xmm, 6);
438 UPDATE_XMM_INFO(xmm, 7);
440 UPDATE_YMM_INFO(ymm, 0);
441 UPDATE_YMM_INFO(ymm, 1);
442 UPDATE_YMM_INFO(ymm, 2);
443 UPDATE_YMM_INFO(ymm, 3);
444 UPDATE_YMM_INFO(ymm, 4);
445 UPDATE_YMM_INFO(ymm, 5);
446 UPDATE_YMM_INFO(ymm, 6);
447 UPDATE_YMM_INFO(ymm, 7);
458 #undef UPDATE_GPR_INFO
459 #undef UPDATE_GPR_INFO_8H
460 #undef UPDATE_FPR_INFO
461 #undef UPDATE_FP_INFO
462 #undef UPDATE_XMM_INFO
463 #undef UPDATE_YMM_INFO
464 #undef UPDATE_DR_INFO
466 #endif // UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS