src/arm/am33xx-l4.dtsi

   1 &l4_wkup {                                              /* 0x44c00000 */
   2         compatible = "ti,am33xx-l4-wkup", "simple-bus";
   3         reg = <0x44c00000 0x800>,
   4               <0x44c00800 0x800>,
   5               <0x44c01000 0x400>,
   6               <0x44c01400 0x400>;
   7         reg-names = "ap", "la", "ia0", "ia1";
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10         ranges = <0x00000000 0x44c00000 0x100000>,      /* segment 0 */
  11                  <0x00100000 0x44d00000 0x100000>,      /* segment 1 */
  12                  <0x00200000 0x44e00000 0x100000>;      /* segment 2 */
  13
  14         segment@0 {                                     /* 0x44c00000 */
  15                 compatible = "simple-bus";
  16                 #address-cells = <1>;
  17                 #size-cells = <1>;
  18                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  19                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
  20                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
  21                          <0x00001400 0x00001400 0x000400>;      /* ap 3 */
  22         };
  23
  24         segment@100000 {                                        /* 0x44d00000 */
  25                 compatible = "simple-bus";
  26                 #address-cells = <1>;
  27                 #size-cells = <1>;
  28                 ranges = <0x00000000 0x00100000 0x004000>,      /* ap 4 */
  29                          <0x00004000 0x00104000 0x001000>,      /* ap 5 */
  30                          <0x00080000 0x00180000 0x002000>,      /* ap 6 */
  31                          <0x00082000 0x00182000 0x001000>;      /* ap 7 */
  32
  33                 target-module@0 {                       /* 0x44d00000, ap 4 28.0 */
  34                         compatible = "ti,sysc-omap4", "ti,sysc";
  35                         reg = <0x0 0x4>;
  36                         reg-names = "rev";
  37                         #address-cells = <1>;
  38                         #size-cells = <1>;
  39                         ranges = <0x0 0x0 0x4000>;
  40                         status = "disabled";
  41                 };
  42
  43                 target-module@80000 {                   /* 0x44d80000, ap 6 10.0 */
  44                         compatible = "ti,sysc";
  45                         status = "disabled";
  46                         #address-cells = <1>;
  47                         #size-cells = <1>;
  48                         ranges = <0x0 0x80000 0x2000>;
  49                 };
  50         };
  51
  52         segment@200000 {                                        /* 0x44e00000 */
  53                 compatible = "simple-bus";
  54                 #address-cells = <1>;
  55                 #size-cells = <1>;
  56                 ranges = <0x00000000 0x00200000 0x002000>,      /* ap 8 */
  57                          <0x00002000 0x00202000 0x001000>,      /* ap 9 */
  58                          <0x00003000 0x00203000 0x001000>,      /* ap 10 */
  59                          <0x00004000 0x00204000 0x001000>,      /* ap 11 */
  60                          <0x00005000 0x00205000 0x001000>,      /* ap 12 */
  61                          <0x00006000 0x00206000 0x001000>,      /* ap 13 */
  62                          <0x00007000 0x00207000 0x001000>,      /* ap 14 */
  63                          <0x00008000 0x00208000 0x001000>,      /* ap 15 */
  64                          <0x00009000 0x00209000 0x001000>,      /* ap 16 */
  65                          <0x0000a000 0x0020a000 0x001000>,      /* ap 17 */
  66                          <0x0000b000 0x0020b000 0x001000>,      /* ap 18 */
  67                          <0x0000c000 0x0020c000 0x001000>,      /* ap 19 */
  68                          <0x0000d000 0x0020d000 0x001000>,      /* ap 20 */
  69                          <0x0000f000 0x0020f000 0x001000>,      /* ap 21 */
  70                          <0x00010000 0x00210000 0x010000>,      /* ap 22 */
  71                          <0x00020000 0x00220000 0x010000>,      /* ap 23 */
  72                          <0x00030000 0x00230000 0x001000>,      /* ap 24 */
  73                          <0x00031000 0x00231000 0x001000>,      /* ap 25 */
  74                          <0x00032000 0x00232000 0x001000>,      /* ap 26 */
  75                          <0x00033000 0x00233000 0x001000>,      /* ap 27 */
  76                          <0x00034000 0x00234000 0x001000>,      /* ap 28 */
  77                          <0x00035000 0x00235000 0x001000>,      /* ap 29 */
  78                          <0x00036000 0x00236000 0x001000>,      /* ap 30 */
  79                          <0x00037000 0x00237000 0x001000>,      /* ap 31 */
  80                          <0x00038000 0x00238000 0x001000>,      /* ap 32 */
  81                          <0x00039000 0x00239000 0x001000>,      /* ap 33 */
  82                          <0x0003a000 0x0023a000 0x001000>,      /* ap 34 */
  83                          <0x0003e000 0x0023e000 0x001000>,      /* ap 35 */
  84                          <0x0003f000 0x0023f000 0x001000>,      /* ap 36 */
  85                          <0x0000e000 0x0020e000 0x001000>,      /* ap 37 */
  86                          <0x00040000 0x00240000 0x040000>,      /* ap 38 */
  87                          <0x00080000 0x00280000 0x001000>;      /* ap 39 */
  88
  89                 target-module@0 {                       /* 0x44e00000, ap 8 58.0 */
  90                         compatible = "ti,sysc-omap4", "ti,sysc";
  91                         reg = <0 0x4>;
  92                         reg-names = "rev";
  93                         #address-cells = <1>;
  94                         #size-cells = <1>;
  95                         ranges = <0x0 0x0 0x2000>;
  96
  97                         prcm: prcm@0 {
  98                                 compatible = "ti,am3-prcm", "simple-bus";
  99                                 reg = <0 0x2000>;
 100                                 #address-cells = <1>;
 101                                 #size-cells = <1>;
 102                                 ranges = <0 0 0x2000>;
 103
 104                                 prcm_clocks: clocks {
 105                                         #address-cells = <1>;
 106                                         #size-cells = <0>;
 107                                 };
 108
 109                                 prcm_clockdomains: clockdomains {
 110                                 };
 111                         };
 112                 };
 113
 114                 target-module@3000 {                    /* 0x44e03000, ap 10 0a.0 */
 115                         compatible = "ti,sysc";
 116                         status = "disabled";
 117                         #address-cells = <1>;
 118                         #size-cells = <1>;
 119                         ranges = <0x0 0x3000 0x1000>;
 120                 };
 121
 122                 target-module@5000 {                    /* 0x44e05000, ap 12 30.0 */
 123                         compatible = "ti,sysc";
 124                         status = "disabled";
 125                         #address-cells = <1>;
 126                         #size-cells = <1>;
 127                         ranges = <0x0 0x5000 0x1000>;
 128                 };
 129
 130                 gpio0_target: target-module@7000 {      /* 0x44e07000, ap 14 20.0 */
 131                         compatible = "ti,sysc-omap2", "ti,sysc";
 132                         reg = <0x7000 0x4>,
 133                               <0x7010 0x4>,
 134                               <0x7114 0x4>;
 135                         reg-names = "rev", "sysc", "syss";
 136                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 137                                          SYSC_OMAP2_SOFTRESET |
 138                                          SYSC_OMAP2_AUTOIDLE)>;
 139                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 140                                         <SYSC_IDLE_NO>,
 141                                         <SYSC_IDLE_SMART>,
 142                                         <SYSC_IDLE_SMART_WKUP>;
 143                         ti,syss-mask = <1>;
 144                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 145                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 0>,
 146                                  <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 18>;
 147                         clock-names = "fck", "dbclk";
 148                         #address-cells = <1>;
 149                         #size-cells = <1>;
 150                         ranges = <0x0 0x7000 0x1000>;
 151
 152                         gpio0: gpio@0 {
 153                                 compatible = "ti,omap4-gpio";
 154                                 gpio-controller;
 155                                 #gpio-cells = <2>;
 156                                 interrupt-controller;
 157                                 #interrupt-cells = <2>;
 158                                 reg = <0x0 0x1000>;
 159                                 interrupts = <96>;
 160                         };
 161                 };
 162
 163                 target-module@9000 {                    /* 0x44e09000, ap 16 04.0 */
 164                         compatible = "ti,sysc-omap2", "ti,sysc";
 165                         reg = <0x9050 0x4>,
 166                               <0x9054 0x4>,
 167                               <0x9058 0x4>;
 168                         reg-names = "rev", "sysc", "syss";
 169                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 170                                          SYSC_OMAP2_SOFTRESET |
 171                                          SYSC_OMAP2_AUTOIDLE)>;
 172                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 173                                         <SYSC_IDLE_NO>,
 174                                         <SYSC_IDLE_SMART>,
 175                                         <SYSC_IDLE_SMART_WKUP>;
 176                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 177                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_UART1_CLKCTRL 0>;
 178                         clock-names = "fck";
 179                         #address-cells = <1>;
 180                         #size-cells = <1>;
 181                         ranges = <0x0 0x9000 0x1000>;
 182
 183                         uart0: serial@0 {
 184                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
 185                                 clock-frequency = <48000000>;
 186                                 reg = <0x0 0x1000>;
 187                                 interrupts = <72>;
 188                                 status = "disabled";
 189                                 dmas = <&edma 26 0>, <&edma 27 0>;
 190                                 dma-names = "tx", "rx";
 191                         };
 192                 };
 193
 194                 target-module@b000 {                    /* 0x44e0b000, ap 18 48.0 */
 195                         compatible = "ti,sysc-omap2", "ti,sysc";
 196                         reg = <0xb000 0x8>,
 197                               <0xb010 0x8>,
 198                               <0xb090 0x8>;
 199                         reg-names = "rev", "sysc", "syss";
 200                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 201                                          SYSC_OMAP2_ENAWAKEUP |
 202                                          SYSC_OMAP2_SOFTRESET |
 203                                          SYSC_OMAP2_AUTOIDLE)>;
 204                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 205                                         <SYSC_IDLE_NO>,
 206                                         <SYSC_IDLE_SMART>,
 207                                         <SYSC_IDLE_SMART_WKUP>;
 208                         ti,syss-mask = <1>;
 209                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 210                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_I2C1_CLKCTRL 0>;
 211                         clock-names = "fck";
 212                         #address-cells = <1>;
 213                         #size-cells = <1>;
 214                         ranges = <0x0 0xb000 0x1000>;
 215
 216                         i2c0: i2c@0 {
 217                                 compatible = "ti,omap4-i2c";
 218                                 #address-cells = <1>;
 219                                 #size-cells = <0>;
 220                                 reg = <0x0 0x1000>;
 221                                 interrupts = <70>;
 222                                 status = "disabled";
 223                         };
 224                 };
 225
 226                 target-module@d000 {                    /* 0x44e0d000, ap 20 38.0 */
 227                         compatible = "ti,sysc-omap4", "ti,sysc";
 228                         ti,hwmods = "adc_tsc";
 229                         reg = <0xd000 0x4>,
 230                               <0xd010 0x4>;
 231                         reg-names = "rev", "sysc";
 232                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 233                                         <SYSC_IDLE_NO>,
 234                                         <SYSC_IDLE_SMART>,
 235                                         <SYSC_IDLE_SMART_WKUP>;
 236                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 237                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_ADC_TSC_CLKCTRL 0>;
 238                         clock-names = "fck";
 239                         #address-cells = <1>;
 240                         #size-cells = <1>;
 241                         ranges = <0x00000000 0x0000d000 0x00001000>,
 242                                  <0x00001000 0x0000e000 0x00001000>;
 243
 244                                 tscadc: tscadc@0 {
 245                                         compatible = "ti,am3359-tscadc";
 246                                         reg = <0x0 0x1000>;
 247                                         interrupts = <16>;
 248                                         status = "disabled";
 249                                         dmas = <&edma 53 0>, <&edma 57 0>;
 250                                         dma-names = "fifo0", "fifo1";
 251
 252                                         tsc {
 253                                                 compatible = "ti,am3359-tsc";
 254                                         };
 255                                         am335x_adc: adc {
 256                                                 #io-channel-cells = <1>;
 257                                                 compatible = "ti,am3359-adc";
 258                                         };
 259                                 };
 260                 };
 261
 262                 target-module@10000 {                   /* 0x44e10000, ap 22 0c.0 */
 263                         compatible = "ti,sysc-omap4", "ti,sysc";
 264                         reg = <0x10000 0x4>;
 265                         reg-names = "rev";
 266                         #address-cells = <1>;
 267                         #size-cells = <1>;
 268                         ranges = <0x00000000 0x00010000 0x00010000>,
 269                                  <0x00010000 0x00020000 0x00010000>;
 270
 271                         scm: scm@0 {
 272                                 compatible = "ti,am3-scm", "simple-bus";
 273                                 reg = <0x0 0x2000>;
 274                                 #address-cells = <1>;
 275                                 #size-cells = <1>;
 276                                 #pinctrl-cells = <1>;
 277                                 ranges = <0 0 0x2000>;
 278
 279                                 am33xx_pinmux: pinmux@800 {
 280                                         compatible = "pinctrl-single";
 281                                         reg = <0x800 0x238>;
 282                                         #pinctrl-cells = <1>;
 283                                         pinctrl-single,register-width = <32>;
 284                                         pinctrl-single,function-mask = <0x7f>;
 285                                 };
 286
 287                                 scm_conf: scm_conf@0 {
 288                                         compatible = "syscon", "simple-bus";
 289                                         reg = <0x0 0x800>;
 290                                         #address-cells = <1>;
 291                                         #size-cells = <1>;
 292                                         ranges = <0 0 0x800>;
 293
 294                                         phy_gmii_sel: phy-gmii-sel {
 295                                                 compatible = "ti,am3352-phy-gmii-sel";
 296                                                 reg = <0x650 0x4>;
 297                                                 #phy-cells = <2>;
 298                                         };
 299
 300                                         scm_clocks: clocks {
 301                                                 #address-cells = <1>;
 302                                                 #size-cells = <0>;
 303                                         };
 304                                 };
 305
 306                                 usb_ctrl_mod: control@620 {
 307                                         compatible = "ti,am335x-usb-ctrl-module";
 308                                         reg = <0x620 0x10>,
 309                                               <0x648 0x4>;
 310                                         reg-names = "phy_ctrl", "wakeup";
 311                                 };
 312
 313                                 wkup_m3_ipc: wkup_m3_ipc@1324 {
 314                                         compatible = "ti,am3352-wkup-m3-ipc";
 315                                         reg = <0x1324 0x24>;
 316                                         interrupts = <78>;
 317                                         ti,rproc = <&wkup_m3>;
 318                                         mboxes = <&mailbox &mbox_wkupm3>;
 319                                 };
 320
 321                                 edma_xbar: dma-router@f90 {
 322                                         compatible = "ti,am335x-edma-crossbar";
 323                                         reg = <0xf90 0x40>;
 324                                         #dma-cells = <3>;
 325                                         dma-requests = <32>;
 326                                         dma-masters = <&edma>;
 327                                 };
 328
 329                                 scm_clockdomains: clockdomains {
 330                                 };
 331                         };
 332                 };
 333
 334                 target-module@31000 {                   /* 0x44e31000, ap 25 40.0 */
 335                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
 336                         ti,hwmods = "timer1";
 337                         reg = <0x31000 0x4>,
 338                               <0x31010 0x4>,
 339                               <0x31014 0x4>;
 340                         reg-names = "rev", "sysc", "syss";
 341                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 342                                          SYSC_OMAP2_SOFTRESET |
 343                                          SYSC_OMAP2_AUTOIDLE)>;
 344                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 345                                         <SYSC_IDLE_NO>,
 346                                         <SYSC_IDLE_SMART>;
 347                         ti,syss-mask = <1>;
 348                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 349                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>;
 350                         clock-names = "fck";
 351                         #address-cells = <1>;
 352                         #size-cells = <1>;
 353                         ranges = <0x0 0x31000 0x1000>;
 354
 355                         timer1: timer@0 {
 356                                 compatible = "ti,am335x-timer-1ms";
 357                                 reg = <0x0 0x400>;
 358                                 interrupts = <67>;
 359                                 ti,timer-alwon;
 360                                 clocks = <&timer1_fck>;
 361                                 clock-names = "fck";
 362                         };
 363                 };
 364
 365                 target-module@33000 {                   /* 0x44e33000, ap 27 18.0 */
 366                         compatible = "ti,sysc";
 367                         status = "disabled";
 368                         #address-cells = <1>;
 369                         #size-cells = <1>;
 370                         ranges = <0x0 0x33000 0x1000>;
 371                 };
 372
 373                 target-module@35000 {                   /* 0x44e35000, ap 29 50.0 */
 374                         compatible = "ti,sysc-omap2", "ti,sysc";
 375                         reg = <0x35000 0x4>,
 376                               <0x35010 0x4>,
 377                               <0x35014 0x4>;
 378                         reg-names = "rev", "sysc", "syss";
 379                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
 380                                          SYSC_OMAP2_SOFTRESET)>;
 381                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 382                                         <SYSC_IDLE_NO>,
 383                                         <SYSC_IDLE_SMART>,
 384                                         <SYSC_IDLE_SMART_WKUP>;
 385                         ti,syss-mask = <1>;
 386                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 387                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
 388                         clock-names = "fck";
 389                         #address-cells = <1>;
 390                         #size-cells = <1>;
 391                         ranges = <0x0 0x35000 0x1000>;
 392
 393                         wdt2: wdt@0 {
 394                                 compatible = "ti,omap3-wdt";
 395                                 reg = <0x0 0x1000>;
 396                                 interrupts = <91>;
 397                         };
 398                 };
 399
 400                 target-module@37000 {                   /* 0x44e37000, ap 31 08.0 */
 401                         compatible = "ti,sysc";
 402                         status = "disabled";
 403                         #address-cells = <1>;
 404                         #size-cells = <1>;
 405                         ranges = <0x0 0x37000 0x1000>;
 406                 };
 407
 408                 target-module@39000 {                   /* 0x44e39000, ap 33 02.0 */
 409                         compatible = "ti,sysc";
 410                         status = "disabled";
 411                         #address-cells = <1>;
 412                         #size-cells = <1>;
 413                         ranges = <0x0 0x39000 0x1000>;
 414                 };
 415
 416                 target-module@3e000 {                   /* 0x44e3e000, ap 35 60.0 */
 417                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 418                         ti,hwmods = "rtc";
 419                         reg = <0x3e074 0x4>,
 420                               <0x3e078 0x4>;
 421                         reg-names = "rev", "sysc";
 422                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 423                                         <SYSC_IDLE_NO>,
 424                                         <SYSC_IDLE_SMART>,
 425                                         <SYSC_IDLE_SMART_WKUP>;
 426                         /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
 427                         clocks = <&l4_rtc_clkctrl AM3_L4_RTC_RTC_CLKCTRL 0>;
 428                         clock-names = "fck";
 429                         #address-cells = <1>;
 430                         #size-cells = <1>;
 431                         ranges = <0x0 0x3e000 0x1000>;
 432
 433                         rtc: rtc@0 {
 434                                 compatible = "ti,am3352-rtc", "ti,da830-rtc";
 435                                 reg = <0x0 0x1000>;
 436                                 interrupts = <75
 437                                               76>;
 438                         };
 439                 };
 440
 441                 target-module@40000 {                   /* 0x44e40000, ap 38 68.0 */
 442                         compatible = "ti,sysc";
 443                         status = "disabled";
 444                         #address-cells = <1>;
 445                         #size-cells = <1>;
 446                         ranges = <0x0 0x40000 0x40000>;
 447                 };
 448         };
 449 };
 450
 451 &l4_fw {                                                /* 0x47c00000 */
 452         compatible = "ti,am33xx-l4-fw", "simple-bus";
 453         reg = <0x47c00000 0x800>,
 454               <0x47c00800 0x800>,
 455               <0x47c01000 0x400>;
 456         reg-names = "ap", "la", "ia0";
 457         #address-cells = <1>;
 458         #size-cells = <1>;
 459         ranges = <0x00000000 0x47c00000 0x1000000>;     /* segment 0 */
 460
 461         segment@0 {                                     /* 0x47c00000 */
 462                 compatible = "simple-bus";
 463                 #address-cells = <1>;
 464                 #size-cells = <1>;
 465                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 466                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
 467                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
 468                          <0x0000c000 0x0000c000 0x001000>,      /* ap 3 */
 469                          <0x0000d000 0x0000d000 0x001000>,      /* ap 4 */
 470                          <0x0000e000 0x0000e000 0x001000>,      /* ap 5 */
 471                          <0x0000f000 0x0000f000 0x001000>,      /* ap 6 */
 472                          <0x00010000 0x00010000 0x001000>,      /* ap 7 */
 473                          <0x00011000 0x00011000 0x001000>,      /* ap 8 */
 474                          <0x0001a000 0x0001a000 0x001000>,      /* ap 9 */
 475                          <0x0001b000 0x0001b000 0x001000>,      /* ap 10 */
 476                          <0x00024000 0x00024000 0x001000>,      /* ap 11 */
 477                          <0x00025000 0x00025000 0x001000>,      /* ap 12 */
 478                          <0x00026000 0x00026000 0x001000>,      /* ap 13 */
 479                          <0x00027000 0x00027000 0x001000>,      /* ap 14 */
 480                          <0x00030000 0x00030000 0x001000>,      /* ap 15 */
 481                          <0x00031000 0x00031000 0x001000>,      /* ap 16 */
 482                          <0x00038000 0x00038000 0x001000>,      /* ap 17 */
 483                          <0x00039000 0x00039000 0x001000>,      /* ap 18 */
 484                          <0x0003a000 0x0003a000 0x001000>,      /* ap 19 */
 485                          <0x0003b000 0x0003b000 0x001000>,      /* ap 20 */
 486                          <0x0003e000 0x0003e000 0x001000>,      /* ap 21 */
 487                          <0x0003f000 0x0003f000 0x001000>,      /* ap 22 */
 488                          <0x0003c000 0x0003c000 0x001000>,      /* ap 23 */
 489                          <0x00040000 0x00040000 0x001000>,      /* ap 24 */
 490                          <0x00046000 0x00046000 0x001000>,      /* ap 25 */
 491                          <0x00047000 0x00047000 0x001000>,      /* ap 26 */
 492                          <0x00044000 0x00044000 0x001000>,      /* ap 27 */
 493                          <0x00045000 0x00045000 0x001000>,      /* ap 28 */
 494                          <0x00028000 0x00028000 0x001000>,      /* ap 29 */
 495                          <0x00029000 0x00029000 0x001000>,      /* ap 30 */
 496                          <0x00032000 0x00032000 0x001000>,      /* ap 31 */
 497                          <0x00033000 0x00033000 0x001000>,      /* ap 32 */
 498                          <0x0003d000 0x0003d000 0x001000>,      /* ap 33 */
 499                          <0x00041000 0x00041000 0x001000>,      /* ap 34 */
 500                          <0x00042000 0x00042000 0x001000>,      /* ap 35 */
 501                          <0x00043000 0x00043000 0x001000>,      /* ap 36 */
 502                          <0x00014000 0x00014000 0x001000>,      /* ap 37 */
 503                          <0x00015000 0x00015000 0x001000>;      /* ap 38 */
 504
 505                 target-module@c000 {                    /* 0x47c0c000, ap 3 04.0 */
 506                         compatible = "ti,sysc";
 507                         status = "disabled";
 508                         #address-cells = <1>;
 509                         #size-cells = <1>;
 510                         ranges = <0x0 0xc000 0x1000>;
 511                 };
 512
 513                 target-module@e000 {                    /* 0x47c0e000, ap 5 0c.0 */
 514                         compatible = "ti,sysc";
 515                         status = "disabled";
 516                         #address-cells = <1>;
 517                         #size-cells = <1>;
 518                         ranges = <0x0 0xe000 0x1000>;
 519                 };
 520
 521                 target-module@10000 {                   /* 0x47c10000, ap 7 20.0 */
 522                         compatible = "ti,sysc";
 523                         status = "disabled";
 524                         #address-cells = <1>;
 525                         #size-cells = <1>;
 526                         ranges = <0x0 0x10000 0x1000>;
 527                 };
 528
 529                 target-module@14000 {                   /* 0x47c14000, ap 37 3c.0 */
 530                         compatible = "ti,sysc";
 531                         status = "disabled";
 532                         #address-cells = <1>;
 533                         #size-cells = <1>;
 534                         ranges = <0x0 0x14000 0x1000>;
 535                 };
 536
 537                 target-module@1a000 {                   /* 0x47c1a000, ap 9 08.0 */
 538                         compatible = "ti,sysc";
 539                         status = "disabled";
 540                         #address-cells = <1>;
 541                         #size-cells = <1>;
 542                         ranges = <0x0 0x1a000 0x1000>;
 543                 };
 544
 545                 target-module@24000 {                   /* 0x47c24000, ap 11 28.0 */
 546                         compatible = "ti,sysc";
 547                         status = "disabled";
 548                         #address-cells = <1>;
 549                         #size-cells = <1>;
 550                         ranges = <0x0 0x24000 0x1000>;
 551                 };
 552
 553                 target-module@26000 {                   /* 0x47c26000, ap 13 30.0 */
 554                         compatible = "ti,sysc";
 555                         status = "disabled";
 556                         #address-cells = <1>;
 557                         #size-cells = <1>;
 558                         ranges = <0x0 0x26000 0x1000>;
 559                 };
 560
 561                 target-module@28000 {                   /* 0x47c28000, ap 29 40.0 */
 562                         compatible = "ti,sysc";
 563                         status = "disabled";
 564                         #address-cells = <1>;
 565                         #size-cells = <1>;
 566                         ranges = <0x0 0x28000 0x1000>;
 567                 };
 568
 569                 target-module@30000 {                   /* 0x47c30000, ap 15 14.0 */
 570                         compatible = "ti,sysc";
 571                         status = "disabled";
 572                         #address-cells = <1>;
 573                         #size-cells = <1>;
 574                         ranges = <0x0 0x30000 0x1000>;
 575                 };
 576
 577                 target-module@32000 {                   /* 0x47c32000, ap 31 06.0 */
 578                         compatible = "ti,sysc";
 579                         status = "disabled";
 580                         #address-cells = <1>;
 581                         #size-cells = <1>;
 582                         ranges = <0x0 0x32000 0x1000>;
 583                 };
 584
 585                 target-module@38000 {                   /* 0x47c38000, ap 17 18.0 */
 586                         compatible = "ti,sysc";
 587                         status = "disabled";
 588                         #address-cells = <1>;
 589                         #size-cells = <1>;
 590                         ranges = <0x0 0x38000 0x1000>;
 591                 };
 592
 593                 target-module@3a000 {                   /* 0x47c3a000, ap 19 1c.0 */
 594                         compatible = "ti,sysc";
 595                         status = "disabled";
 596                         #address-cells = <1>;
 597                         #size-cells = <1>;
 598                         ranges = <0x0 0x3a000 0x1000>;
 599                 };
 600
 601                 target-module@3c000 {                   /* 0x47c3c000, ap 23 38.0 */
 602                         compatible = "ti,sysc";
 603                         status = "disabled";
 604                         #address-cells = <1>;
 605                         #size-cells = <1>;
 606                         ranges = <0x0 0x3c000 0x1000>;
 607                 };
 608
 609                 target-module@3e000 {                   /* 0x47c3e000, ap 21 10.0 */
 610                         compatible = "ti,sysc";
 611                         status = "disabled";
 612                         #address-cells = <1>;
 613                         #size-cells = <1>;
 614                         ranges = <0x0 0x3e000 0x1000>;
 615                 };
 616
 617                 target-module@40000 {                   /* 0x47c40000, ap 24 02.0 */
 618                         compatible = "ti,sysc";
 619                         status = "disabled";
 620                         #address-cells = <1>;
 621                         #size-cells = <1>;
 622                         ranges = <0x0 0x40000 0x1000>;
 623                 };
 624
 625                 target-module@42000 {                   /* 0x47c42000, ap 35 34.0 */
 626                         compatible = "ti,sysc";
 627                         status = "disabled";
 628                         #address-cells = <1>;
 629                         #size-cells = <1>;
 630                         ranges = <0x0 0x42000 0x1000>;
 631                 };
 632
 633                 target-module@44000 {                   /* 0x47c44000, ap 27 24.0 */
 634                         compatible = "ti,sysc";
 635                         status = "disabled";
 636                         #address-cells = <1>;
 637                         #size-cells = <1>;
 638                         ranges = <0x0 0x44000 0x1000>;
 639                 };
 640
 641                 target-module@46000 {                   /* 0x47c46000, ap 25 2c.0 */
 642                         compatible = "ti,sysc";
 643                         status = "disabled";
 644                         #address-cells = <1>;
 645                         #size-cells = <1>;
 646                         ranges = <0x0 0x46000 0x1000>;
 647                 };
 648         };
 649 };
 650
 651 &l4_fast {                                      /* 0x4a000000 */
 652         compatible = "ti,am33xx-l4-fast", "simple-bus";
 653         reg = <0x4a000000 0x800>,
 654               <0x4a000800 0x800>,
 655               <0x4a001000 0x400>;
 656         reg-names = "ap", "la", "ia0";
 657         #address-cells = <1>;
 658         #size-cells = <1>;
 659         ranges = <0x00000000 0x4a000000 0x1000000>;     /* segment 0 */
 660
 661         segment@0 {                                     /* 0x4a000000 */
 662                 compatible = "simple-bus";
 663                 #address-cells = <1>;
 664                 #size-cells = <1>;
 665                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 666                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
 667                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
 668                          <0x00100000 0x00100000 0x008000>,      /* ap 3 */
 669                          <0x00108000 0x00108000 0x001000>,      /* ap 4 */
 670                          <0x00180000 0x00180000 0x020000>,      /* ap 5 */
 671                          <0x001a0000 0x001a0000 0x001000>,      /* ap 6 */
 672                          <0x00200000 0x00200000 0x080000>,      /* ap 7 */
 673                          <0x00280000 0x00280000 0x001000>,      /* ap 8 */
 674                          <0x00300000 0x00300000 0x080000>,      /* ap 9 */
 675                          <0x00380000 0x00380000 0x001000>;      /* ap 10 */
 676
 677                 target-module@100000 {                  /* 0x4a100000, ap 3 08.0 */
 678                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 679                         reg = <0x101200 0x4>,
 680                               <0x101208 0x4>,
 681                               <0x101204 0x4>;
 682                         reg-names = "rev", "sysc", "syss";
 683                         ti,sysc-mask = <0>;
 684                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 685                                         <SYSC_IDLE_NO>;
 686                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 687                                         <SYSC_IDLE_NO>;
 688                         ti,syss-mask = <1>;
 689                         clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
 690                         clock-names = "fck";
 691                         #address-cells = <1>;
 692                         #size-cells = <1>;
 693                         ranges = <0x0 0x100000 0x8000>;
 694
 695                         mac: ethernet@0 {
 696                                 compatible = "ti,am335x-cpsw","ti,cpsw";
 697                                 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
 698                                 clock-names = "fck", "cpts";
 699                                 cpdma_channels = <8>;
 700                                 ale_entries = <1024>;
 701                                 bd_ram_size = <0x2000>;
 702                                 mac_control = <0x20>;
 703                                 slaves = <2>;
 704                                 active_slave = <0>;
 705                                 cpts_clock_mult = <0x80000000>;
 706                                 cpts_clock_shift = <29>;
 707                                 reg = <0x0 0x800
 708                                        0x1200 0x100>;
 709                                 #address-cells = <1>;
 710                                 #size-cells = <1>;
 711                                 /*
 712                                  * c0_rx_thresh_pend
 713                                  * c0_rx_pend
 714                                  * c0_tx_pend
 715                                  * c0_misc_pend
 716                                  */
 717                                 interrupts = <40 41 42 43>;
 718                                 ranges = <0 0 0x8000>;
 719                                 syscon = <&scm_conf>;
 720                                 status = "disabled";
 721
 722                                 davinci_mdio: mdio@1000 {
 723                                         compatible = "ti,cpsw-mdio","ti,davinci_mdio";
 724                                         clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
 725                                         clock-names = "fck";
 726                                         #address-cells = <1>;
 727                                         #size-cells = <0>;
 728                                         bus_freq = <1000000>;
 729                                         reg = <0x1000 0x100>;
 730                                         status = "disabled";
 731                                 };
 732
 733                                 cpsw_emac0: slave@200 {
 734                                         /* Filled in by U-Boot */
 735                                         mac-address = [ 00 00 00 00 00 00 ];
 736                                         phys = <&phy_gmii_sel 1 1>;
 737                                 };
 738
 739                                 cpsw_emac1: slave@300 {
 740                                         /* Filled in by U-Boot */
 741                                         mac-address = [ 00 00 00 00 00 00 ];
 742                                         phys = <&phy_gmii_sel 2 1>;
 743                                 };
 744                         };
 745                 };
 746
 747                 target-module@180000 {                  /* 0x4a180000, ap 5 10.0 */
 748                         compatible = "ti,sysc";
 749                         status = "disabled";
 750                         #address-cells = <1>;
 751                         #size-cells = <1>;
 752                         ranges = <0x0 0x180000 0x20000>;
 753                 };
 754
 755                 target-module@200000 {                  /* 0x4a200000, ap 7 02.0 */
 756                         compatible = "ti,sysc";
 757                         status = "disabled";
 758                         #address-cells = <1>;
 759                         #size-cells = <1>;
 760                         ranges = <0x0 0x200000 0x80000>;
 761                 };
 762
 763                 target-module@300000 {                  /* 0x4a300000, ap 9 04.0 */
 764                         compatible = "ti,sysc";
 765                         status = "disabled";
 766                         #address-cells = <1>;
 767                         #size-cells = <1>;
 768                         ranges = <0x0 0x300000 0x80000>;
 769                 };
 770         };
 771 };
 772
 773 &l4_mpuss {                                             /* 0x4b140000 */
 774         compatible = "ti,am33xx-l4-mpuss", "simple-bus";
 775         reg = <0x4b144400 0x100>,
 776               <0x4b144800 0x400>;
 777         reg-names = "la", "ap";
 778         #address-cells = <1>;
 779         #size-cells = <1>;
 780         ranges = <0x00000000 0x4b140000 0x008000>;      /* segment 0 */
 781
 782         segment@0 {                                     /* 0x4b140000 */
 783                 compatible = "simple-bus";
 784                 #address-cells = <1>;
 785                 #size-cells = <1>;
 786                 ranges = <0x00004800 0x00004800 0x000400>,      /* ap 0 */
 787                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
 788                          <0x00002000 0x00002000 0x001000>,      /* ap 2 */
 789                          <0x00004000 0x00004000 0x000400>,      /* ap 3 */
 790                          <0x00005000 0x00005000 0x000400>,      /* ap 4 */
 791                          <0x00000000 0x00000000 0x001000>,      /* ap 5 */
 792                          <0x00003000 0x00003000 0x001000>,      /* ap 6 */
 793                          <0x00000800 0x00000800 0x000800>;      /* ap 7 */
 794
 795                 target-module@0 {                       /* 0x4b140000, ap 5 02.2 */
 796                         compatible = "ti,sysc";
 797                         status = "disabled";
 798                         #address-cells = <1>;
 799                         #size-cells = <1>;
 800                         ranges = <0x00000000 0x00000000 0x00001000>,
 801                                  <0x00001000 0x00001000 0x00001000>,
 802                                  <0x00002000 0x00002000 0x00001000>;
 803                 };
 804
 805                 target-module@3000 {                    /* 0x4b143000, ap 6 04.0 */
 806                         compatible = "ti,sysc";
 807                         status = "disabled";
 808                         #address-cells = <1>;
 809                         #size-cells = <1>;
 810                         ranges = <0x0 0x3000 0x1000>;
 811                 };
 812         };
 813 };
 814
 815 &l4_per {                                               /* 0x48000000 */
 816         compatible = "ti,am33xx-l4-per", "simple-bus";
 817         reg = <0x48000000 0x800>,
 818               <0x48000800 0x800>,
 819               <0x48001000 0x400>,
 820               <0x48001400 0x400>,
 821               <0x48001800 0x400>,
 822               <0x48001c00 0x400>;
 823         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
 824         #address-cells = <1>;
 825         #size-cells = <1>;
 826         ranges = <0x00000000 0x48000000 0x100000>,      /* segment 0 */
 827                  <0x00100000 0x48100000 0x100000>,      /* segment 1 */
 828                  <0x00200000 0x48200000 0x100000>,      /* segment 2 */
 829                  <0x00300000 0x48300000 0x100000>,      /* segment 3 */
 830                  <0x46000000 0x46000000 0x400000>,      /* l3 data port */
 831                  <0x46400000 0x46400000 0x400000>;      /* l3 data port */
 832
 833         segment@0 {                                     /* 0x48000000 */
 834                 compatible = "simple-bus";
 835                 #address-cells = <1>;
 836                 #size-cells = <1>;
 837                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 838                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
 839                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
 840                          <0x00001400 0x00001400 0x000400>,      /* ap 3 */
 841                          <0x00001800 0x00001800 0x000400>,      /* ap 4 */
 842                          <0x00001c00 0x00001c00 0x000400>,      /* ap 5 */
 843                          <0x00008000 0x00008000 0x001000>,      /* ap 6 */
 844                          <0x00009000 0x00009000 0x001000>,      /* ap 7 */
 845                          <0x00016000 0x00016000 0x001000>,      /* ap 8 */
 846                          <0x00017000 0x00017000 0x001000>,      /* ap 9 */
 847                          <0x00022000 0x00022000 0x001000>,      /* ap 10 */
 848                          <0x00023000 0x00023000 0x001000>,      /* ap 11 */
 849                          <0x00024000 0x00024000 0x001000>,      /* ap 12 */
 850                          <0x00025000 0x00025000 0x001000>,      /* ap 13 */
 851                          <0x0002a000 0x0002a000 0x001000>,      /* ap 14 */
 852                          <0x0002b000 0x0002b000 0x001000>,      /* ap 15 */
 853                          <0x00038000 0x00038000 0x002000>,      /* ap 16 */
 854                          <0x0003a000 0x0003a000 0x001000>,      /* ap 17 */
 855                          <0x00014000 0x00014000 0x001000>,      /* ap 18 */
 856                          <0x00015000 0x00015000 0x001000>,      /* ap 19 */
 857                          <0x0003c000 0x0003c000 0x002000>,      /* ap 20 */
 858                          <0x0003e000 0x0003e000 0x001000>,      /* ap 21 */
 859                          <0x00040000 0x00040000 0x001000>,      /* ap 22 */
 860                          <0x00041000 0x00041000 0x001000>,      /* ap 23 */
 861                          <0x00042000 0x00042000 0x001000>,      /* ap 24 */
 862                          <0x00043000 0x00043000 0x001000>,      /* ap 25 */
 863                          <0x00044000 0x00044000 0x001000>,      /* ap 26 */
 864                          <0x00045000 0x00045000 0x001000>,      /* ap 27 */
 865                          <0x00046000 0x00046000 0x001000>,      /* ap 28 */
 866                          <0x00047000 0x00047000 0x001000>,      /* ap 29 */
 867                          <0x00048000 0x00048000 0x001000>,      /* ap 30 */
 868                          <0x00049000 0x00049000 0x001000>,      /* ap 31 */
 869                          <0x0004c000 0x0004c000 0x001000>,      /* ap 32 */
 870                          <0x0004d000 0x0004d000 0x001000>,      /* ap 33 */
 871                          <0x00050000 0x00050000 0x002000>,      /* ap 34 */
 872                          <0x00052000 0x00052000 0x001000>,      /* ap 35 */
 873                          <0x00060000 0x00060000 0x001000>,      /* ap 36 */
 874                          <0x00061000 0x00061000 0x001000>,      /* ap 37 */
 875                          <0x00080000 0x00080000 0x010000>,      /* ap 38 */
 876                          <0x00090000 0x00090000 0x001000>,      /* ap 39 */
 877                          <0x000a0000 0x000a0000 0x010000>,      /* ap 40 */
 878                          <0x000b0000 0x000b0000 0x001000>,      /* ap 41 */
 879                          <0x00030000 0x00030000 0x001000>,      /* ap 77 */
 880                          <0x00031000 0x00031000 0x001000>,      /* ap 78 */
 881                          <0x0004a000 0x0004a000 0x001000>,      /* ap 85 */
 882                          <0x0004b000 0x0004b000 0x001000>,      /* ap 86 */
 883                          <0x000c8000 0x000c8000 0x001000>,      /* ap 87 */
 884                          <0x000c9000 0x000c9000 0x001000>,      /* ap 88 */
 885                          <0x000cc000 0x000cc000 0x001000>,      /* ap 89 */
 886                          <0x000cd000 0x000cd000 0x001000>,      /* ap 90 */
 887                          <0x000ca000 0x000ca000 0x001000>,      /* ap 91 */
 888                          <0x000cb000 0x000cb000 0x001000>,      /* ap 92 */
 889                          <0x46000000 0x46000000 0x400000>,      /* l3 data port */
 890                          <0x46400000 0x46400000 0x400000>;      /* l3 data port */
 891
 892                 target-module@8000 {                    /* 0x48008000, ap 6 10.0 */
 893                         compatible = "ti,sysc";
 894                         status = "disabled";
 895                         #address-cells = <1>;
 896                         #size-cells = <1>;
 897                         ranges = <0x0 0x8000 0x1000>;
 898                 };
 899
 900                 target-module@14000 {                   /* 0x48014000, ap 18 58.0 */
 901                         compatible = "ti,sysc";
 902                         status = "disabled";
 903                         #address-cells = <1>;
 904                         #size-cells = <1>;
 905                         ranges = <0x0 0x14000 0x1000>;
 906                 };
 907
 908                 target-module@16000 {                   /* 0x48016000, ap 8 3c.0 */
 909                         compatible = "ti,sysc";
 910                         status = "disabled";
 911                         #address-cells = <1>;
 912                         #size-cells = <1>;
 913                         ranges = <0x0 0x16000 0x1000>;
 914                 };
 915
 916                 target-module@22000 {                   /* 0x48022000, ap 10 12.0 */
 917                         compatible = "ti,sysc-omap2", "ti,sysc";
 918                         reg = <0x22050 0x4>,
 919                               <0x22054 0x4>,
 920                               <0x22058 0x4>;
 921                         reg-names = "rev", "sysc", "syss";
 922                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 923                                          SYSC_OMAP2_SOFTRESET |
 924                                          SYSC_OMAP2_AUTOIDLE)>;
 925                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 926                                         <SYSC_IDLE_NO>,
 927                                         <SYSC_IDLE_SMART>,
 928                                         <SYSC_IDLE_SMART_WKUP>;
 929                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
 930                         clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>;
 931                         clock-names = "fck";
 932                         #address-cells = <1>;
 933                         #size-cells = <1>;
 934                         ranges = <0x0 0x22000 0x1000>;
 935
 936                         uart1: serial@0 {
 937                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
 938                                 clock-frequency = <48000000>;
 939                                 reg = <0x0 0x1000>;
 940                                 interrupts = <73>;
 941                                 status = "disabled";
 942                                 dmas = <&edma 28 0>, <&edma 29 0>;
 943                                 dma-names = "tx", "rx";
 944                         };
 945                 };
 946
 947                 target-module@24000 {                   /* 0x48024000, ap 12 14.0 */
 948                         compatible = "ti,sysc-omap2", "ti,sysc";
 949                         reg = <0x24050 0x4>,
 950                               <0x24054 0x4>,
 951                               <0x24058 0x4>;
 952                         reg-names = "rev", "sysc", "syss";
 953                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 954                                          SYSC_OMAP2_SOFTRESET |
 955                                          SYSC_OMAP2_AUTOIDLE)>;
 956                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 957                                         <SYSC_IDLE_NO>,
 958                                         <SYSC_IDLE_SMART>,
 959                                         <SYSC_IDLE_SMART_WKUP>;
 960                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
 961                         clocks = <&l4ls_clkctrl AM3_L4LS_UART3_CLKCTRL 0>;
 962                         clock-names = "fck";
 963                         #address-cells = <1>;
 964                         #size-cells = <1>;
 965                         ranges = <0x0 0x24000 0x1000>;
 966
 967                         uart2: serial@0 {
 968                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
 969                                 clock-frequency = <48000000>;
 970                                 reg = <0x0 0x1000>;
 971                                 interrupts = <74>;
 972                                 status = "disabled";
 973                                 dmas = <&edma 30 0>, <&edma 31 0>;
 974                                 dma-names = "tx", "rx";
 975                         };
 976                 };
 977
 978                 target-module@2a000 {                   /* 0x4802a000, ap 14 2a.0 */
 979                         compatible = "ti,sysc-omap2", "ti,sysc";
 980                         reg = <0x2a000 0x8>,
 981                               <0x2a010 0x8>,
 982                               <0x2a090 0x8>;
 983                         reg-names = "rev", "sysc", "syss";
 984                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 985                                          SYSC_OMAP2_ENAWAKEUP |
 986                                          SYSC_OMAP2_SOFTRESET |
 987                                          SYSC_OMAP2_AUTOIDLE)>;
 988                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 989                                         <SYSC_IDLE_NO>,
 990                                         <SYSC_IDLE_SMART>,
 991                                         <SYSC_IDLE_SMART_WKUP>;
 992                         ti,syss-mask = <1>;
 993                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
 994                         clocks = <&l4ls_clkctrl AM3_L4LS_I2C2_CLKCTRL 0>;
 995                         clock-names = "fck";
 996                         #address-cells = <1>;
 997                         #size-cells = <1>;
 998                         ranges = <0x0 0x2a000 0x1000>;
 999
1000                         i2c1: i2c@0 {
1001                                 compatible = "ti,omap4-i2c";
1002                                 #address-cells = <1>;
1003                                 #size-cells = <0>;
1004                                 reg = <0x0 0x1000>;
1005                                 interrupts = <71>;
1006                                 status = "disabled";
1007                         };
1008                 };
1009
1010                 target-module@30000 {                   /* 0x48030000, ap 77 08.0 */
1011                         compatible = "ti,sysc-omap2", "ti,sysc";
1012                         ti,hwmods = "spi0";
1013                         reg = <0x30000 0x4>,
1014                               <0x30110 0x4>,
1015                               <0x30114 0x4>;
1016                         reg-names = "rev", "sysc", "syss";
1017                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1018                                          SYSC_OMAP2_SOFTRESET |
1019                                          SYSC_OMAP2_AUTOIDLE)>;
1020                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1021                                         <SYSC_IDLE_NO>,
1022                                         <SYSC_IDLE_SMART>;
1023                         ti,syss-mask = <1>;
1024                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1025                         clocks = <&l4ls_clkctrl AM3_L4LS_SPI0_CLKCTRL 0>;
1026                         clock-names = "fck";
1027                         #address-cells = <1>;
1028                         #size-cells = <1>;
1029                         ranges = <0x0 0x30000 0x1000>;
1030
1031                         spi0: spi@0 {
1032                                 compatible = "ti,omap4-mcspi";
1033                                 #address-cells = <1>;
1034                                 #size-cells = <0>;
1035                                 reg = <0x0 0x400>;
1036                                 interrupts = <65>;
1037                                 ti,spi-num-cs = <2>;
1038                                 dmas = <&edma 16 0
1039                                         &edma 17 0
1040                                         &edma 18 0
1041                                         &edma 19 0>;
1042                                 dma-names = "tx0", "rx0", "tx1", "rx1";
1043                                 status = "disabled";
1044                         };
1045                 };
1046
1047                 target-module@38000 {                   /* 0x48038000, ap 16 02.0 */
1048                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
1049                         reg = <0x38000 0x4>,
1050                               <0x38004 0x4>;
1051                         reg-names = "rev", "sysc";
1052                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1053                                         <SYSC_IDLE_NO>,
1054                                         <SYSC_IDLE_SMART>;
1055                         /* Domains (P, C): per_pwrdm, l3s_clkdm */
1056                         clocks = <&l3s_clkctrl AM3_L3S_MCASP0_CLKCTRL 0>;
1057                         clock-names = "fck";
1058                         #address-cells = <1>;
1059                         #size-cells = <1>;
1060                         ranges = <0x0 0x38000 0x2000>,
1061                                  <0x46000000 0x46000000 0x400000>;
1062
1063                         mcasp0: mcasp@0 {
1064                                 compatible = "ti,am33xx-mcasp-audio";
1065                                 reg = <0x0 0x2000>,
1066                                       <0x46000000 0x400000>;
1067                                 reg-names = "mpu", "dat";
1068                                 interrupts = <80>, <81>;
1069                                 interrupt-names = "tx", "rx";
1070                                 status = "disabled";
1071                                 dmas = <&edma 8 2>,
1072                                         <&edma 9 2>;
1073                                 dma-names = "tx", "rx";
1074                         };
1075                 };
1076
1077                 target-module@3c000 {                   /* 0x4803c000, ap 20 32.0 */
1078                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
1079                         reg = <0x3c000 0x4>,
1080                               <0x3c004 0x4>;
1081                         reg-names = "rev", "sysc";
1082                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1083                                         <SYSC_IDLE_NO>,
1084                                         <SYSC_IDLE_SMART>;
1085                         /* Domains (P, C): per_pwrdm, l3s_clkdm */
1086                         clocks = <&l3s_clkctrl AM3_L3S_MCASP1_CLKCTRL 0>;
1087                         clock-names = "fck";
1088                         #address-cells = <1>;
1089                         #size-cells = <1>;
1090                         ranges = <0x0 0x3c000 0x2000>,
1091                                  <0x46400000 0x46400000 0x400000>;
1092
1093                         mcasp1: mcasp@0 {
1094                                 compatible = "ti,am33xx-mcasp-audio";
1095                                 reg = <0x0 0x2000>,
1096                                       <0x46400000 0x400000>;
1097                                 reg-names = "mpu", "dat";
1098                                 interrupts = <82>, <83>;
1099                                 interrupt-names = "tx", "rx";
1100                                 status = "disabled";
1101                                 dmas = <&edma 10 2>,
1102                                         <&edma 11 2>;
1103                                 dma-names = "tx", "rx";
1104                         };
1105                 };
1106
1107                 target-module@40000 {                   /* 0x48040000, ap 22 1e.0 */
1108                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1109                         ti,hwmods = "timer2";
1110                         reg = <0x40000 0x4>,
1111                               <0x40010 0x4>,
1112                               <0x40014 0x4>;
1113                         reg-names = "rev", "sysc", "syss";
1114                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1115                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1116                                         <SYSC_IDLE_NO>,
1117                                         <SYSC_IDLE_SMART>,
1118                                         <SYSC_IDLE_SMART_WKUP>;
1119                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1120                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>;
1121                         clock-names = "fck";
1122                         #address-cells = <1>;
1123                         #size-cells = <1>;
1124                         ranges = <0x0 0x40000 0x1000>;
1125
1126                         timer2: timer@0 {
1127                                 compatible = "ti,am335x-timer";
1128                                 reg = <0x0 0x400>;
1129                                 interrupts = <68>;
1130                                 clocks = <&timer2_fck>;
1131                                 clock-names = "fck";
1132                         };
1133                 };
1134
1135                 target-module@42000 {                   /* 0x48042000, ap 24 1c.0 */
1136                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1137                         ti,hwmods = "timer3";
1138                         reg = <0x42000 0x4>,
1139                               <0x42010 0x4>,
1140                               <0x42014 0x4>;
1141                         reg-names = "rev", "sysc", "syss";
1142                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1143                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1144                                         <SYSC_IDLE_NO>,
1145                                         <SYSC_IDLE_SMART>,
1146                                         <SYSC_IDLE_SMART_WKUP>;
1147                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1148                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER3_CLKCTRL 0>;
1149                         clock-names = "fck";
1150                         #address-cells = <1>;
1151                         #size-cells = <1>;
1152                         ranges = <0x0 0x42000 0x1000>;
1153
1154                         timer3: timer@0 {
1155                                 compatible = "ti,am335x-timer";
1156                                 reg = <0x0 0x400>;
1157                                 interrupts = <69>;
1158                         };
1159                 };
1160
1161                 target-module@44000 {                   /* 0x48044000, ap 26 26.0 */
1162                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1163                         ti,hwmods = "timer4";
1164                         reg = <0x44000 0x4>,
1165                               <0x44010 0x4>,
1166                               <0x44014 0x4>;
1167                         reg-names = "rev", "sysc", "syss";
1168                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1169                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1170                                         <SYSC_IDLE_NO>,
1171                                         <SYSC_IDLE_SMART>,
1172                                         <SYSC_IDLE_SMART_WKUP>;
1173                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1174                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER4_CLKCTRL 0>;
1175                         clock-names = "fck";
1176                         #address-cells = <1>;
1177                         #size-cells = <1>;
1178                         ranges = <0x0 0x44000 0x1000>;
1179
1180                         timer4: timer@0 {
1181                                 compatible = "ti,am335x-timer";
1182                                 reg = <0x0 0x400>;
1183                                 interrupts = <92>;
1184                                 ti,timer-pwm;
1185                         };
1186                 };
1187
1188                 target-module@46000 {                   /* 0x48046000, ap 28 28.0 */
1189                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1190                         ti,hwmods = "timer5";
1191                         reg = <0x46000 0x4>,
1192                               <0x46010 0x4>,
1193                               <0x46014 0x4>;
1194                         reg-names = "rev", "sysc", "syss";
1195                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1196                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1197                                         <SYSC_IDLE_NO>,
1198                                         <SYSC_IDLE_SMART>,
1199                                         <SYSC_IDLE_SMART_WKUP>;
1200                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1201                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER5_CLKCTRL 0>;
1202                         clock-names = "fck";
1203                         #address-cells = <1>;
1204                         #size-cells = <1>;
1205                         ranges = <0x0 0x46000 0x1000>;
1206
1207                         timer5: timer@0 {
1208                                 compatible = "ti,am335x-timer";
1209                                 reg = <0x0 0x400>;
1210                                 interrupts = <93>;
1211                                 ti,timer-pwm;
1212                         };
1213                 };
1214
1215                 target-module@48000 {                   /* 0x48048000, ap 30 22.0 */
1216                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1217                         ti,hwmods = "timer6";
1218                         reg = <0x48000 0x4>,
1219                               <0x48010 0x4>,
1220                               <0x48014 0x4>;
1221                         reg-names = "rev", "sysc", "syss";
1222                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1223                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1224                                         <SYSC_IDLE_NO>,
1225                                         <SYSC_IDLE_SMART>,
1226                                         <SYSC_IDLE_SMART_WKUP>;
1227                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1228                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER6_CLKCTRL 0>;
1229                         clock-names = "fck";
1230                         #address-cells = <1>;
1231                         #size-cells = <1>;
1232                         ranges = <0x0 0x48000 0x1000>;
1233
1234                         timer6: timer@0 {
1235                                 compatible = "ti,am335x-timer";
1236                                 reg = <0x0 0x400>;
1237                                 interrupts = <94>;
1238                                 ti,timer-pwm;
1239                         };
1240                 };
1241
1242                 target-module@4a000 {                   /* 0x4804a000, ap 85 60.0 */
1243                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1244                         ti,hwmods = "timer7";
1245                         reg = <0x4a000 0x4>,
1246                               <0x4a010 0x4>,
1247                               <0x4a014 0x4>;
1248                         reg-names = "rev", "sysc", "syss";
1249                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1250                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1251                                         <SYSC_IDLE_NO>,
1252                                         <SYSC_IDLE_SMART>,
1253                                         <SYSC_IDLE_SMART_WKUP>;
1254                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1255                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER7_CLKCTRL 0>;
1256                         clock-names = "fck";
1257                         #address-cells = <1>;
1258                         #size-cells = <1>;
1259                         ranges = <0x0 0x4a000 0x1000>;
1260
1261                         timer7: timer@0 {
1262                                 compatible = "ti,am335x-timer";
1263                                 reg = <0x0 0x400>;
1264                                 interrupts = <95>;
1265                                 ti,timer-pwm;
1266                         };
1267                 };
1268
1269                 target-module@4c000 {                   /* 0x4804c000, ap 32 36.0 */
1270                         compatible = "ti,sysc-omap2", "ti,sysc";
1271                         reg = <0x4c000 0x4>,
1272                               <0x4c010 0x4>,
1273                               <0x4c114 0x4>;
1274                         reg-names = "rev", "sysc", "syss";
1275                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1276                                          SYSC_OMAP2_SOFTRESET |
1277                                          SYSC_OMAP2_AUTOIDLE)>;
1278                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1279                                         <SYSC_IDLE_NO>,
1280                                         <SYSC_IDLE_SMART>,
1281                                         <SYSC_IDLE_SMART_WKUP>;
1282                         ti,syss-mask = <1>;
1283                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1284                         clocks = <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 0>,
1285                                  <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 18>;
1286                         clock-names = "fck", "dbclk";
1287                         #address-cells = <1>;
1288                         #size-cells = <1>;
1289                         ranges = <0x0 0x4c000 0x1000>;
1290
1291                         gpio1: gpio@0 {
1292                                 compatible = "ti,omap4-gpio";
1293                                 gpio-controller;
1294                                 #gpio-cells = <2>;
1295                                 interrupt-controller;
1296                                 #interrupt-cells = <2>;
1297                                 reg = <0x0 0x1000>;
1298                                 interrupts = <98>;
1299                         };
1300                 };
1301
1302                 target-module@50000 {                   /* 0x48050000, ap 34 2c.0 */
1303                         compatible = "ti,sysc";
1304                         status = "disabled";
1305                         #address-cells = <1>;
1306                         #size-cells = <1>;
1307                         ranges = <0x0 0x50000 0x2000>;
1308                 };
1309
1310                 target-module@60000 {                   /* 0x48060000, ap 36 0c.0 */
1311                         compatible = "ti,sysc-omap2", "ti,sysc";
1312                         reg = <0x602fc 0x4>,
1313                               <0x60110 0x4>,
1314                               <0x60114 0x4>;
1315                         reg-names = "rev", "sysc", "syss";
1316                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1317                                          SYSC_OMAP2_ENAWAKEUP |
1318                                          SYSC_OMAP2_SOFTRESET |
1319                                          SYSC_OMAP2_AUTOIDLE)>;
1320                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1321                                         <SYSC_IDLE_NO>,
1322                                         <SYSC_IDLE_SMART>;
1323                         ti,syss-mask = <1>;
1324                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1325                         clocks = <&l4ls_clkctrl AM3_L4LS_MMC1_CLKCTRL 0>;
1326                         clock-names = "fck";
1327                         #address-cells = <1>;
1328                         #size-cells = <1>;
1329                         ranges = <0x0 0x60000 0x1000>;
1330
1331                         mmc1: mmc@0 {
1332                                 compatible = "ti,omap4-hsmmc";
1333                                 ti,dual-volt;
1334                                 ti,needs-special-reset;
1335                                 ti,needs-special-hs-handling;
1336                                 dmas = <&edma_xbar 24 0 0
1337                                         &edma_xbar 25 0 0>;
1338                                 dma-names = "tx", "rx";
1339                                 interrupts = <64>;
1340                                 reg = <0x0 0x1000>;
1341                                 status = "disabled";
1342                         };
1343                 };
1344
1345                 target-module@80000 {                   /* 0x48080000, ap 38 18.0 */
1346                         compatible = "ti,sysc-omap2", "ti,sysc";
1347                         ti,hwmods = "elm";
1348                         reg = <0x80000 0x4>,
1349                               <0x80010 0x4>,
1350                               <0x80014 0x4>;
1351                         reg-names = "rev", "sysc", "syss";
1352                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1353                                          SYSC_OMAP2_SOFTRESET |
1354                                          SYSC_OMAP2_AUTOIDLE)>;
1355                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1356                                         <SYSC_IDLE_NO>,
1357                                         <SYSC_IDLE_SMART>;
1358                         ti,syss-mask = <1>;
1359                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1360                         clocks = <&l4ls_clkctrl AM3_L4LS_ELM_CLKCTRL 0>;
1361                         clock-names = "fck";
1362                         #address-cells = <1>;
1363                         #size-cells = <1>;
1364                         ranges = <0x0 0x80000 0x10000>;
1365
1366                         elm: elm@0 {
1367                                 compatible = "ti,am3352-elm";
1368                                 reg = <0x0 0x2000>;
1369                                 interrupts = <4>;
1370                                 status = "disabled";
1371                         };
1372                 };
1373
1374                 target-module@a0000 {                   /* 0x480a0000, ap 40 5e.0 */
1375                         compatible = "ti,sysc";
1376                         status = "disabled";
1377                         #address-cells = <1>;
1378                         #size-cells = <1>;
1379                         ranges = <0x0 0xa0000 0x10000>;
1380                 };
1381
1382                 target-module@c8000 {                   /* 0x480c8000, ap 87 06.0 */
1383                         compatible = "ti,sysc-omap4", "ti,sysc";
1384                         reg = <0xc8000 0x4>,
1385                               <0xc8010 0x4>;
1386                         reg-names = "rev", "sysc";
1387                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1388                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1389                                         <SYSC_IDLE_NO>,
1390                                         <SYSC_IDLE_SMART>;
1391                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1392                         clocks = <&l4ls_clkctrl AM3_L4LS_MAILBOX_CLKCTRL 0>;
1393                         clock-names = "fck";
1394                         #address-cells = <1>;
1395                         #size-cells = <1>;
1396                         ranges = <0x0 0xc8000 0x1000>;
1397
1398                         mailbox: mailbox@0 {
1399                                 compatible = "ti,omap4-mailbox";
1400                                 reg = <0x0 0x200>;
1401                                 interrupts = <77>;
1402                                 #mbox-cells = <1>;
1403                                 ti,mbox-num-users = <4>;
1404                                 ti,mbox-num-fifos = <8>;
1405                                 mbox_wkupm3: wkup_m3 {
1406                                         ti,mbox-send-noirq;
1407                                         ti,mbox-tx = <0 0 0>;
1408                                         ti,mbox-rx = <0 0 3>;
1409                                 };
1410                         };
1411                 };
1412
1413                 target-module@ca000 {                   /* 0x480ca000, ap 91 40.0 */
1414                         compatible = "ti,sysc-omap2", "ti,sysc";
1415                         ti,hwmods = "spinlock";
1416                         reg = <0xca000 0x4>,
1417                               <0xca010 0x4>,
1418                               <0xca014 0x4>;
1419                         reg-names = "rev", "sysc", "syss";
1420                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1421                                          SYSC_OMAP2_ENAWAKEUP |
1422                                          SYSC_OMAP2_SOFTRESET |
1423                                          SYSC_OMAP2_AUTOIDLE)>;
1424                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1425                                         <SYSC_IDLE_NO>,
1426                                         <SYSC_IDLE_SMART>;
1427                         ti,syss-mask = <1>;
1428                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1429                         clocks = <&l4ls_clkctrl AM3_L4LS_SPINLOCK_CLKCTRL 0>;
1430                         clock-names = "fck";
1431                         #address-cells = <1>;
1432                         #size-cells = <1>;
1433                         ranges = <0x0 0xca000 0x1000>;
1434
1435                         hwspinlock: spinlock@0 {
1436                                 compatible = "ti,omap4-hwspinlock";
1437                                 reg = <0x0 0x1000>;
1438                                 #hwlock-cells = <1>;
1439                         };
1440                 };
1441
1442                 target-module@cc000 {                   /* 0x480cc000, ap 89 0e.0 */
1443                         compatible = "ti,sysc";
1444                         status = "disabled";
1445                         #address-cells = <1>;
1446                         #size-cells = <1>;
1447                         ranges = <0x0 0xcc000 0x1000>;
1448                 };
1449         };
1450
1451         segment@100000 {                                        /* 0x48100000 */
1452                 compatible = "simple-bus";
1453                 #address-cells = <1>;
1454                 #size-cells = <1>;
1455                 ranges = <0x0008c000 0x0018c000 0x001000>,      /* ap 42 */
1456                          <0x0008d000 0x0018d000 0x001000>,      /* ap 43 */
1457                          <0x0008e000 0x0018e000 0x001000>,      /* ap 44 */
1458                          <0x0008f000 0x0018f000 0x001000>,      /* ap 45 */
1459                          <0x0009c000 0x0019c000 0x001000>,      /* ap 46 */
1460                          <0x0009d000 0x0019d000 0x001000>,      /* ap 47 */
1461                          <0x000a6000 0x001a6000 0x001000>,      /* ap 48 */
1462                          <0x000a7000 0x001a7000 0x001000>,      /* ap 49 */
1463                          <0x000a8000 0x001a8000 0x001000>,      /* ap 50 */
1464                          <0x000a9000 0x001a9000 0x001000>,      /* ap 51 */
1465                          <0x000aa000 0x001aa000 0x001000>,      /* ap 52 */
1466                          <0x000ab000 0x001ab000 0x001000>,      /* ap 53 */
1467                          <0x000ac000 0x001ac000 0x001000>,      /* ap 54 */
1468                          <0x000ad000 0x001ad000 0x001000>,      /* ap 55 */
1469                          <0x000ae000 0x001ae000 0x001000>,      /* ap 56 */
1470                          <0x000af000 0x001af000 0x001000>,      /* ap 57 */
1471                          <0x000b0000 0x001b0000 0x010000>,      /* ap 58 */
1472                          <0x000c0000 0x001c0000 0x001000>,      /* ap 59 */
1473                          <0x000cc000 0x001cc000 0x002000>,      /* ap 60 */
1474                          <0x000ce000 0x001ce000 0x002000>,      /* ap 61 */
1475                          <0x000d0000 0x001d0000 0x002000>,      /* ap 62 */
1476                          <0x000d2000 0x001d2000 0x002000>,      /* ap 63 */
1477                          <0x000d8000 0x001d8000 0x001000>,      /* ap 64 */
1478                          <0x000d9000 0x001d9000 0x001000>,      /* ap 65 */
1479                          <0x000a0000 0x001a0000 0x001000>,      /* ap 79 */
1480                          <0x000a1000 0x001a1000 0x001000>,      /* ap 80 */
1481                          <0x000a2000 0x001a2000 0x001000>,      /* ap 81 */
1482                          <0x000a3000 0x001a3000 0x001000>,      /* ap 82 */
1483                          <0x000a4000 0x001a4000 0x001000>,      /* ap 83 */
1484                          <0x000a5000 0x001a5000 0x001000>;      /* ap 84 */
1485
1486                 target-module@8c000 {                   /* 0x4818c000, ap 42 04.0 */
1487                         compatible = "ti,sysc";
1488                         status = "disabled";
1489                         #address-cells = <1>;
1490                         #size-cells = <1>;
1491                         ranges = <0x0 0x8c000 0x1000>;
1492                 };
1493
1494                 target-module@8e000 {                   /* 0x4818e000, ap 44 0a.0 */
1495                         compatible = "ti,sysc";
1496                         status = "disabled";
1497                         #address-cells = <1>;
1498                         #size-cells = <1>;
1499                         ranges = <0x0 0x8e000 0x1000>;
1500                 };
1501
1502                 target-module@9c000 {                   /* 0x4819c000, ap 46 5a.0 */
1503                         compatible = "ti,sysc-omap2", "ti,sysc";
1504                         reg = <0x9c000 0x8>,
1505                               <0x9c010 0x8>,
1506                               <0x9c090 0x8>;
1507                         reg-names = "rev", "sysc", "syss";
1508                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1509                                          SYSC_OMAP2_ENAWAKEUP |
1510                                          SYSC_OMAP2_SOFTRESET |
1511                                          SYSC_OMAP2_AUTOIDLE)>;
1512                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1513                                         <SYSC_IDLE_NO>,
1514                                         <SYSC_IDLE_SMART>,
1515                                         <SYSC_IDLE_SMART_WKUP>;
1516                         ti,syss-mask = <1>;
1517                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1518                         clocks = <&l4ls_clkctrl AM3_L4LS_I2C3_CLKCTRL 0>;
1519                         clock-names = "fck";
1520                         #address-cells = <1>;
1521                         #size-cells = <1>;
1522                         ranges = <0x0 0x9c000 0x1000>;
1523
1524                         i2c2: i2c@0 {
1525                                 compatible = "ti,omap4-i2c";
1526                                 #address-cells = <1>;
1527                                 #size-cells = <0>;
1528                                 reg = <0x0 0x1000>;
1529                                 interrupts = <30>;
1530                                 status = "disabled";
1531                         };
1532                 };
1533
1534                 target-module@a0000 {                   /* 0x481a0000, ap 79 24.0 */
1535                         compatible = "ti,sysc-omap2", "ti,sysc";
1536                         ti,hwmods = "spi1";
1537                         reg = <0xa0000 0x4>,
1538                               <0xa0110 0x4>,
1539                               <0xa0114 0x4>;
1540                         reg-names = "rev", "sysc", "syss";
1541                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1542                                          SYSC_OMAP2_SOFTRESET |
1543                                          SYSC_OMAP2_AUTOIDLE)>;
1544                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1545                                         <SYSC_IDLE_NO>,
1546                                         <SYSC_IDLE_SMART>;
1547                         ti,syss-mask = <1>;
1548                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1549                         clocks = <&l4ls_clkctrl AM3_L4LS_SPI1_CLKCTRL 0>;
1550                         clock-names = "fck";
1551                         #address-cells = <1>;
1552                         #size-cells = <1>;
1553                         ranges = <0x0 0xa0000 0x1000>;
1554
1555                         spi1: spi@0 {
1556                                 compatible = "ti,omap4-mcspi";
1557                                 #address-cells = <1>;
1558                                 #size-cells = <0>;
1559                                 reg = <0x0 0x400>;
1560                                 interrupts = <125>;
1561                                 ti,spi-num-cs = <2>;
1562                                 dmas = <&edma 42 0
1563                                         &edma 43 0
1564                                         &edma 44 0
1565                                         &edma 45 0>;
1566                                 dma-names = "tx0", "rx0", "tx1", "rx1";
1567                                 status = "disabled";
1568                         };
1569                 };
1570
1571                 target-module@a2000 {                   /* 0x481a2000, ap 81 2e.0 */
1572                         compatible = "ti,sysc";
1573                         status = "disabled";
1574                         #address-cells = <1>;
1575                         #size-cells = <1>;
1576                         ranges = <0x0 0xa2000 0x1000>;
1577                 };
1578
1579                 target-module@a4000 {                   /* 0x481a4000, ap 83 30.0 */
1580                         compatible = "ti,sysc";
1581                         status = "disabled";
1582                         #address-cells = <1>;
1583                         #size-cells = <1>;
1584                         ranges = <0x0 0xa4000 0x1000>;
1585                 };
1586
1587                 target-module@a6000 {                   /* 0x481a6000, ap 48 16.0 */
1588                         compatible = "ti,sysc-omap2", "ti,sysc";
1589                         reg = <0xa6050 0x4>,
1590                               <0xa6054 0x4>,
1591                               <0xa6058 0x4>;
1592                         reg-names = "rev", "sysc", "syss";
1593                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1594                                          SYSC_OMAP2_SOFTRESET |
1595                                          SYSC_OMAP2_AUTOIDLE)>;
1596                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1597                                         <SYSC_IDLE_NO>,
1598                                         <SYSC_IDLE_SMART>,
1599                                         <SYSC_IDLE_SMART_WKUP>;
1600                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1601                         clocks = <&l4ls_clkctrl AM3_L4LS_UART4_CLKCTRL 0>;
1602                         clock-names = "fck";
1603                         #address-cells = <1>;
1604                         #size-cells = <1>;
1605                         ranges = <0x0 0xa6000 0x1000>;
1606
1607                         uart3: serial@0 {
1608                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
1609                                 clock-frequency = <48000000>;
1610                                 reg = <0x0 0x1000>;
1611                                 interrupts = <44>;
1612                                 status = "disabled";
1613                         };
1614                 };
1615
1616                 target-module@a8000 {                   /* 0x481a8000, ap 50 20.0 */
1617                         compatible = "ti,sysc-omap2", "ti,sysc";
1618                         reg = <0xa8050 0x4>,
1619                               <0xa8054 0x4>,
1620                               <0xa8058 0x4>;
1621                         reg-names = "rev", "sysc", "syss";
1622                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1623                                          SYSC_OMAP2_SOFTRESET |
1624                                          SYSC_OMAP2_AUTOIDLE)>;
1625                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1626                                         <SYSC_IDLE_NO>,
1627                                         <SYSC_IDLE_SMART>,
1628                                         <SYSC_IDLE_SMART_WKUP>;
1629                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1630                         clocks = <&l4ls_clkctrl AM3_L4LS_UART5_CLKCTRL 0>;
1631                         clock-names = "fck";
1632                         #address-cells = <1>;
1633                         #size-cells = <1>;
1634                         ranges = <0x0 0xa8000 0x1000>;
1635
1636                         uart4: serial@0 {
1637                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
1638                                 clock-frequency = <48000000>;
1639                                 reg = <0x0 0x1000>;
1640                                 interrupts = <45>;
1641                                 status = "disabled";
1642                         };
1643                 };
1644
1645                 target-module@aa000 {                   /* 0x481aa000, ap 52 1a.0 */
1646                         compatible = "ti,sysc-omap2", "ti,sysc";
1647                         reg = <0xaa050 0x4>,
1648                               <0xaa054 0x4>,
1649                               <0xaa058 0x4>;
1650                         reg-names = "rev", "sysc", "syss";
1651                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1652                                          SYSC_OMAP2_SOFTRESET |
1653                                          SYSC_OMAP2_AUTOIDLE)>;
1654                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1655                                         <SYSC_IDLE_NO>,
1656                                         <SYSC_IDLE_SMART>,
1657                                         <SYSC_IDLE_SMART_WKUP>;
1658                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1659                         clocks = <&l4ls_clkctrl AM3_L4LS_UART6_CLKCTRL 0>;
1660                         clock-names = "fck";
1661                         #address-cells = <1>;
1662                         #size-cells = <1>;
1663                         ranges = <0x0 0xaa000 0x1000>;
1664
1665                         uart5: serial@0 {
1666                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
1667                                 clock-frequency = <48000000>;
1668                                 reg = <0x0 0x1000>;
1669                                 interrupts = <46>;
1670                                 status = "disabled";
1671                         };
1672                 };
1673
1674                 target-module@ac000 {                   /* 0x481ac000, ap 54 38.0 */
1675                         compatible = "ti,sysc-omap2", "ti,sysc";
1676                         reg = <0xac000 0x4>,
1677                               <0xac010 0x4>,
1678                               <0xac114 0x4>;
1679                         reg-names = "rev", "sysc", "syss";
1680                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1681                                          SYSC_OMAP2_SOFTRESET |
1682                                          SYSC_OMAP2_AUTOIDLE)>;
1683                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1684                                         <SYSC_IDLE_NO>,
1685                                         <SYSC_IDLE_SMART>,
1686                                         <SYSC_IDLE_SMART_WKUP>;
1687                         ti,syss-mask = <1>;
1688                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1689                         clocks = <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 0>,
1690                                  <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 18>;
1691                         clock-names = "fck", "dbclk";
1692                         #address-cells = <1>;
1693                         #size-cells = <1>;
1694                         ranges = <0x0 0xac000 0x1000>;
1695
1696                         gpio2: gpio@0 {
1697                                 compatible = "ti,omap4-gpio";
1698                                 gpio-controller;
1699                                 #gpio-cells = <2>;
1700                                 interrupt-controller;
1701                                 #interrupt-cells = <2>;
1702                                 reg = <0x0 0x1000>;
1703                                 interrupts = <32>;
1704                         };
1705                 };
1706
1707                 target-module@ae000 {                   /* 0x481ae000, ap 56 3a.0 */
1708                         compatible = "ti,sysc-omap2", "ti,sysc";
1709                         reg = <0xae000 0x4>,
1710                               <0xae010 0x4>,
1711                               <0xae114 0x4>;
1712                         reg-names = "rev", "sysc", "syss";
1713                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1714                                          SYSC_OMAP2_SOFTRESET |
1715                                          SYSC_OMAP2_AUTOIDLE)>;
1716                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1717                                         <SYSC_IDLE_NO>,
1718                                         <SYSC_IDLE_SMART>,
1719                                         <SYSC_IDLE_SMART_WKUP>;
1720                         ti,syss-mask = <1>;
1721                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1722                         clocks = <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 0>,
1723                                  <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 18>;
1724                         clock-names = "fck", "dbclk";
1725                         #address-cells = <1>;
1726                         #size-cells = <1>;
1727                         ranges = <0x0 0xae000 0x1000>;
1728
1729                         gpio3: gpio@0 {
1730                                 compatible = "ti,omap4-gpio";
1731                                 gpio-controller;
1732                                 #gpio-cells = <2>;
1733                                 interrupt-controller;
1734                                 #interrupt-cells = <2>;
1735                                 reg = <0x0 0x1000>;
1736                                 interrupts = <62>;
1737                         };
1738                 };
1739
1740                 target-module@b0000 {                   /* 0x481b0000, ap 58 50.0 */
1741                         compatible = "ti,sysc";
1742                         status = "disabled";
1743                         #address-cells = <1>;
1744                         #size-cells = <1>;
1745                         ranges = <0x0 0xb0000 0x10000>;
1746                 };
1747
1748                 target-module@cc000 {                   /* 0x481cc000, ap 60 46.0 */
1749                         compatible = "ti,sysc-omap4", "ti,sysc";
1750                         reg = <0xcc020 0x4>;
1751                         reg-names = "rev";
1752                         ti,hwmods = "d_can0";
1753                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1754                         clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>,
1755                                  <&dcan0_fck>;
1756                         clock-names = "fck", "osc";
1757                         #address-cells = <1>;
1758                         #size-cells = <1>;
1759                         ranges = <0x0 0xcc000 0x2000>;
1760
1761                         dcan0: can@0 {
1762                                 compatible = "ti,am3352-d_can";
1763                                 reg = <0x0 0x2000>;
1764                                 clocks = <&dcan0_fck>;
1765                                 clock-names = "fck";
1766                                 syscon-raminit = <&scm_conf 0x644 0>;
1767                                 interrupts = <52>;
1768                                 status = "disabled";
1769                         };
1770                 };
1771
1772                 target-module@d0000 {                   /* 0x481d0000, ap 62 42.0 */
1773                         compatible = "ti,sysc-omap4", "ti,sysc";
1774                         reg = <0xd0020 0x4>;
1775                         reg-names = "rev";
1776                         ti,hwmods = "d_can1";
1777                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1778                         clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>,
1779                                  <&dcan1_fck>;
1780                         clock-names = "fck", "osc";
1781                         #address-cells = <1>;
1782                         #size-cells = <1>;
1783                         ranges = <0x0 0xd0000 0x2000>;
1784
1785                         dcan1: can@0 {
1786                                 compatible = "ti,am3352-d_can";
1787                                 reg = <0x0 0x2000>;
1788                                 clocks = <&dcan1_fck>;
1789                                 clock-names = "fck";
1790                                 syscon-raminit = <&scm_conf 0x644 1>;
1791                                 interrupts = <55>;
1792                                 status = "disabled";
1793                         };
1794                 };
1795
1796                 target-module@d8000 {                   /* 0x481d8000, ap 64 66.0 */
1797                         compatible = "ti,sysc-omap2", "ti,sysc";
1798                         reg = <0xd82fc 0x4>,
1799                               <0xd8110 0x4>,
1800                               <0xd8114 0x4>;
1801                         reg-names = "rev", "sysc", "syss";
1802                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1803                                          SYSC_OMAP2_ENAWAKEUP |
1804                                          SYSC_OMAP2_SOFTRESET |
1805                                          SYSC_OMAP2_AUTOIDLE)>;
1806                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1807                                         <SYSC_IDLE_NO>,
1808                                         <SYSC_IDLE_SMART>;
1809                         ti,syss-mask = <1>;
1810                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1811                         clocks = <&l4ls_clkctrl AM3_L4LS_MMC2_CLKCTRL 0>;
1812                         clock-names = "fck";
1813                         #address-cells = <1>;
1814                         #size-cells = <1>;
1815                         ranges = <0x0 0xd8000 0x1000>;
1816
1817                         mmc2: mmc@0 {
1818                                 compatible = "ti,omap4-hsmmc";
1819                                 ti,needs-special-reset;
1820                                 dmas = <&edma 2 0
1821                                         &edma 3 0>;
1822                                 dma-names = "tx", "rx";
1823                                 interrupts = <28>;
1824                                 reg = <0x0 0x1000>;
1825                                 status = "disabled";
1826                         };
1827                 };
1828         };
1829
1830         segment@200000 {                                        /* 0x48200000 */
1831                 compatible = "simple-bus";
1832                 #address-cells = <1>;
1833                 #size-cells = <1>;
1834         };
1835
1836         segment@300000 {                                        /* 0x48300000 */
1837                 compatible = "simple-bus";
1838                 #address-cells = <1>;
1839                 #size-cells = <1>;
1840                 ranges = <0x00000000 0x00300000 0x001000>,      /* ap 66 */
1841                          <0x00001000 0x00301000 0x001000>,      /* ap 67 */
1842                          <0x00002000 0x00302000 0x001000>,      /* ap 68 */
1843                          <0x00003000 0x00303000 0x001000>,      /* ap 69 */
1844                          <0x00004000 0x00304000 0x001000>,      /* ap 70 */
1845                          <0x00005000 0x00305000 0x001000>,      /* ap 71 */
1846                          <0x0000e000 0x0030e000 0x001000>,      /* ap 72 */
1847                          <0x0000f000 0x0030f000 0x001000>,      /* ap 73 */
1848                          <0x00018000 0x00318000 0x004000>,      /* ap 74 */
1849                          <0x0001c000 0x0031c000 0x001000>,      /* ap 75 */
1850                          <0x00010000 0x00310000 0x002000>,      /* ap 76 */
1851                          <0x00012000 0x00312000 0x001000>,      /* ap 93 */
1852                          <0x00015000 0x00315000 0x001000>,      /* ap 94 */
1853                          <0x00016000 0x00316000 0x001000>,      /* ap 95 */
1854                          <0x00017000 0x00317000 0x001000>,      /* ap 96 */
1855                          <0x00013000 0x00313000 0x001000>,      /* ap 97 */
1856                          <0x00014000 0x00314000 0x001000>,      /* ap 98 */
1857                          <0x00020000 0x00320000 0x001000>,      /* ap 99 */
1858                          <0x00021000 0x00321000 0x001000>,      /* ap 100 */
1859                          <0x00022000 0x00322000 0x001000>,      /* ap 101 */
1860                          <0x00023000 0x00323000 0x001000>,      /* ap 102 */
1861                          <0x00024000 0x00324000 0x001000>,      /* ap 103 */
1862                          <0x00025000 0x00325000 0x001000>;      /* ap 104 */
1863
1864                 target-module@0 {                       /* 0x48300000, ap 66 48.0 */
1865                         compatible = "ti,sysc-omap4", "ti,sysc";
1866                         ti,hwmods = "epwmss0";
1867                         reg = <0x0 0x4>,
1868                               <0x4 0x4>;
1869                         reg-names = "rev", "sysc";
1870                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1871                                         <SYSC_IDLE_NO>,
1872                                         <SYSC_IDLE_SMART>,
1873                                         <SYSC_IDLE_SMART_WKUP>;
1874                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1875                                         <SYSC_IDLE_NO>,
1876                                         <SYSC_IDLE_SMART>,
1877                                         <SYSC_IDLE_SMART_WKUP>;
1878                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1879                         clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS0_CLKCTRL 0>;
1880                         clock-names = "fck";
1881                         #address-cells = <1>;
1882                         #size-cells = <1>;
1883                         ranges = <0x0 0x0 0x1000>;
1884
1885                         epwmss0: epwmss@0 {
1886                                 compatible = "ti,am33xx-pwmss";
1887                                 reg = <0x0 0x10>;
1888                                 #address-cells = <1>;
1889                                 #size-cells = <1>;
1890                                 status = "disabled";
1891                                 ranges = <0 0 0x1000>;
1892
1893                                 ecap0: ecap@100 {
1894                                         compatible = "ti,am3352-ecap",
1895                                                      "ti,am33xx-ecap";
1896                                         #pwm-cells = <3>;
1897                                         reg = <0x100 0x80>;
1898                                         clocks = <&l4ls_gclk>;
1899                                         clock-names = "fck";
1900                                         interrupts = <31>;
1901                                         interrupt-names = "ecap0";
1902                                         status = "disabled";
1903                                 };
1904
1905                                 ehrpwm0: pwm@200 {
1906                                         compatible = "ti,am3352-ehrpwm",
1907                                                      "ti,am33xx-ehrpwm";
1908                                         #pwm-cells = <3>;
1909                                         reg = <0x200 0x80>;
1910                                         clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1911                                         clock-names = "tbclk", "fck";
1912                                         status = "disabled";
1913                                 };
1914                         };
1915                 };
1916
1917                 target-module@2000 {                    /* 0x48302000, ap 68 52.0 */
1918                         compatible = "ti,sysc-omap4", "ti,sysc";
1919                         ti,hwmods = "epwmss1";
1920                         reg = <0x2000 0x4>,
1921                               <0x2004 0x4>;
1922                         reg-names = "rev", "sysc";
1923                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1924                                         <SYSC_IDLE_NO>,
1925                                         <SYSC_IDLE_SMART>,
1926                                         <SYSC_IDLE_SMART_WKUP>;
1927                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1928                                         <SYSC_IDLE_NO>,
1929                                         <SYSC_IDLE_SMART>,
1930                                         <SYSC_IDLE_SMART_WKUP>;
1931                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1932                         clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS1_CLKCTRL 0>;
1933                         clock-names = "fck";
1934                         #address-cells = <1>;
1935                         #size-cells = <1>;
1936                         ranges = <0x0 0x2000 0x1000>;
1937
1938                         epwmss1: epwmss@0 {
1939                                 compatible = "ti,am33xx-pwmss";
1940                                 reg = <0x0 0x10>;
1941                                 #address-cells = <1>;
1942                                 #size-cells = <1>;
1943                                 status = "disabled";
1944                                 ranges = <0 0 0x1000>;
1945
1946                                 ecap1: ecap@100 {
1947                                         compatible = "ti,am3352-ecap",
1948                                                      "ti,am33xx-ecap";
1949                                         #pwm-cells = <3>;
1950                                         reg = <0x100 0x80>;
1951                                         clocks = <&l4ls_gclk>;
1952                                         clock-names = "fck";
1953                                         interrupts = <47>;
1954                                         interrupt-names = "ecap1";
1955                                         status = "disabled";
1956                                 };
1957
1958                                 ehrpwm1: pwm@200 {
1959                                         compatible = "ti,am3352-ehrpwm",
1960                                                      "ti,am33xx-ehrpwm";
1961                                         #pwm-cells = <3>;
1962                                         reg = <0x200 0x80>;
1963                                         clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1964                                         clock-names = "tbclk", "fck";
1965                                         status = "disabled";
1966                                 };
1967                         };
1968                 };
1969
1970                 target-module@4000 {                    /* 0x48304000, ap 70 44.0 */
1971                         compatible = "ti,sysc-omap4", "ti,sysc";
1972                         ti,hwmods = "epwmss2";
1973                         reg = <0x4000 0x4>,
1974                               <0x4004 0x4>;
1975                         reg-names = "rev", "sysc";
1976                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1977                                         <SYSC_IDLE_NO>,
1978                                         <SYSC_IDLE_SMART>,
1979                                         <SYSC_IDLE_SMART_WKUP>;
1980                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1981                                         <SYSC_IDLE_NO>,
1982                                         <SYSC_IDLE_SMART>,
1983                                         <SYSC_IDLE_SMART_WKUP>;
1984                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1985                         clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS2_CLKCTRL 0>;
1986                         clock-names = "fck";
1987                         #address-cells = <1>;
1988                         #size-cells = <1>;
1989                         ranges = <0x0 0x4000 0x1000>;
1990
1991                         epwmss2: epwmss@0 {
1992                                 compatible = "ti,am33xx-pwmss";
1993                                 reg = <0x0 0x10>;
1994                                 #address-cells = <1>;
1995                                 #size-cells = <1>;
1996                                 status = "disabled";
1997                                 ranges = <0 0 0x1000>;
1998
1999                                 ecap2: ecap@100 {
2000                                         compatible = "ti,am3352-ecap",
2001                                                      "ti,am33xx-ecap";
2002                                         #pwm-cells = <3>;
2003                                         reg = <0x100 0x80>;
2004                                         clocks = <&l4ls_gclk>;
2005                                         clock-names = "fck";
2006                                         interrupts = <61>;
2007                                         interrupt-names = "ecap2";
2008                                         status = "disabled";
2009                                 };
2010
2011                                 ehrpwm2: pwm@200 {
2012                                         compatible = "ti,am3352-ehrpwm",
2013                                                      "ti,am33xx-ehrpwm";
2014                                         #pwm-cells = <3>;
2015                                         reg = <0x200 0x80>;
2016                                         clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
2017                                         clock-names = "tbclk", "fck";
2018                                         status = "disabled";
2019                                 };
2020                         };
2021                 };
2022
2023                 target-module@e000 {                    /* 0x4830e000, ap 72 4a.0 */
2024                         compatible = "ti,sysc-omap4", "ti,sysc";
2025                         ti,hwmods = "lcdc";
2026                         reg = <0xe000 0x4>,
2027                               <0xe054 0x4>;
2028                         reg-names = "rev", "sysc";
2029                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2030                                         <SYSC_IDLE_NO>,
2031                                         <SYSC_IDLE_SMART>;
2032                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2033                                         <SYSC_IDLE_NO>,
2034                                         <SYSC_IDLE_SMART>;
2035                         /* Domains (P, C): per_pwrdm, lcdc_clkdm */
2036                         clocks = <&lcdc_clkctrl AM3_LCDC_LCDC_CLKCTRL 0>;
2037                         clock-names = "fck";
2038                         #address-cells = <1>;
2039                         #size-cells = <1>;
2040                         ranges = <0x0 0xe000 0x1000>;
2041
2042                         lcdc: lcdc@0 {
2043                                 compatible = "ti,am33xx-tilcdc";
2044                                 reg = <0x0 0x1000>;
2045                                 interrupts = <36>;
2046                                 status = "disabled";
2047                         };
2048                 };
2049
2050                 target-module@10000 {                   /* 0x48310000, ap 76 4e.1 */
2051                         compatible = "ti,sysc-omap2", "ti,sysc";
2052                         reg = <0x11fe0 0x4>,
2053                               <0x11fe4 0x4>;
2054                         reg-names = "rev", "sysc";
2055                         ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
2056                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2057                                         <SYSC_IDLE_NO>;
2058                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2059                         clocks = <&l4ls_clkctrl AM3_L4LS_RNG_CLKCTRL 0>;
2060                         clock-names = "fck";
2061                         #address-cells = <1>;
2062                         #size-cells = <1>;
2063                         ranges = <0x0 0x10000 0x2000>;
2064
2065                         rng: rng@0 {
2066                                 compatible = "ti,omap4-rng";
2067                                 reg = <0x0 0x2000>;
2068                                 interrupts = <111>;
2069                         };
2070                 };
2071
2072                 target-module@13000 {                   /* 0x48313000, ap 97 62.0 */
2073                         compatible = "ti,sysc";
2074                         status = "disabled";
2075                         #address-cells = <1>;
2076                         #size-cells = <1>;
2077                         ranges = <0x0 0x13000 0x1000>;
2078                 };
2079
2080                 target-module@15000 {                   /* 0x48315000, ap 94 56.0 */
2081                         compatible = "ti,sysc";
2082                         status = "disabled";
2083                         #address-cells = <1>;
2084                         #size-cells = <1>;
2085                         ranges = <0x00000000 0x00015000 0x00001000>,
2086                                  <0x00001000 0x00016000 0x00001000>;
2087                 };
2088
2089                 target-module@18000 {                   /* 0x48318000, ap 74 4c.0 */
2090                         compatible = "ti,sysc";
2091                         status = "disabled";
2092                         #address-cells = <1>;
2093                         #size-cells = <1>;
2094                         ranges = <0x0 0x18000 0x4000>;
2095                 };
2096
2097                 target-module@20000 {                   /* 0x48320000, ap 99 34.0 */
2098                         compatible = "ti,sysc";
2099                         status = "disabled";
2100                         #address-cells = <1>;
2101                         #size-cells = <1>;
2102                         ranges = <0x0 0x20000 0x1000>;
2103                 };
2104
2105                 target-module@22000 {                   /* 0x48322000, ap 101 3e.0 */
2106                         compatible = "ti,sysc";
2107                         status = "disabled";
2108                         #address-cells = <1>;
2109                         #size-cells = <1>;
2110                         ranges = <0x0 0x22000 0x1000>;
2111                 };
2112
2113                 target-module@24000 {                   /* 0x48324000, ap 103 68.0 */
2114                         compatible = "ti,sysc";
2115                         status = "disabled";
2116                         #address-cells = <1>;
2117                         #size-cells = <1>;
2118                         ranges = <0x0 0x24000 0x1000>;
2119                 };
2120         };
2121 };
2122