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1 /*
2  * Device Tree Source for AM33XX SoC
3  *
4  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2.  This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/am33xx.h>
14 #include <dt-bindings/clock/am3.h>
15
16 / {
17         compatible = "ti,am33xx";
18         interrupt-parent = <&intc>;
19         #address-cells = <1>;
20         #size-cells = <1>;
21         chosen { };
22
23         aliases {
24                 i2c0 = &i2c0;
25                 i2c1 = &i2c1;
26                 i2c2 = &i2c2;
27                 serial0 = &uart0;
28                 serial1 = &uart1;
29                 serial2 = &uart2;
30                 serial3 = &uart3;
31                 serial4 = &uart4;
32                 serial5 = &uart5;
33                 d-can0 = &dcan0;
34                 d-can1 = &dcan1;
35                 usb0 = &usb0;
36                 usb1 = &usb1;
37                 phy0 = &usb0_phy;
38                 phy1 = &usb1_phy;
39                 ethernet0 = &cpsw_emac0;
40                 ethernet1 = &cpsw_emac1;
41                 spi0 = &spi0;
42                 spi1 = &spi1;
43         };
44
45         cpus {
46                 #address-cells = <1>;
47                 #size-cells = <0>;
48                 cpu@0 {
49                         compatible = "arm,cortex-a8";
50                         enable-method = "ti,am3352";
51                         device_type = "cpu";
52                         reg = <0>;
53
54                         operating-points-v2 = <&cpu0_opp_table>;
55
56                         clocks = <&dpll_mpu_ck>;
57                         clock-names = "cpu";
58
59                         clock-latency = <300000>; /* From omap-cpufreq driver */
60                         cpu-idle-states = <&mpu_gate>;
61                 };
62
63                 idle-states {
64                         mpu_gate: mpu_gate {
65                                 compatible = "arm,idle-state";
66                                 entry-latency-us = <40>;
67                                 exit-latency-us = <90>;
68                                 min-residency-us = <300>;
69                                 ti,idle-wkup-m3;
70                         };
71                 };
72         };
73
74         cpu0_opp_table: opp-table {
75                 compatible = "operating-points-v2-ti-cpu";
76                 syscon = <&scm_conf>;
77
78                 /*
79                  * The three following nodes are marked with opp-suspend
80                  * because the can not be enabled simultaneously on a
81                  * single SoC.
82                  */
83                 opp50-300000000 {
84                         opp-hz = /bits/ 64 <300000000>;
85                         opp-microvolt = <950000 931000 969000>;
86                         opp-supported-hw = <0x06 0x0010>;
87                         opp-suspend;
88                 };
89
90                 opp100-275000000 {
91                         opp-hz = /bits/ 64 <275000000>;
92                         opp-microvolt = <1100000 1078000 1122000>;
93                         opp-supported-hw = <0x01 0x00FF>;
94                         opp-suspend;
95                 };
96
97                 opp100-300000000 {
98                         opp-hz = /bits/ 64 <300000000>;
99                         opp-microvolt = <1100000 1078000 1122000>;
100                         opp-supported-hw = <0x06 0x0020>;
101                         opp-suspend;
102                 };
103
104                 opp100-500000000 {
105                         opp-hz = /bits/ 64 <500000000>;
106                         opp-microvolt = <1100000 1078000 1122000>;
107                         opp-supported-hw = <0x01 0xFFFF>;
108                 };
109
110                 opp100-600000000 {
111                         opp-hz = /bits/ 64 <600000000>;
112                         opp-microvolt = <1100000 1078000 1122000>;
113                         opp-supported-hw = <0x06 0x0040>;
114                 };
115
116                 opp120-600000000 {
117                         opp-hz = /bits/ 64 <600000000>;
118                         opp-microvolt = <1200000 1176000 1224000>;
119                         opp-supported-hw = <0x01 0xFFFF>;
120                 };
121
122                 opp120-720000000 {
123                         opp-hz = /bits/ 64 <720000000>;
124                         opp-microvolt = <1200000 1176000 1224000>;
125                         opp-supported-hw = <0x06 0x0080>;
126                 };
127
128                 oppturbo-720000000 {
129                         opp-hz = /bits/ 64 <720000000>;
130                         opp-microvolt = <1260000 1234800 1285200>;
131                         opp-supported-hw = <0x01 0xFFFF>;
132                 };
133
134                 oppturbo-800000000 {
135                         opp-hz = /bits/ 64 <800000000>;
136                         opp-microvolt = <1260000 1234800 1285200>;
137                         opp-supported-hw = <0x06 0x0100>;
138                 };
139
140                 oppnitro-1000000000 {
141                         opp-hz = /bits/ 64 <1000000000>;
142                         opp-microvolt = <1325000 1298500 1351500>;
143                         opp-supported-hw = <0x04 0x0200>;
144                 };
145         };
146
147         pmu@4b000000 {
148                 compatible = "arm,cortex-a8-pmu";
149                 interrupts = <3>;
150                 reg = <0x4b000000 0x1000000>;
151                 ti,hwmods = "debugss";
152         };
153
154         /*
155          * The soc node represents the soc top level view. It is used for IPs
156          * that are not memory mapped in the MPU view or for the MPU itself.
157          */
158         soc {
159                 compatible = "ti,omap-infra";
160                 mpu {
161                         compatible = "ti,omap3-mpu";
162                         ti,hwmods = "mpu";
163                         pm-sram = <&pm_sram_code
164                                    &pm_sram_data>;
165                 };
166         };
167
168         /*
169          * XXX: Use a flat representation of the AM33XX interconnect.
170          * The real AM33XX interconnect network is quite complex. Since
171          * it will not bring real advantage to represent that in DT
172          * for the moment, just use a fake OCP bus entry to represent
173          * the whole bus hierarchy.
174          */
175         ocp {
176                 compatible = "simple-bus";
177                 #address-cells = <1>;
178                 #size-cells = <1>;
179                 ranges;
180                 ti,hwmods = "l3_main";
181
182                 l4_wkup: interconnect@44c00000 {
183                         wkup_m3: wkup_m3@100000 {
184                                 compatible = "ti,am3352-wkup-m3";
185                                 reg = <0x100000 0x4000>,
186                                       <0x180000 0x2000>;
187                                 reg-names = "umem", "dmem";
188                                 ti,hwmods = "wkup_m3";
189                                 ti,pm-firmware = "am335x-pm-firmware.elf";
190                         };
191                 };
192                 l4_per: interconnect@48000000 {
193                 };
194                 l4_fw: interconnect@47c00000 {
195                 };
196                 l4_fast: interconnect@4a000000 {
197                 };
198                 l4_mpuss: interconnect@4b140000 {
199                 };
200
201                 intc: interrupt-controller@48200000 {
202                         compatible = "ti,am33xx-intc";
203                         interrupt-controller;
204                         #interrupt-cells = <1>;
205                         reg = <0x48200000 0x1000>;
206                 };
207
208                 target-module@49000000 {
209                         compatible = "ti,sysc-omap4", "ti,sysc";
210                         reg = <0x49000000 0x4>;
211                         reg-names = "rev";
212                         clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
213                         clock-names = "fck";
214                         #address-cells = <1>;
215                         #size-cells = <1>;
216                         ranges = <0x0 0x49000000 0x10000>;
217
218                         edma: dma@0 {
219                                 compatible = "ti,edma3-tpcc";
220                                 reg = <0 0x10000>;
221                                 reg-names = "edma3_cc";
222                                 interrupts = <12 13 14>;
223                                 interrupt-names = "edma3_ccint", "edma3_mperr",
224                                                   "edma3_ccerrint";
225                                 dma-requests = <64>;
226                                 #dma-cells = <2>;
227
228                                 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
229                                            <&edma_tptc2 0>;
230
231                                 ti,edma-memcpy-channels = <20 21>;
232                         };
233                 };
234
235                 target-module@49800000 {
236                         compatible = "ti,sysc-omap4", "ti,sysc";
237                         reg = <0x49800000 0x4>,
238                               <0x49800010 0x4>;
239                         reg-names = "rev", "sysc";
240                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
241                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
242                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
243                                         <SYSC_IDLE_SMART>;
244                         clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
245                         clock-names = "fck";
246                         #address-cells = <1>;
247                         #size-cells = <1>;
248                         ranges = <0x0 0x49800000 0x100000>;
249
250                         edma_tptc0: dma@0 {
251                                 compatible = "ti,edma3-tptc";
252                                 reg = <0 0x100000>;
253                                 interrupts = <112>;
254                                 interrupt-names = "edma3_tcerrint";
255                         };
256                 };
257
258                 target-module@49900000 {
259                         compatible = "ti,sysc-omap4", "ti,sysc";
260                         reg = <0x49900000 0x4>,
261                               <0x49900010 0x4>;
262                         reg-names = "rev", "sysc";
263                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
264                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
265                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
266                                         <SYSC_IDLE_SMART>;
267                         clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
268                         clock-names = "fck";
269                         #address-cells = <1>;
270                         #size-cells = <1>;
271                         ranges = <0x0 0x49900000 0x100000>;
272
273                         edma_tptc1: dma@0 {
274                                 compatible = "ti,edma3-tptc";
275                                 reg = <0 0x100000>;
276                                 interrupts = <113>;
277                                 interrupt-names = "edma3_tcerrint";
278                         };
279                 };
280
281                 target-module@49a00000 {
282                         compatible = "ti,sysc-omap4", "ti,sysc";
283                         reg = <0x49a00000 0x4>,
284                               <0x49a00010 0x4>;
285                         reg-names = "rev", "sysc";
286                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
287                         ti,sysc-midle = <SYSC_IDLE_FORCE>;
288                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
289                                         <SYSC_IDLE_SMART>;
290                         clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
291                         clock-names = "fck";
292                         #address-cells = <1>;
293                         #size-cells = <1>;
294                         ranges = <0x0 0x49a00000 0x100000>;
295
296                         edma_tptc2: dma@0 {
297                                 compatible = "ti,edma3-tptc";
298                                 reg = <0 0x100000>;
299                                 interrupts = <114>;
300                                 interrupt-names = "edma3_tcerrint";
301                         };
302                 };
303
304                 target-module@47810000 {
305                         compatible = "ti,sysc-omap2", "ti,sysc";
306                         reg = <0x478102fc 0x4>,
307                               <0x47810110 0x4>,
308                               <0x47810114 0x4>;
309                         reg-names = "rev", "sysc", "syss";
310                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
311                                          SYSC_OMAP2_ENAWAKEUP |
312                                          SYSC_OMAP2_SOFTRESET |
313                                          SYSC_OMAP2_AUTOIDLE)>;
314                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
315                                         <SYSC_IDLE_NO>,
316                                         <SYSC_IDLE_SMART>;
317                         ti,syss-mask = <1>;
318                         clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
319                         clock-names = "fck";
320                         #address-cells = <1>;
321                         #size-cells = <1>;
322                         ranges = <0x0 0x47810000 0x1000>;
323
324                         mmc3: mmc@0 {
325                                 compatible = "ti,omap4-hsmmc";
326                                 ti,needs-special-reset;
327                                 interrupts = <29>;
328                                 reg = <0x0 0x1000>;
329                         };
330                 };
331
332                 usb: target-module@47400000 {
333                         compatible = "ti,sysc-omap4", "ti,sysc";
334                         reg = <0x47400000 0x4>,
335                               <0x47400010 0x4>;
336                         reg-names = "rev", "sysc";
337                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
338                                          SYSC_OMAP2_SOFTRESET)>;
339                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
340                                         <SYSC_IDLE_NO>,
341                                         <SYSC_IDLE_SMART>;
342                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
343                                         <SYSC_IDLE_NO>,
344                                         <SYSC_IDLE_SMART>,
345                                         <SYSC_IDLE_SMART_WKUP>;
346                         clocks = <&l3s_clkctrl AM3_L3S_USB_OTG_HS_CLKCTRL 0>;
347                         clock-names = "fck";
348                         #address-cells = <1>;
349                         #size-cells = <1>;
350                         ranges = <0x0 0x47400000 0x5000>;
351
352                         usb0_phy: usb-phy@1300 {
353                                 compatible = "ti,am335x-usb-phy";
354                                 reg = <0x1300 0x100>;
355                                 reg-names = "phy";
356                                 ti,ctrl_mod = <&usb_ctrl_mod>;
357                                 #phy-cells = <0>;
358                         };
359
360                         usb0: usb@1400 {
361                                 compatible = "ti,musb-am33xx";
362                                 reg = <0x1400 0x400>,
363                                       <0x1000 0x200>;
364                                 reg-names = "mc", "control";
365
366                                 interrupts = <18>;
367                                 interrupt-names = "mc";
368                                 dr_mode = "otg";
369                                 mentor,multipoint = <1>;
370                                 mentor,num-eps = <16>;
371                                 mentor,ram-bits = <12>;
372                                 mentor,power = <500>;
373                                 phys = <&usb0_phy>;
374
375                                 dmas = <&cppi41dma  0 0 &cppi41dma  1 0
376                                         &cppi41dma  2 0 &cppi41dma  3 0
377                                         &cppi41dma  4 0 &cppi41dma  5 0
378                                         &cppi41dma  6 0 &cppi41dma  7 0
379                                         &cppi41dma  8 0 &cppi41dma  9 0
380                                         &cppi41dma 10 0 &cppi41dma 11 0
381                                         &cppi41dma 12 0 &cppi41dma 13 0
382                                         &cppi41dma 14 0 &cppi41dma  0 1
383                                         &cppi41dma  1 1 &cppi41dma  2 1
384                                         &cppi41dma  3 1 &cppi41dma  4 1
385                                         &cppi41dma  5 1 &cppi41dma  6 1
386                                         &cppi41dma  7 1 &cppi41dma  8 1
387                                         &cppi41dma  9 1 &cppi41dma 10 1
388                                         &cppi41dma 11 1 &cppi41dma 12 1
389                                         &cppi41dma 13 1 &cppi41dma 14 1>;
390                                 dma-names =
391                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
392                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
393                                         "rx14", "rx15",
394                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
395                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
396                                         "tx14", "tx15";
397                         };
398
399                         usb1_phy: usb-phy@1b00 {
400                                 compatible = "ti,am335x-usb-phy";
401                                 reg = <0x1b00 0x100>;
402                                 reg-names = "phy";
403                                 ti,ctrl_mod = <&usb_ctrl_mod>;
404                                 #phy-cells = <0>;
405                         };
406
407                         usb1: usb@1800 {
408                                 compatible = "ti,musb-am33xx";
409                                 reg = <0x1c00 0x400>,
410                                       <0x1800 0x200>;
411                                 reg-names = "mc", "control";
412                                 interrupts = <19>;
413                                 interrupt-names = "mc";
414                                 dr_mode = "otg";
415                                 mentor,multipoint = <1>;
416                                 mentor,num-eps = <16>;
417                                 mentor,ram-bits = <12>;
418                                 mentor,power = <500>;
419                                 phys = <&usb1_phy>;
420
421                                 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
422                                         &cppi41dma 17 0 &cppi41dma 18 0
423                                         &cppi41dma 19 0 &cppi41dma 20 0
424                                         &cppi41dma 21 0 &cppi41dma 22 0
425                                         &cppi41dma 23 0 &cppi41dma 24 0
426                                         &cppi41dma 25 0 &cppi41dma 26 0
427                                         &cppi41dma 27 0 &cppi41dma 28 0
428                                         &cppi41dma 29 0 &cppi41dma 15 1
429                                         &cppi41dma 16 1 &cppi41dma 17 1
430                                         &cppi41dma 18 1 &cppi41dma 19 1
431                                         &cppi41dma 20 1 &cppi41dma 21 1
432                                         &cppi41dma 22 1 &cppi41dma 23 1
433                                         &cppi41dma 24 1 &cppi41dma 25 1
434                                         &cppi41dma 26 1 &cppi41dma 27 1
435                                         &cppi41dma 28 1 &cppi41dma 29 1>;
436                                 dma-names =
437                                         "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
438                                         "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
439                                         "rx14", "rx15",
440                                         "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
441                                         "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
442                                         "tx14", "tx15";
443                         };
444
445                         cppi41dma: dma-controller@2000 {
446                                 compatible = "ti,am3359-cppi41";
447                                 reg =  <0x0000 0x1000>,
448                                        <0x2000 0x1000>,
449                                        <0x3000 0x1000>,
450                                        <0x4000 0x4000>;
451                                 reg-names = "glue", "controller", "scheduler", "queuemgr";
452                                 interrupts = <17>;
453                                 interrupt-names = "glue";
454                                 #dma-cells = <2>;
455                                 #dma-channels = <30>;
456                                 #dma-requests = <256>;
457                         };
458                 };
459
460                 ocmcram: sram@40300000 {
461                         compatible = "mmio-sram";
462                         reg = <0x40300000 0x10000>; /* 64k */
463                         ranges = <0x0 0x40300000 0x10000>;
464                         #address-cells = <1>;
465                         #size-cells = <1>;
466
467                         pm_sram_code: pm-code-sram@0 {
468                                 compatible = "ti,sram";
469                                 reg = <0x0 0x1000>;
470                                 protect-exec;
471                         };
472
473                         pm_sram_data: pm-data-sram@1000 {
474                                 compatible = "ti,sram";
475                                 reg = <0x1000 0x1000>;
476                                 pool;
477                         };
478                 };
479
480                 emif: emif@4c000000 {
481                         compatible = "ti,emif-am3352";
482                         reg = <0x4c000000 0x1000000>;
483                         ti,hwmods = "emif";
484                         interrupts = <101>;
485                         sram = <&pm_sram_code
486                                 &pm_sram_data>;
487                         ti,no-idle;
488                 };
489
490                 gpmc: gpmc@50000000 {
491                         compatible = "ti,am3352-gpmc";
492                         ti,hwmods = "gpmc";
493                         ti,no-idle-on-init;
494                         reg = <0x50000000 0x2000>;
495                         interrupts = <100>;
496                         dmas = <&edma 52 0>;
497                         dma-names = "rxtx";
498                         gpmc,num-cs = <7>;
499                         gpmc,num-waitpins = <2>;
500                         #address-cells = <2>;
501                         #size-cells = <1>;
502                         interrupt-controller;
503                         #interrupt-cells = <2>;
504                         gpio-controller;
505                         #gpio-cells = <2>;
506                         status = "disabled";
507                 };
508
509                 sham_target: target-module@53100000 {
510                         compatible = "ti,sysc-omap3-sham", "ti,sysc";
511                         reg = <0x53100100 0x4>,
512                               <0x53100110 0x4>,
513                               <0x53100114 0x4>;
514                         reg-names = "rev", "sysc", "syss";
515                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
516                                          SYSC_OMAP2_AUTOIDLE)>;
517                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
518                                         <SYSC_IDLE_NO>,
519                                         <SYSC_IDLE_SMART>;
520                         ti,syss-mask = <1>;
521                         /* Domains (P, C): per_pwrdm, l3_clkdm */
522                         clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
523                         clock-names = "fck";
524                         #address-cells = <1>;
525                         #size-cells = <1>;
526                         ranges = <0x0 0x53100000 0x1000>;
527
528                         sham: sham@0 {
529                                 compatible = "ti,omap4-sham";
530                                 reg = <0 0x200>;
531                                 interrupts = <109>;
532                                 dmas = <&edma 36 0>;
533                                 dma-names = "rx";
534                         };
535                 };
536
537                 aes_target: target-module@53500000 {
538                         compatible = "ti,sysc-omap2", "ti,sysc";
539                         reg = <0x53500080 0x4>,
540                               <0x53500084 0x4>,
541                               <0x53500088 0x4>;
542                         reg-names = "rev", "sysc", "syss";
543                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
544                                          SYSC_OMAP2_AUTOIDLE)>;
545                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
546                                         <SYSC_IDLE_NO>,
547                                         <SYSC_IDLE_SMART>,
548                                         <SYSC_IDLE_SMART_WKUP>;
549                         ti,syss-mask = <1>;
550                         /* Domains (P, C): per_pwrdm, l3_clkdm */
551                         clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
552                         clock-names = "fck";
553                         #address-cells = <1>;
554                         #size-cells = <1>;
555                         ranges = <0x0 0x53500000 0x1000>;
556
557                         aes: aes@0 {
558                                 compatible = "ti,omap4-aes";
559                                 reg = <0 0xa0>;
560                                 interrupts = <103>;
561                                 dmas = <&edma 6 0>,
562                                        <&edma 5 0>;
563                                 dma-names = "tx", "rx";
564                         };
565                 };
566
567                 target-module@56000000 {
568                         compatible = "ti,sysc-omap4", "ti,sysc";
569                         reg = <0x5600fe00 0x4>,
570                               <0x5600fe10 0x4>;
571                         reg-names = "rev", "sysc";
572                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
573                                         <SYSC_IDLE_NO>,
574                                         <SYSC_IDLE_SMART>;
575                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
576                                         <SYSC_IDLE_NO>,
577                                         <SYSC_IDLE_SMART>;
578                         clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
579                         clock-names = "fck";
580                         resets = <&prm_gfx 0>;
581                         reset-names = "rstctrl";
582                         #address-cells = <1>;
583                         #size-cells = <1>;
584                         ranges = <0 0x56000000 0x1000000>;
585
586                         /*
587                          * Closed source PowerVR driver, no child device
588                          * binding or driver in mainline
589                          */
590                 };
591         };
592 };
593
594 #include "am33xx-l4.dtsi"
595 #include "am33xx-clocks.dtsi"
596
597 &prcm {
598         prm_per: prm@c00 {
599                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
600                 reg = <0xc00 0x100>;
601                 #reset-cells = <1>;
602         };
603
604         prm_wkup: prm@d00 {
605                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
606                 reg = <0xd00 0x100>;
607                 #reset-cells = <1>;
608         };
609
610         prm_device: prm@f00 {
611                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
612                 reg = <0xf00 0x100>;
613                 #reset-cells = <1>;
614         };
615
616         prm_gfx: prm@1100 {
617                 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
618                 reg = <0x1100 0x100>;
619                 #reset-cells = <1>;
620         };
621 };