src/arm/aspeed-bmc-ampere-mtmitchell.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 // Copyright (c) 2022, Ampere Computing LLC
   3
   4 /dts-v1/;
   5
   6 #include "aspeed-g6.dtsi"
   7 #include <dt-bindings/gpio/aspeed-gpio.h>
   8
   9 / {
  10         model = "Ampere Mt.Mitchell BMC";
  11         compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";
  12
  13         chosen {
  14                 stdout-path = &uart5;
  15         };
  16
  17         memory@80000000 {
  18                 device_type = "memory";
  19                 reg = <0x80000000 0x80000000>;
  20         };
  21
  22         reserved-memory {
  23                 #address-cells = <1>;
  24                 #size-cells = <1>;
  25                 ranges;
  26
  27                 gfx_memory: framebuffer {
  28                         size = <0x01000000>;
  29                         alignment = <0x01000000>;
  30                         compatible = "shared-dma-pool";
  31                         reusable;
  32                 };
  33
  34                 video_engine_memory: video {
  35                         size = <0x04000000>;
  36                         alignment = <0x01000000>;
  37                         compatible = "shared-dma-pool";
  38                         reusable;
  39                 };
  40
  41                 vga_memory: region@bf000000 {
  42                         no-map;
  43                         compatible = "shared-dma-pool";
  44                         reg = <0xbf000000 0x01000000>;  /* 16M */
  45                 };
  46         };
  47
  48         voltage_mon_reg: voltage-mon-regulator {
  49                 compatible = "regulator-fixed";
  50                 regulator-name = "ltc2497_reg";
  51                 regulator-min-microvolt = <3300000>;
  52                 regulator-max-microvolt = <3300000>;
  53                 regulator-always-on;
  54         };
  55
  56         gpioI5mux: mux-controller {
  57                 compatible = "gpio-mux";
  58                 #mux-control-cells = <0>;
  59                 mux-gpios = <&gpio0 ASPEED_GPIO(I, 5) GPIO_ACTIVE_HIGH>;
  60         };
  61
  62         adc0mux: adc0mux {
  63                 compatible = "io-channel-mux";
  64                 io-channels = <&adc0 0>;
  65                 #io-channel-cells = <1>;
  66                 io-channel-names = "parent";
  67                 mux-controls = <&gpioI5mux>;
  68                 channels = "s0", "s1";
  69         };
  70
  71         adc1mux: adc1mux {
  72                 compatible = "io-channel-mux";
  73                 io-channels = <&adc0 1>;
  74                 #io-channel-cells = <1>;
  75                 io-channel-names = "parent";
  76                 mux-controls = <&gpioI5mux>;
  77                 channels = "s0", "s1";
  78         };
  79
  80         adc2mux: adc2mux {
  81                 compatible = "io-channel-mux";
  82                 io-channels = <&adc0 2>;
  83                 #io-channel-cells = <1>;
  84                 io-channel-names = "parent";
  85                 mux-controls = <&gpioI5mux>;
  86                 channels = "s0", "s1";
  87         };
  88
  89         adc3mux: adc3mux {
  90                 compatible = "io-channel-mux";
  91                 io-channels = <&adc0 3>;
  92                 #io-channel-cells = <1>;
  93                 io-channel-names = "parent";
  94                 mux-controls = <&gpioI5mux>;
  95                 channels = "s0", "s1";
  96         };
  97
  98         adc4mux: adc4mux {
  99                 compatible = "io-channel-mux";
 100                 io-channels = <&adc0 4>;
 101                 #io-channel-cells = <1>;
 102                 io-channel-names = "parent";
 103                 mux-controls = <&gpioI5mux>;
 104                 channels = "s0", "s1";
 105         };
 106
 107         adc5mux: adc5mux {
 108                 compatible = "io-channel-mux";
 109                 io-channels = <&adc0 5>;
 110                 #io-channel-cells = <1>;
 111                 io-channel-names = "parent";
 112                 mux-controls = <&gpioI5mux>;
 113                 channels = "s0", "s1";
 114         };
 115
 116         adc6mux: adc6mux {
 117                 compatible = "io-channel-mux";
 118                 io-channels = <&adc0 6>;
 119                 #io-channel-cells = <1>;
 120                 io-channel-names = "parent";
 121                 mux-controls = <&gpioI5mux>;
 122                 channels = "s0", "s1";
 123         };
 124
 125         adc7mux: adc7mux {
 126                 compatible = "io-channel-mux";
 127                 io-channels = <&adc0 7>;
 128                 #io-channel-cells = <1>;
 129                 io-channel-names = "parent";
 130                 mux-controls = <&gpioI5mux>;
 131                 channels = "s0", "s1";
 132         };
 133
 134         adc8mux: adc8mux {
 135                 compatible = "io-channel-mux";
 136                 io-channels = <&adc1 0>;
 137                 #io-channel-cells = <1>;
 138                 io-channel-names = "parent";
 139                 mux-controls = <&gpioI5mux>;
 140                 channels = "s0", "s1";
 141         };
 142
 143         adc9mux: adc9mux {
 144                 compatible = "io-channel-mux";
 145                 io-channels = <&adc1 1>;
 146                 #io-channel-cells = <1>;
 147                 io-channel-names = "parent";
 148                 mux-controls = <&gpioI5mux>;
 149                 channels = "s0", "s1";
 150         };
 151
 152         adc10mux: adc10mux {
 153                 compatible = "io-channel-mux";
 154                 io-channels = <&adc1 2>;
 155                 #io-channel-cells = <1>;
 156                 io-channel-names = "parent";
 157                 mux-controls = <&gpioI5mux>;
 158                 channels = "s0", "s1";
 159         };
 160
 161         adc11mux: adc11mux {
 162                 compatible = "io-channel-mux";
 163                 io-channels = <&adc1 3>;
 164                 #io-channel-cells = <1>;
 165                 io-channel-names = "parent";
 166                 mux-controls = <&gpioI5mux>;
 167                 channels = "s0", "s1";
 168         };
 169
 170         adc12mux: adc12mux {
 171                 compatible = "io-channel-mux";
 172                 io-channels = <&adc1 4>;
 173                 #io-channel-cells = <1>;
 174                 io-channel-names = "parent";
 175                 mux-controls = <&gpioI5mux>;
 176                 channels = "s0", "s1";
 177         };
 178
 179         adc13mux: adc13mux {
 180                 compatible = "io-channel-mux";
 181                 io-channels = <&adc1 5>;
 182                 #io-channel-cells = <1>;
 183                 io-channel-names = "parent";
 184                 mux-controls = <&gpioI5mux>;
 185                 channels = "s0", "s1";
 186         };
 187
 188         adc14mux: adc14mux {
 189                 compatible = "io-channel-mux";
 190                 io-channels = <&adc1 6>;
 191                 #io-channel-cells = <1>;
 192                 io-channel-names = "parent";
 193                 mux-controls = <&gpioI5mux>;
 194                 channels = "s0", "s1";
 195         };
 196
 197         adc15mux: adc15mux {
 198                 compatible = "io-channel-mux";
 199                 io-channels = <&adc1 7>;
 200                 #io-channel-cells = <1>;
 201                 io-channel-names = "parent";
 202                 mux-controls = <&gpioI5mux>;
 203                 channels = "s0", "s1";
 204         };
 205
 206         iio-hwmon {
 207                 compatible = "iio-hwmon";
 208                 io-channels = <&adc0mux 0>, <&adc0mux 1>,
 209                         <&adc1mux 0>, <&adc1mux 1>,
 210                         <&adc2mux 0>, <&adc2mux 1>,
 211                         <&adc3mux 0>, <&adc3mux 1>,
 212                         <&adc4mux 0>, <&adc4mux 1>,
 213                         <&adc5mux 0>, <&adc5mux 1>,
 214                         <&adc6mux 0>, <&adc6mux 1>,
 215                         <&adc7mux 0>, <&adc7mux 1>,
 216                         <&adc8mux 0>, <&adc8mux 1>,
 217                         <&adc9mux 0>, <&adc9mux 1>,
 218                         <&adc10mux 0>, <&adc10mux 1>,
 219                         <&adc11mux 0>, <&adc11mux 1>,
 220                         <&adc12mux 0>, <&adc12mux 1>,
 221                         <&adc13mux 0>, <&adc13mux 1>,
 222                         <&adc14mux 0>, <&adc14mux 1>,
 223                         <&adc15mux 0>, <&adc15mux 1>,
 224                         <&adc_i2c 0>, <&adc_i2c 1>,
 225                         <&adc_i2c 2>, <&adc_i2c 3>,
 226                         <&adc_i2c 4>, <&adc_i2c 5>,
 227                         <&adc_i2c 6>, <&adc_i2c 7>,
 228                         <&adc_i2c 8>, <&adc_i2c 9>,
 229                         <&adc_i2c 10>, <&adc_i2c 11>,
 230                         <&adc_i2c 12>, <&adc_i2c 13>,
 231                         <&adc_i2c 14>, <&adc_i2c 15>;
 232         };
 233 };
 234
 235 &mdio0 {
 236         status = "okay";
 237
 238         ethphy0: ethernet-phy@0 {
 239                 compatible = "ethernet-phy-ieee802.3-c22";
 240                 reg = <0>;
 241         };
 242 };
 243
 244 &mac0 {
 245         status = "okay";
 246
 247         phy-mode = "rgmii";
 248         phy-handle = <&ethphy0>;
 249
 250         pinctrl-names = "default";
 251         pinctrl-0 = <&pinctrl_rgmii1_default>;
 252 };
 253
 254 &mac3 {
 255         status = "okay";
 256         pinctrl-names = "default";
 257         pinctrl-0 = <&pinctrl_rmii4_default>;
 258         clock-names = "MACCLK", "RCLK";
 259         use-ncsi;
 260 };
 261
 262 &fmc {
 263         status = "okay";
 264         flash@0 {
 265                 status = "okay";
 266                 m25p,fast-read;
 267                 label = "bmc";
 268                 spi-max-frequency = <50000000>;
 269 #include "openbmc-flash-layout-64.dtsi"
 270         };
 271
 272         flash@1 {
 273                 status = "okay";
 274                 m25p,fast-read;
 275                 label = "alt-bmc";
 276                 spi-max-frequency = <50000000>;
 277 #include "openbmc-flash-layout-64-alt.dtsi"
 278         };
 279 };
 280
 281 &spi1 {
 282         status = "okay";
 283         pinctrl-names = "default";
 284         pinctrl-0 = <&pinctrl_spi1_default>;
 285
 286         flash@0 {
 287                 status = "okay";
 288                 m25p,fast-read;
 289                 label = "pnor";
 290                 spi-max-frequency = <20000000>;
 291         };
 292 };
 293
 294 &uart1 {
 295         status = "okay";
 296 };
 297
 298 &uart2 {
 299         status = "okay";
 300 };
 301
 302 &uart3 {
 303         status = "okay";
 304 };
 305
 306 &uart4 {
 307         status = "okay";
 308 };
 309
 310 &i2c0 {
 311         status = "okay";
 312
 313         temperature-sensor@2e {
 314                 compatible = "adi,adt7490";
 315                 reg = <0x2e>;
 316         };
 317 };
 318
 319 &i2c1 {
 320         status = "okay";
 321 };
 322
 323 &i2c2 {
 324         status = "okay";
 325
 326         psu@58 {
 327                 compatible = "pmbus";
 328                 reg = <0x58>;
 329         };
 330
 331         psu@59 {
 332                 compatible = "pmbus";
 333                 reg = <0x59>;
 334         };
 335 };
 336
 337 &i2c3 {
 338         status = "okay";
 339 };
 340
 341 &i2c4 {
 342         status = "okay";
 343
 344         adc_i2c: adc@16 {
 345                 compatible = "lltc,ltc2497";
 346                 reg = <0x16>;
 347                 vref-supply = <&voltage_mon_reg>;
 348                 #io-channel-cells = <1>;
 349          };
 350
 351         eeprom@50 {
 352                 compatible = "atmel,24c64";
 353                 reg = <0x50>;
 354                 pagesize = <32>;
 355         };
 356
 357         i2c-mux@70 {
 358                 compatible = "nxp,pca9545";
 359                 #address-cells = <1>;
 360                 #size-cells = <0>;
 361                 reg = <0x70>;
 362                 i2c-mux-idle-disconnect;
 363
 364                 i2c4_bus70_chn0: i2c@0 {
 365                         #address-cells = <1>;
 366                         #size-cells = <0>;
 367                         reg = <0x0>;
 368
 369                         outlet_temp1: temperature-sensor@48 {
 370                                 compatible = "ti,tmp75";
 371                                 reg = <0x48>;
 372                         };
 373                         psu1_inlet_temp2: temperature-sensor@49 {
 374                                 compatible = "ti,tmp75";
 375                                 reg = <0x49>;
 376                         };
 377                 };
 378
 379                 i2c4_bus70_chn1: i2c@1 {
 380                         #address-cells = <1>;
 381                         #size-cells = <0>;
 382                         reg = <0x1>;
 383
 384                         pcie_zone_temp1: temperature-sensor@48 {
 385                                 compatible = "ti,tmp75";
 386                                 reg = <0x48>;
 387                         };
 388                         psu0_inlet_temp2: temperature-sensor@49 {
 389                                 compatible = "ti,tmp75";
 390                                 reg = <0x49>;
 391                         };
 392                 };
 393
 394                 i2c4_bus70_chn2: i2c@2 {
 395                         #address-cells = <1>;
 396                         #size-cells = <0>;
 397                         reg = <0x2>;
 398
 399                         pcie_zone_temp2: temperature-sensor@48 {
 400                                 compatible = "ti,tmp75";
 401                                 reg = <0x48>;
 402                         };
 403                         outlet_temp2: temperature-sensor@49 {
 404                                 compatible = "ti,tmp75";
 405                                 reg = <0x49>;
 406                         };
 407                 };
 408
 409                 i2c4_bus70_chn3: i2c@3 {
 410                         #address-cells = <1>;
 411                         #size-cells = <0>;
 412                         reg = <0x3>;
 413
 414                         mb_inlet_temp1: temperature-sensor@7c {
 415                                 compatible = "microchip,emc1413";
 416                                 reg = <0x7c>;
 417                         };
 418                         mb_inlet_temp2: temperature-sensor@4c {
 419                                 compatible = "microchip,emc1413";
 420                                 reg = <0x4c>;
 421                         };
 422                 };
 423         };
 424 };
 425
 426 &i2c5 {
 427         status = "okay";
 428
 429         i2c-mux@70 {
 430                 compatible = "nxp,pca9548";
 431                 #address-cells = <1>;
 432                 #size-cells = <0>;
 433                 reg = <0x70>;
 434                 i2c-mux-idle-disconnect;
 435         };
 436 };
 437
 438 &i2c6 {
 439         status = "okay";
 440         rtc@51 {
 441                 compatible = "nxp,pcf85063a";
 442                 reg = <0x51>;
 443         };
 444 };
 445
 446 &i2c7 {
 447         status = "okay";
 448 };
 449
 450 &i2c8 {
 451         status = "okay";
 452
 453         gpio@77 {
 454                 compatible = "nxp,pca9539";
 455                 reg = <0x77>;
 456                 gpio-controller;
 457                 #address-cells = <1>;
 458                 #size-cells = <0>;
 459                 #gpio-cells = <2>;
 460
 461                 bmc-ocp0-en-hog {
 462                         gpio-hog;
 463                         gpios = <7 GPIO_ACTIVE_LOW>;
 464                         output-high;
 465                         line-name = "bmc-ocp0-en-n";
 466                 };
 467         };
 468 };
 469
 470 &i2c9 {
 471         status = "okay";
 472 };
 473
 474 &i2c11 {
 475         status = "okay";
 476         ssif-bmc@10 {
 477                 compatible = "ssif-bmc";
 478                 reg = <0x10>;
 479         };
 480 };
 481
 482 &i2c14 {
 483         status = "okay";
 484         eeprom@50 {
 485                 compatible = "atmel,24c64";
 486                 reg = <0x50>;
 487                 pagesize = <32>;
 488         };
 489
 490         bmc_ast2600_cpu: temperature-sensor@35 {
 491                 compatible = "ti,tmp175";
 492                 reg = <0x35>;
 493         };
 494 };
 495
 496 &adc0 {
 497         ref_voltage = <2500>;
 498         status = "okay";
 499
 500         pinctrl-names = "default";
 501         pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
 502                 &pinctrl_adc2_default &pinctrl_adc3_default
 503                 &pinctrl_adc4_default &pinctrl_adc5_default
 504                 &pinctrl_adc6_default &pinctrl_adc7_default>;
 505 };
 506
 507 &adc1 {
 508         ref_voltage = <2500>;
 509         status = "okay";
 510
 511         pinctrl-names = "default";
 512         pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
 513                 &pinctrl_adc10_default &pinctrl_adc11_default
 514                 &pinctrl_adc12_default &pinctrl_adc13_default
 515                 &pinctrl_adc14_default &pinctrl_adc15_default>;
 516 };
 517
 518 &vhub {
 519         status = "okay";
 520 };
 521
 522 &video {
 523         status = "okay";
 524         memory-region = <&video_engine_memory>;
 525 };
 526
 527 &gpio0 {
 528         gpio-line-names =
 529         /*A0-A7*/       "","","","","","i2c2-reset-n","i2c6-reset-n","i2c4-reset-n",
 530         /*B0-B7*/       "","","","","host0-sysreset-n","host0-pmin-n","","",
 531         /*C0-C7*/       "s0-vrd-fault-n","s1-vrd-fault-n","","",
 532                         "irq-n","","vrd-sel","spd-sel",
 533         /*D0-D7*/       "presence-ps0","presence-ps1","hsc-12vmain-alt2-n","ext-high-temp-n",
 534                         "","bmc-ncsi-txen","","",
 535         /*E0-E7*/       "","","clk50m-bmc-ncsi","","","","","",
 536         /*F0-F7*/       "s0-pcp-oc-warn-n","s1-pcp-oc-warn-n","power-chassis-control",
 537                         "cpu-bios-recover","s0-heartbeat","hs-csout-prochot",
 538                         "s0-vr-hot-n","s1-vr-hot-n",
 539         /*G0-G7*/       "","","hsc-12vmain-alt1-n","","","","","",
 540         /*H0-H7*/       "","","wd-disable-n","power-chassis-good","","","","",
 541         /*I0-I7*/       "","","","","","adc-sw","power-button","rtc-battery-voltage-read-enable",
 542         /*J0-J7*/       "","","","","","","","",
 543         /*K0-K7*/       "","","","","","","","",
 544         /*L0-L7*/       "","","","","","","","",
 545         /*M0-M7*/       "","s0-ddr-save","soc-spi-nor-access","presence-cpu0",
 546                         "s0-rtc-lock","","","",
 547         /*N0-N7*/       "hpm-fw-recovery","hpm-stby-rst-n","jtag-sel-s0","led-sw-hb",
 548                         "jtag-dbgr-prsnt-n","s1-heartbeat","","",
 549         /*O0-O7*/       "","","","","","","","",
 550         /*P0-P7*/       "ps0-ac-loss-n","ps1-ac-loss-n","","",
 551                         "led-fault","cpld-user-mode","jtag-srst-n","led-bmc-hb",
 552         /*Q0-Q7*/       "","","","","","","","",
 553         /*R0-R7*/       "","","","","","","","",
 554         /*S0-S7*/       "","","identify-button","led-identify",
 555                         "s1-ddr-save","spi-nor-access","sys-pgood","presence-cpu1",
 556         /*T0-T7*/       "","","","","","","","",
 557         /*U0-U7*/       "","","","","","","","",
 558         /*V0-V7*/       "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
 559                         "host0-reboot-ack-n","host0-ready","host0-shd-req-n",
 560                         "host0-shd-ack-n","s0-overtemp-n",
 561         /*W0-W7*/       "","ocp-main-pwren","ocp-pgood","",
 562                         "bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",
 563         /*X0-X7*/       "i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok",
 564                         "s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n",
 565                         "s1-overtemp-n","s1-spi-auth-fail-n",
 566         /*Y0-Y7*/       "","","","","","","","host0-special-boot",
 567         /*Z0-Z7*/       "reset-button","ps0-pgood","ps1-pgood","","","","","";
 568
 569         ocp-aux-pwren-hog {
 570                 gpio-hog;
 571                 gpios = <ASPEED_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
 572                 output-high;
 573                 line-name = "ocp-aux-pwren";
 574         };
 575 };
 576
 577 &gpio1 {
 578         gpio-line-names =
 579         /*18A0-18A7*/   "","","","","","","","",
 580         /*18B0-18B7*/   "","","","","","","s0-soc-pgood","",
 581         /*18C0-18C7*/   "uart1-mode0","uart1-mode1","uart2-mode0","uart2-mode1",
 582                         "uart3-mode0","uart3-mode1","uart4-mode0","uart4-mode1",
 583         /*18D0-18D7*/   "","","","","","","","",
 584         /*18E0-18E3*/   "","","","";
 585 };