src/arm/bcm2711.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include "bcm283x.dtsi"
   3
   4 #include <dt-bindings/interrupt-controller/arm-gic.h>
   5 #include <dt-bindings/soc/bcm2835-pm.h>
   6
   7 / {
   8         compatible = "brcm,bcm2711";
   9
  10         #address-cells = <2>;
  11         #size-cells = <1>;
  12
  13         interrupt-parent = <&gicv2>;
  14
  15         reserved-memory {
  16                 #address-cells = <2>;
  17                 #size-cells = <1>;
  18                 ranges;
  19
  20                 /*
  21                  * arm64 reserves the CMA by default somewhere in ZONE_DMA32,
  22                  * that's not good enough for the BCM2711 as some devices can
  23                  * only address the lower 1G of memory (ZONE_DMA).
  24                  */
  25                 linux,cma {
  26                         compatible = "shared-dma-pool";
  27                         size = <0x2000000>; /* 32MB */
  28                         alloc-ranges = <0x0 0x00000000 0x40000000>;
  29                         reusable;
  30                         linux,cma-default;
  31                 };
  32         };
  33
  34
  35         soc {
  36                 /*
  37                  * Defined ranges:
  38                  *   Common BCM283x peripherals
  39                  *   BCM2711-specific peripherals
  40                  *   ARM-local peripherals
  41                  */
  42                 ranges = <0x7e000000  0x0 0xfe000000  0x01800000>,
  43                          <0x7c000000  0x0 0xfc000000  0x02000000>,
  44                          <0x40000000  0x0 0xff800000  0x00800000>;
  45                 /* Emulate a contiguous 30-bit address range for DMA */
  46                 dma-ranges = <0xc0000000  0x0 0x00000000  0x40000000>;
  47
  48                 /*
  49                  * This node is the provider for the enable-method for
  50                  * bringing up secondary cores.
  51                  */
  52                 local_intc: local_intc@40000000 {
  53                         compatible = "brcm,bcm2836-l1-intc";
  54                         reg = <0x40000000 0x100>;
  55                 };
  56
  57                 gicv2: interrupt-controller@40041000 {
  58                         interrupt-controller;
  59                         #interrupt-cells = <3>;
  60                         compatible = "arm,gic-400";
  61                         reg =   <0x40041000 0x1000>,
  62                                 <0x40042000 0x2000>,
  63                                 <0x40044000 0x2000>,
  64                                 <0x40046000 0x2000>;
  65                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  66                                                  IRQ_TYPE_LEVEL_HIGH)>;
  67                 };
  68
  69                 dma: dma@7e007000 {
  70                         compatible = "brcm,bcm2835-dma";
  71                         reg = <0x7e007000 0xb00>;
  72                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
  73                                      <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
  74                                      <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
  75                                      <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
  76                                      <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
  77                                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
  78                                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
  79                                      /* DMA lite 7 - 10 */
  80                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
  81                                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
  82                                      <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
  83                                      <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
  84                         interrupt-names = "dma0",
  85                                           "dma1",
  86                                           "dma2",
  87                                           "dma3",
  88                                           "dma4",
  89                                           "dma5",
  90                                           "dma6",
  91                                           "dma7",
  92                                           "dma8",
  93                                           "dma9",
  94                                           "dma10";
  95                         #dma-cells = <1>;
  96                         brcm,dma-channel-mask = <0x07f5>;
  97                 };
  98
  99                 pm: watchdog@7e100000 {
 100                         compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
 101                         #power-domain-cells = <1>;
 102                         #reset-cells = <1>;
 103                         reg = <0x7e100000 0x114>,
 104                               <0x7e00a000 0x24>,
 105                               <0x7ec11000 0x20>;
 106                         clocks = <&clocks BCM2835_CLOCK_V3D>,
 107                                  <&clocks BCM2835_CLOCK_PERI_IMAGE>,
 108                                  <&clocks BCM2835_CLOCK_H264>,
 109                                  <&clocks BCM2835_CLOCK_ISP>;
 110                         clock-names = "v3d", "peri_image", "h264", "isp";
 111                         system-power-controller;
 112                 };
 113
 114                 rng@7e104000 {
 115                         interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
 116
 117                         /* RNG is incompatible with brcm,bcm2835-rng */
 118                         status = "disabled";
 119                 };
 120
 121                 uart2: serial@7e201400 {
 122                         compatible = "arm,pl011", "arm,primecell";
 123                         reg = <0x7e201400 0x200>;
 124                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 125                         clocks = <&clocks BCM2835_CLOCK_UART>,
 126                                  <&clocks BCM2835_CLOCK_VPU>;
 127                         clock-names = "uartclk", "apb_pclk";
 128                         arm,primecell-periphid = <0x00241011>;
 129                         status = "disabled";
 130                 };
 131
 132                 uart3: serial@7e201600 {
 133                         compatible = "arm,pl011", "arm,primecell";
 134                         reg = <0x7e201600 0x200>;
 135                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 136                         clocks = <&clocks BCM2835_CLOCK_UART>,
 137                                  <&clocks BCM2835_CLOCK_VPU>;
 138                         clock-names = "uartclk", "apb_pclk";
 139                         arm,primecell-periphid = <0x00241011>;
 140                         status = "disabled";
 141                 };
 142
 143                 uart4: serial@7e201800 {
 144                         compatible = "arm,pl011", "arm,primecell";
 145                         reg = <0x7e201800 0x200>;
 146                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 147                         clocks = <&clocks BCM2835_CLOCK_UART>,
 148                                  <&clocks BCM2835_CLOCK_VPU>;
 149                         clock-names = "uartclk", "apb_pclk";
 150                         arm,primecell-periphid = <0x00241011>;
 151                         status = "disabled";
 152                 };
 153
 154                 uart5: serial@7e201a00 {
 155                         compatible = "arm,pl011", "arm,primecell";
 156                         reg = <0x7e201a00 0x200>;
 157                         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 158                         clocks = <&clocks BCM2835_CLOCK_UART>,
 159                                  <&clocks BCM2835_CLOCK_VPU>;
 160                         clock-names = "uartclk", "apb_pclk";
 161                         arm,primecell-periphid = <0x00241011>;
 162                         status = "disabled";
 163                 };
 164
 165                 spi3: spi@7e204600 {
 166                         compatible = "brcm,bcm2835-spi";
 167                         reg = <0x7e204600 0x0200>;
 168                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 169                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 170                         #address-cells = <1>;
 171                         #size-cells = <0>;
 172                         status = "disabled";
 173                 };
 174
 175                 spi4: spi@7e204800 {
 176                         compatible = "brcm,bcm2835-spi";
 177                         reg = <0x7e204800 0x0200>;
 178                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 179                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 180                         #address-cells = <1>;
 181                         #size-cells = <0>;
 182                         status = "disabled";
 183                 };
 184
 185                 spi5: spi@7e204a00 {
 186                         compatible = "brcm,bcm2835-spi";
 187                         reg = <0x7e204a00 0x0200>;
 188                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 189                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 190                         #address-cells = <1>;
 191                         #size-cells = <0>;
 192                         status = "disabled";
 193                 };
 194
 195                 spi6: spi@7e204c00 {
 196                         compatible = "brcm,bcm2835-spi";
 197                         reg = <0x7e204c00 0x0200>;
 198                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 199                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 200                         #address-cells = <1>;
 201                         #size-cells = <0>;
 202                         status = "disabled";
 203                 };
 204
 205                 i2c3: i2c@7e205600 {
 206                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 207                         reg = <0x7e205600 0x200>;
 208                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 209                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 210                         #address-cells = <1>;
 211                         #size-cells = <0>;
 212                         status = "disabled";
 213                 };
 214
 215                 i2c4: i2c@7e205800 {
 216                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 217                         reg = <0x7e205800 0x200>;
 218                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 219                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 220                         #address-cells = <1>;
 221                         #size-cells = <0>;
 222                         status = "disabled";
 223                 };
 224
 225                 i2c5: i2c@7e205a00 {
 226                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 227                         reg = <0x7e205a00 0x200>;
 228                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 229                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 230                         #address-cells = <1>;
 231                         #size-cells = <0>;
 232                         status = "disabled";
 233                 };
 234
 235                 i2c6: i2c@7e205c00 {
 236                         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 237                         reg = <0x7e205c00 0x200>;
 238                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 239                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 240                         #address-cells = <1>;
 241                         #size-cells = <0>;
 242                         status = "disabled";
 243                 };
 244
 245                 pwm1: pwm@7e20c800 {
 246                         compatible = "brcm,bcm2835-pwm";
 247                         reg = <0x7e20c800 0x28>;
 248                         clocks = <&clocks BCM2835_CLOCK_PWM>;
 249                         assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
 250                         assigned-clock-rates = <10000000>;
 251                         #pwm-cells = <2>;
 252                         status = "disabled";
 253                 };
 254
 255                 emmc2: emmc2@7e340000 {
 256                         compatible = "brcm,bcm2711-emmc2";
 257                         reg = <0x7e340000 0x100>;
 258                         interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 259                         clocks = <&clocks BCM2711_CLOCK_EMMC2>;
 260                         status = "disabled";
 261                 };
 262
 263                 hvs@7e400000 {
 264                         interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 265                 };
 266         };
 267
 268         arm-pmu {
 269                 compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
 270                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 271                         <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
 272                         <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 273                         <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 274                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 275         };
 276
 277         timer {
 278                 compatible = "arm,armv8-timer";
 279                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
 280                                           IRQ_TYPE_LEVEL_LOW)>,
 281                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
 282                                           IRQ_TYPE_LEVEL_LOW)>,
 283                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
 284                                           IRQ_TYPE_LEVEL_LOW)>,
 285                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
 286                                           IRQ_TYPE_LEVEL_LOW)>;
 287                 /* This only applies to the ARMv7 stub */
 288                 arm,cpu-registers-not-fw-configured;
 289         };
 290
 291         cpus: cpus {
 292                 #address-cells = <1>;
 293                 #size-cells = <0>;
 294                 enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
 295
 296                 cpu0: cpu@0 {
 297                         device_type = "cpu";
 298                         compatible = "arm,cortex-a72";
 299                         reg = <0>;
 300                         enable-method = "spin-table";
 301                         cpu-release-addr = <0x0 0x000000d8>;
 302                 };
 303
 304                 cpu1: cpu@1 {
 305                         device_type = "cpu";
 306                         compatible = "arm,cortex-a72";
 307                         reg = <1>;
 308                         enable-method = "spin-table";
 309                         cpu-release-addr = <0x0 0x000000e0>;
 310                 };
 311
 312                 cpu2: cpu@2 {
 313                         device_type = "cpu";
 314                         compatible = "arm,cortex-a72";
 315                         reg = <2>;
 316                         enable-method = "spin-table";
 317                         cpu-release-addr = <0x0 0x000000e8>;
 318                 };
 319
 320                 cpu3: cpu@3 {
 321                         device_type = "cpu";
 322                         compatible = "arm,cortex-a72";
 323                         reg = <3>;
 324                         enable-method = "spin-table";
 325                         cpu-release-addr = <0x0 0x000000f0>;
 326                 };
 327         };
 328
 329         scb {
 330                 compatible = "simple-bus";
 331                 #address-cells = <2>;
 332                 #size-cells = <1>;
 333
 334                 ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>;
 335
 336                 genet: ethernet@7d580000 {
 337                         compatible = "brcm,bcm2711-genet-v5";
 338                         reg = <0x0 0x7d580000 0x10000>;
 339                         #address-cells = <0x1>;
 340                         #size-cells = <0x1>;
 341                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
 342                                      <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 343                         status = "disabled";
 344
 345                         genet_mdio: mdio@e14 {
 346                                 compatible = "brcm,genet-mdio-v5";
 347                                 reg = <0xe14 0x8>;
 348                                 reg-names = "mdio";
 349                                 #address-cells = <0x0>;
 350                                 #size-cells = <0x1>;
 351                         };
 352                 };
 353         };
 354 };
 355
 356 &clk_osc {
 357         clock-frequency = <54000000>;
 358 };
 359
 360 &clocks {
 361         compatible = "brcm,bcm2711-cprman";
 362 };
 363
 364 &cpu_thermal {
 365         coefficients = <(-487) 410040>;
 366 };
 367
 368 &dsi0 {
 369         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 370 };
 371
 372 &dsi1 {
 373         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 374 };
 375
 376 &gpio {
 377         compatible = "brcm,bcm2711-gpio";
 378         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
 379                      <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
 380                      <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
 381                      <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
 382
 383         gpclk0_gpio49: gpclk0_gpio49 {
 384                 pin-gpclk {
 385                         pins = "gpio49";
 386                         function = "alt1";
 387                         bias-disable;
 388                 };
 389         };
 390         gpclk1_gpio50: gpclk1_gpio50 {
 391                 pin-gpclk {
 392                         pins = "gpio50";
 393                         function = "alt1";
 394                         bias-disable;
 395                 };
 396         };
 397         gpclk2_gpio51: gpclk2_gpio51 {
 398                 pin-gpclk {
 399                         pins = "gpio51";
 400                         function = "alt1";
 401                         bias-disable;
 402                 };
 403         };
 404
 405         i2c0_gpio46: i2c0_gpio46 {
 406                 pin-sda {
 407                         function = "alt0";
 408                         pins = "gpio46";
 409                         bias-pull-up;
 410                 };
 411                 pin-scl {
 412                         function = "alt0";
 413                         pins = "gpio47";
 414                         bias-disable;
 415                 };
 416         };
 417         i2c1_gpio46: i2c1_gpio46 {
 418                 pin-sda {
 419                         function = "alt1";
 420                         pins = "gpio46";
 421                         bias-pull-up;
 422                 };
 423                 pin-scl {
 424                         function = "alt1";
 425                         pins = "gpio47";
 426                         bias-disable;
 427                 };
 428         };
 429         i2c3_gpio2: i2c3_gpio2 {
 430                 pin-sda {
 431                         function = "alt5";
 432                         pins = "gpio2";
 433                         bias-pull-up;
 434                 };
 435                 pin-scl {
 436                         function = "alt5";
 437                         pins = "gpio3";
 438                         bias-disable;
 439                 };
 440         };
 441         i2c3_gpio4: i2c3_gpio4 {
 442                 pin-sda {
 443                         function = "alt5";
 444                         pins = "gpio4";
 445                         bias-pull-up;
 446                 };
 447                 pin-scl {
 448                         function = "alt5";
 449                         pins = "gpio5";
 450                         bias-disable;
 451                 };
 452         };
 453         i2c4_gpio6: i2c4_gpio6 {
 454                 pin-sda {
 455                         function = "alt5";
 456                         pins = "gpio6";
 457                         bias-pull-up;
 458                 };
 459                 pin-scl {
 460                         function = "alt5";
 461                         pins = "gpio7";
 462                         bias-disable;
 463                 };
 464         };
 465         i2c4_gpio8: i2c4_gpio8 {
 466                 pin-sda {
 467                         function = "alt5";
 468                         pins = "gpio8";
 469                         bias-pull-up;
 470                 };
 471                 pin-scl {
 472                         function = "alt5";
 473                         pins = "gpio9";
 474                         bias-disable;
 475                 };
 476         };
 477         i2c5_gpio10: i2c5_gpio10 {
 478                 pin-sda {
 479                         function = "alt5";
 480                         pins = "gpio10";
 481                         bias-pull-up;
 482                 };
 483                 pin-scl {
 484                         function = "alt5";
 485                         pins = "gpio11";
 486                         bias-disable;
 487                 };
 488         };
 489         i2c5_gpio12: i2c5_gpio12 {
 490                 pin-sda {
 491                         function = "alt5";
 492                         pins = "gpio12";
 493                         bias-pull-up;
 494                 };
 495                 pin-scl {
 496                         function = "alt5";
 497                         pins = "gpio13";
 498                         bias-disable;
 499                 };
 500         };
 501         i2c6_gpio0: i2c6_gpio0 {
 502                 pin-sda {
 503                         function = "alt5";
 504                         pins = "gpio0";
 505                         bias-pull-up;
 506                 };
 507                 pin-scl {
 508                         function = "alt5";
 509                         pins = "gpio1";
 510                         bias-disable;
 511                 };
 512         };
 513         i2c6_gpio22: i2c6_gpio22 {
 514                 pin-sda {
 515                         function = "alt5";
 516                         pins = "gpio22";
 517                         bias-pull-up;
 518                 };
 519                 pin-scl {
 520                         function = "alt5";
 521                         pins = "gpio23";
 522                         bias-disable;
 523                 };
 524         };
 525         i2c_slave_gpio8: i2c_slave_gpio8 {
 526                 pins-i2c-slave {
 527                         pins = "gpio8",
 528                                "gpio9",
 529                                "gpio10",
 530                                "gpio11";
 531                         function = "alt3";
 532                 };
 533         };
 534
 535         jtag_gpio48: jtag_gpio48 {
 536                 pins-jtag {
 537                         pins = "gpio48",
 538                                "gpio49",
 539                                "gpio50",
 540                                "gpio51",
 541                                "gpio52",
 542                                "gpio53";
 543                         function = "alt4";
 544                 };
 545         };
 546
 547         mii_gpio28: mii_gpio28 {
 548                 pins-mii {
 549                         pins = "gpio28",
 550                                "gpio29",
 551                                "gpio30",
 552                                "gpio31";
 553                         function = "alt4";
 554                 };
 555         };
 556         mii_gpio36: mii_gpio36 {
 557                 pins-mii {
 558                         pins = "gpio36",
 559                                "gpio37",
 560                                "gpio38",
 561                                "gpio39";
 562                         function = "alt5";
 563                 };
 564         };
 565
 566         pcm_gpio50: pcm_gpio50 {
 567                 pins-pcm {
 568                         pins = "gpio50",
 569                                "gpio51",
 570                                "gpio52",
 571                                "gpio53";
 572                         function = "alt2";
 573                 };
 574         };
 575
 576         pwm0_0_gpio12: pwm0_0_gpio12 {
 577                 pin-pwm {
 578                         pins = "gpio12";
 579                         function = "alt0";
 580                         bias-disable;
 581                 };
 582         };
 583         pwm0_0_gpio18: pwm0_0_gpio18 {
 584                 pin-pwm {
 585                         pins = "gpio18";
 586                         function = "alt5";
 587                         bias-disable;
 588                 };
 589         };
 590         pwm1_0_gpio40: pwm1_0_gpio40 {
 591                 pin-pwm {
 592                         pins = "gpio40";
 593                         function = "alt0";
 594                         bias-disable;
 595                 };
 596         };
 597         pwm0_1_gpio13: pwm0_1_gpio13 {
 598                 pin-pwm {
 599                         pins = "gpio13";
 600                         function = "alt0";
 601                         bias-disable;
 602                 };
 603         };
 604         pwm0_1_gpio19: pwm0_1_gpio19 {
 605                 pin-pwm {
 606                         pins = "gpio19";
 607                         function = "alt5";
 608                         bias-disable;
 609                 };
 610         };
 611         pwm1_1_gpio41: pwm1_1_gpio41 {
 612                 pin-pwm {
 613                         pins = "gpio41";
 614                         function = "alt0";
 615                         bias-disable;
 616                 };
 617         };
 618         pwm0_1_gpio45: pwm0_1_gpio45 {
 619                 pin-pwm {
 620                         pins = "gpio45";
 621                         function = "alt0";
 622                         bias-disable;
 623                 };
 624         };
 625         pwm0_0_gpio52: pwm0_0_gpio52 {
 626                 pin-pwm {
 627                         pins = "gpio52";
 628                         function = "alt1";
 629                         bias-disable;
 630                 };
 631         };
 632         pwm0_1_gpio53: pwm0_1_gpio53 {
 633                 pin-pwm {
 634                         pins = "gpio53";
 635                         function = "alt1";
 636                         bias-disable;
 637                 };
 638         };
 639
 640         rgmii_gpio35: rgmii_gpio35 {
 641                 pin-start-stop {
 642                         pins = "gpio35";
 643                         function = "alt4";
 644                 };
 645                 pin-rx-ok {
 646                         pins = "gpio36";
 647                         function = "alt4";
 648                 };
 649         };
 650         rgmii_irq_gpio34: rgmii_irq_gpio34 {
 651                 pin-irq {
 652                         pins = "gpio34";
 653                         function = "alt5";
 654                 };
 655         };
 656         rgmii_irq_gpio39: rgmii_irq_gpio39 {
 657                 pin-irq {
 658                         pins = "gpio39";
 659                         function = "alt4";
 660                 };
 661         };
 662         rgmii_mdio_gpio28: rgmii_mdio_gpio28 {
 663                 pins-mdio {
 664                         pins = "gpio28",
 665                                "gpio29";
 666                         function = "alt5";
 667                 };
 668         };
 669         rgmii_mdio_gpio37: rgmii_mdio_gpio37 {
 670                 pins-mdio {
 671                         pins = "gpio37",
 672                                "gpio38";
 673                         function = "alt4";
 674                 };
 675         };
 676
 677         spi0_gpio46: spi0_gpio46 {
 678                 pins-spi {
 679                         pins = "gpio46",
 680                                "gpio47",
 681                                "gpio48",
 682                                "gpio49";
 683                         function = "alt2";
 684                 };
 685         };
 686         spi2_gpio46: spi2_gpio46 {
 687                 pins-spi {
 688                         pins = "gpio46",
 689                                "gpio47",
 690                                "gpio48",
 691                                "gpio49",
 692                                "gpio50";
 693                         function = "alt5";
 694                 };
 695         };
 696         spi3_gpio0: spi3_gpio0 {
 697                 pins-spi {
 698                         pins = "gpio0",
 699                                "gpio1",
 700                                "gpio2",
 701                                "gpio3";
 702                         function = "alt3";
 703                 };
 704         };
 705         spi4_gpio4: spi4_gpio4 {
 706                 pins-spi {
 707                         pins = "gpio4",
 708                                "gpio5",
 709                                "gpio6",
 710                                "gpio7";
 711                         function = "alt3";
 712                 };
 713         };
 714         spi5_gpio12: spi5_gpio12 {
 715                 pins-spi {
 716                         pins = "gpio12",
 717                                "gpio13",
 718                                "gpio14",
 719                                "gpio15";
 720                         function = "alt3";
 721                 };
 722         };
 723         spi6_gpio18: spi6_gpio18 {
 724                 pins-spi {
 725                         pins = "gpio18",
 726                                "gpio19",
 727                                "gpio20",
 728                                "gpio21";
 729                         function = "alt3";
 730                 };
 731         };
 732
 733         uart2_gpio0: uart2_gpio0 {
 734                 pin-tx {
 735                         pins = "gpio0";
 736                         function = "alt4";
 737                         bias-disable;
 738                 };
 739                 pin-rx {
 740                         pins = "gpio1";
 741                         function = "alt4";
 742                         bias-pull-up;
 743                 };
 744         };
 745         uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 {
 746                 pin-cts {
 747                         pins = "gpio2";
 748                         function = "alt4";
 749                         bias-pull-up;
 750                 };
 751                 pin-rts {
 752                         pins = "gpio3";
 753                         function = "alt4";
 754                         bias-disable;
 755                 };
 756         };
 757         uart3_gpio4: uart3_gpio4 {
 758                 pin-tx {
 759                         pins = "gpio4";
 760                         function = "alt4";
 761                         bias-disable;
 762                 };
 763                 pin-rx {
 764                         pins = "gpio5";
 765                         function = "alt4";
 766                         bias-pull-up;
 767                 };
 768         };
 769         uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 {
 770                 pin-cts {
 771                         pins = "gpio6";
 772                         function = "alt4";
 773                         bias-pull-up;
 774                 };
 775                 pin-rts {
 776                         pins = "gpio7";
 777                         function = "alt4";
 778                         bias-disable;
 779                 };
 780         };
 781         uart4_gpio8: uart4_gpio8 {
 782                 pin-tx {
 783                         pins = "gpio8";
 784                         function = "alt4";
 785                         bias-disable;
 786                 };
 787                 pin-rx {
 788                         pins = "gpio9";
 789                         function = "alt4";
 790                         bias-pull-up;
 791                 };
 792         };
 793         uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 {
 794                 pin-cts {
 795                         pins = "gpio10";
 796                         function = "alt4";
 797                         bias-pull-up;
 798                 };
 799                 pin-rts {
 800                         pins = "gpio11";
 801                         function = "alt4";
 802                         bias-disable;
 803                 };
 804         };
 805         uart5_gpio12: uart5_gpio12 {
 806                 pin-tx {
 807                         pins = "gpio12";
 808                         function = "alt4";
 809                         bias-disable;
 810                 };
 811                 pin-rx {
 812                         pins = "gpio13";
 813                         function = "alt4";
 814                         bias-pull-up;
 815                 };
 816         };
 817         uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 {
 818                 pin-cts {
 819                         pins = "gpio14";
 820                         function = "alt4";
 821                         bias-pull-up;
 822                 };
 823                 pin-rts {
 824                         pins = "gpio15";
 825                         function = "alt4";
 826                         bias-disable;
 827                 };
 828         };
 829 };
 830
 831 &i2c0 {
 832         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 833         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 834 };
 835
 836 &i2c1 {
 837         compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
 838         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 839 };
 840
 841 &mailbox {
 842         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 843 };
 844
 845 &sdhci {
 846         interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 847 };
 848
 849 &sdhost {
 850         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 851 };
 852
 853 &spi {
 854         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 855 };
 856
 857 &spi1 {
 858         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 859 };
 860
 861 &spi2 {
 862         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 863 };
 864
 865 &system_timer {
 866         interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
 867                      <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
 868                      <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
 869                      <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 870 };
 871
 872 &txp {
 873         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 874 };
 875
 876 &uart0 {
 877         interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 878 };
 879
 880 &uart1 {
 881         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 882 };
 883
 884 &usb {
 885         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 886 };
 887
 888 &vec {
 889         interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
 890 };