src/arm/imx6qdl-gw560x.dtsi

   1 /*
   2  * Copyright 2017 Gateworks Corporation
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of
  12  *     the License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  *     You should have received a copy of the GNU General Public
  20  *     License along with this file; if not, write to the Free
  21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22  *     MA 02110-1301 USA
  23  *
  24  * Or, alternatively,
  25  *
  26  *  b) Permission is hereby granted, free of charge, to any person
  27  *     obtaining a copy of this software and associated documentation
  28  *     files (the "Software"), to deal in the Software without
  29  *     restriction, including without limitation the rights to use,
  30  *     copy, modify, merge, publish, distribute, sublicense, and/or
  31  *     sell copies of the Software, and to permit persons to whom the
  32  *     Software is furnished to do so, subject to the following
  33  *     conditions:
  34  *
  35  *     The above copyright notice and this permission notice shall be
  36  *     included in all copies or substantial portions of the Software.
  37  *
  38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45  *     OTHER DEALINGS IN THE SOFTWARE.
  46  */
  47
  48 #include <dt-bindings/gpio/gpio.h>
  49 #include <dt-bindings/input/input.h>
  50
  51 / {
  52         /* these are used by bootloader for disabling nodes */
  53         aliases {
  54                 led0 = &led0;
  55                 led1 = &led1;
  56                 led2 = &led2;
  57                 ssi0 = &ssi1;
  58                 usb0 = &usbh1;
  59                 usb1 = &usbotg;
  60         };
  61
  62         chosen {
  63                 stdout-path = &uart2;
  64         };
  65
  66         backlight-display {
  67                 compatible = "pwm-backlight";
  68                 pwms = <&pwm4 0 5000000>;
  69                 brightness-levels = <
  70                         0  1  2  3  4  5  6  7  8  9
  71                         10 11 12 13 14 15 16 17 18 19
  72                         20 21 22 23 24 25 26 27 28 29
  73                         30 31 32 33 34 35 36 37 38 39
  74                         40 41 42 43 44 45 46 47 48 49
  75                         50 51 52 53 54 55 56 57 58 59
  76                         60 61 62 63 64 65 66 67 68 69
  77                         70 71 72 73 74 75 76 77 78 79
  78                         80 81 82 83 84 85 86 87 88 89
  79                         90 91 92 93 94 95 96 97 98 99
  80                         100
  81                         >;
  82                 default-brightness-level = <100>;
  83         };
  84
  85         backlight-keypad {
  86                 compatible = "gpio-backlight";
  87                 gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
  88                 default-on;
  89         };
  90
  91         leds {
  92                 compatible = "gpio-leds";
  93                 pinctrl-names = "default";
  94                 pinctrl-0 = <&pinctrl_gpio_leds>;
  95
  96                 led0: user1 {
  97                         label = "user1";
  98                         gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
  99                         default-state = "on";
 100                         linux,default-trigger = "heartbeat";
 101                 };
 102
 103                 led1: user2 {
 104                         label = "user2";
 105                         gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
 106                         default-state = "off";
 107                 };
 108
 109                 led2: user3 {
 110                         label = "user3";
 111                         gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
 112                         default-state = "off";
 113                 };
 114         };
 115
 116         memory@10000000 {
 117                 device_type = "memory";
 118                 reg = <0x10000000 0x40000000>;
 119         };
 120
 121         pps {
 122                 compatible = "pps-gpio";
 123                 pinctrl-names = "default";
 124                 pinctrl-0 = <&pinctrl_pps>;
 125                 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
 126         };
 127
 128         reg_2p5v: regulator-2p5v {
 129                 compatible = "regulator-fixed";
 130                 regulator-name = "2P5V";
 131                 regulator-min-microvolt = <2500000>;
 132                 regulator-max-microvolt = <2500000>;
 133                 regulator-always-on;
 134         };
 135
 136         reg_3p3v: regulator-3p3v {
 137                 compatible = "regulator-fixed";
 138                 regulator-name = "3P3V";
 139                 regulator-min-microvolt = <3300000>;
 140                 regulator-max-microvolt = <3300000>;
 141                 regulator-always-on;
 142         };
 143
 144         reg_5p0v: regulator-5p0v {
 145                 compatible = "regulator-fixed";
 146                 regulator-name = "5P0V";
 147                 regulator-min-microvolt = <5000000>;
 148                 regulator-max-microvolt = <5000000>;
 149                 regulator-always-on;
 150         };
 151
 152         reg_12p0v: regulator-12p0v {
 153                 compatible = "regulator-fixed";
 154                 regulator-name = "12P0V";
 155                 regulator-min-microvolt = <12000000>;
 156                 regulator-max-microvolt = <12000000>;
 157                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
 158                 enable-active-high;
 159         };
 160
 161         reg_1p4v: regulator-vddsoc {
 162                 compatible = "regulator-fixed";
 163                 regulator-name = "vdd_soc";
 164                 regulator-min-microvolt = <1400000>;
 165                 regulator-max-microvolt = <1400000>;
 166                 regulator-always-on;
 167         };
 168
 169         reg_usb_h1_vbus: regulator-usb-h1-vbus {
 170                 compatible = "regulator-fixed";
 171                 regulator-name = "usb_h1_vbus";
 172                 regulator-min-microvolt = <5000000>;
 173                 regulator-max-microvolt = <5000000>;
 174                 regulator-always-on;
 175         };
 176
 177         reg_usb_otg_vbus: regulator-usb-otg-vbus {
 178                 compatible = "regulator-fixed";
 179                 regulator-name = "usb_otg_vbus";
 180                 regulator-min-microvolt = <5000000>;
 181                 regulator-max-microvolt = <5000000>;
 182                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 183                 enable-active-high;
 184         };
 185
 186         sound {
 187                 compatible = "fsl,imx6q-ventana-sgtl5000",
 188                              "fsl,imx-audio-sgtl5000";
 189                 model = "sgtl5000-audio";
 190                 ssi-controller = <&ssi1>;
 191                 audio-codec = <&sgtl5000>;
 192                 audio-routing =
 193                         "MIC_IN", "Mic Jack",
 194                         "Mic Jack", "Mic Bias",
 195                         "Headphone Jack", "HP_OUT";
 196                 mux-int-port = <1>;
 197                 mux-ext-port = <4>;
 198         };
 199 };
 200
 201 &audmux {
 202         pinctrl-names = "default";
 203         pinctrl-0 = <&pinctrl_audmux>;
 204         status = "okay";
 205 };
 206
 207 &ecspi3 {
 208         cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
 209         pinctrl-names = "default";
 210         pinctrl-0 = <&pinctrl_ecspi3>;
 211         status = "okay";
 212 };
 213
 214 &can1 {
 215         pinctrl-names = "default";
 216         pinctrl-0 = <&pinctrl_flexcan>;
 217         status = "okay";
 218 };
 219
 220 &clks {
 221         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 222                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
 223         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
 224                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 225 };
 226
 227 &fec {
 228         pinctrl-names = "default";
 229         pinctrl-0 = <&pinctrl_enet>;
 230         phy-mode = "rgmii-id";
 231         phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
 232         status = "okay";
 233 };
 234
 235 &hdmi {
 236         ddc-i2c-bus = <&i2c3>;
 237         status = "okay";
 238 };
 239
 240 &i2c1 {
 241         clock-frequency = <100000>;
 242         pinctrl-names = "default";
 243         pinctrl-0 = <&pinctrl_i2c1>;
 244         status = "okay";
 245
 246         eeprom1: eeprom@50 {
 247                 compatible = "atmel,24c02";
 248                 reg = <0x50>;
 249                 pagesize = <16>;
 250         };
 251
 252         eeprom2: eeprom@51 {
 253                 compatible = "atmel,24c02";
 254                 reg = <0x51>;
 255                 pagesize = <16>;
 256         };
 257
 258         eeprom3: eeprom@52 {
 259                 compatible = "atmel,24c02";
 260                 reg = <0x52>;
 261                 pagesize = <16>;
 262         };
 263
 264         eeprom4: eeprom@53 {
 265                 compatible = "atmel,24c02";
 266                 reg = <0x53>;
 267                 pagesize = <16>;
 268         };
 269
 270         pca9555: gpio@23 {
 271                 compatible = "nxp,pca9555";
 272                 reg = <0x23>;
 273                 gpio-controller;
 274                 #gpio-cells = <2>;
 275         };
 276
 277         ds1672: rtc@68 {
 278                 compatible = "dallas,ds1672";
 279                 reg = <0x68>;
 280         };
 281 };
 282
 283 &i2c2 {
 284         clock-frequency = <100000>;
 285         pinctrl-names = "default";
 286         pinctrl-0 = <&pinctrl_i2c2>;
 287         status = "okay";
 288
 289         sgtl5000: codec@a {
 290                 compatible = "fsl,sgtl5000";
 291                 reg = <0x0a>;
 292                 #sound-dai-cells = <0>;
 293                 clocks = <&clks IMX6QDL_CLK_CKO>;
 294                 VDDA-supply = <&reg_1p8v>;
 295                 VDDIO-supply = <&reg_3p3v>;
 296         };
 297
 298         magn@1c {
 299                 compatible = "st,lsm9ds1-magn";
 300                 reg = <0x1c>;
 301                 pinctrl-names = "default";
 302                 pinctrl-0 = <&pinctrl_mag>;
 303                 interrupt-parent = <&gpio5>;
 304                 interrupts = <9 IRQ_TYPE_EDGE_RISING>;
 305         };
 306
 307         tca8418: keypad@34 {
 308                 compatible = "ti,tca8418";
 309                 pinctrl-names = "default";
 310                 pinctrl-0 = <&pinctrl_keypad>;
 311                 reg = <0x34>;
 312                 interrupt-parent = <&gpio5>;
 313                 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
 314                 linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0)
 315                                  MATRIX_KEY(0x00, 0x00, BTN_1)
 316                                  MATRIX_KEY(0x01, 0x01, BTN_2)
 317                                  MATRIX_KEY(0x01, 0x00, BTN_3)
 318                                  MATRIX_KEY(0x02, 0x00, BTN_4)
 319                                  MATRIX_KEY(0x00, 0x03, BTN_5)
 320                                  MATRIX_KEY(0x00, 0x02, BTN_6)
 321                                  MATRIX_KEY(0x01, 0x03, BTN_7)
 322                                  MATRIX_KEY(0x01, 0x02, BTN_8)
 323                                  MATRIX_KEY(0x02, 0x02, BTN_9)
 324                 >;
 325                 keypad,num-rows = <4>;
 326                 keypad,num-columns = <4>;
 327         };
 328
 329         ltc3676: pmic@3c {
 330                 compatible = "lltc,ltc3676";
 331                 pinctrl-names = "default";
 332                 pinctrl-0 = <&pinctrl_pmic>;
 333                 reg = <0x3c>;
 334                 interrupt-parent = <&gpio1>;
 335                 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
 336
 337                 regulators {
 338                         /* VDD_DDR (1+R1/R2 = 2.105) */
 339                         reg_vdd_ddr: sw2 {
 340                                 regulator-name = "vddddr";
 341                                 regulator-min-microvolt = <868310>;
 342                                 regulator-max-microvolt = <1684000>;
 343                                 lltc,fb-voltage-divider = <221000 200000>;
 344                                 regulator-ramp-delay = <7000>;
 345                                 regulator-boot-on;
 346                                 regulator-always-on;
 347                         };
 348
 349                         /* VDD_ARM (1+R1/R2 = 1.931) */
 350                         reg_vdd_arm: sw3 {
 351                                 regulator-name = "vddarm";
 352                                 regulator-min-microvolt = <796551>;
 353                                 regulator-max-microvolt = <1544827>;
 354                                 lltc,fb-voltage-divider = <243000 261000>;
 355                                 regulator-ramp-delay = <7000>;
 356                                 regulator-boot-on;
 357                                 regulator-always-on;
 358                                 linux,phandle = <&reg_vdd_arm>;
 359                         };
 360
 361                         /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
 362                         reg_1p8v: sw4 {
 363                                 regulator-name = "vdd1p8";
 364                                 regulator-min-microvolt = <1033310>;
 365                                 regulator-max-microvolt = <2004000>;
 366                                 lltc,fb-voltage-divider = <301000 200000>;
 367                                 regulator-ramp-delay = <7000>;
 368                                 regulator-boot-on;
 369                                 regulator-always-on;
 370                         };
 371
 372                         /* VDD_1P0 (1+R1/R2 = 1.39): PCIe/ENET-PHY */
 373                         reg_1p0v: ldo2 {
 374                                 regulator-name = "vdd1p0";
 375                                 regulator-min-microvolt = <950000>;
 376                                 regulator-max-microvolt = <1050000>;
 377                                 lltc,fb-voltage-divider = <78700 200000>;
 378                                 regulator-boot-on;
 379                                 regulator-always-on;
 380                         };
 381
 382                         /* VDD_AUD_1P8: Audio codec */
 383                         reg_aud_1p8v: ldo3 {
 384                                 regulator-name = "vdd1p8a";
 385                                 regulator-min-microvolt = <1800000>;
 386                                 regulator-max-microvolt = <1800000>;
 387                                 regulator-boot-on;
 388                         };
 389
 390                         /* VDD_HIGH (1+R1/R2 = 4.17) */
 391                         reg_3p0v: ldo4 {
 392                                 regulator-name = "vdd3p0";
 393                                 regulator-min-microvolt = <3023250>;
 394                                 regulator-max-microvolt = <3023250>;
 395                                 lltc,fb-voltage-divider = <634000 200000>;
 396                                 regulator-boot-on;
 397                                 regulator-always-on;
 398                         };
 399                 };
 400         };
 401
 402         imu@6a {
 403                 compatible = "st,lsm9ds1-imu";
 404                 reg = <0x6a>;
 405                 st,drdy-int-pin = <1>;
 406                 pinctrl-names = "default";
 407                 pinctrl-0 = <&pinctrl_imu>;
 408                 interrupt-parent = <&gpio5>;
 409                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
 410         };
 411 };
 412
 413 &i2c3 {
 414         clock-frequency = <100000>;
 415         pinctrl-names = "default";
 416         pinctrl-0 = <&pinctrl_i2c3>;
 417         status = "okay";
 418
 419         egalax_ts: touchscreen@4 {
 420                 compatible = "eeti,egalax_ts";
 421                 reg = <0x04>;
 422                 interrupt-parent = <&gpio5>;
 423                 interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
 424                 wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
 425         };
 426 };
 427
 428 &ldb {
 429         fsl,dual-channel;
 430         status = "okay";
 431
 432         lvds-channel@0 {
 433                 fsl,data-mapping = "spwg";
 434                 fsl,data-width = <18>;
 435                 status = "okay";
 436
 437                 display-timings {
 438                         native-mode = <&timing0>;
 439                         timing0: hsd100pxn1 {
 440                                 clock-frequency = <65000000>;
 441                                 hactive = <1024>;
 442                                 vactive = <768>;
 443                                 hback-porch = <220>;
 444                                 hfront-porch = <40>;
 445                                 vback-porch = <21>;
 446                                 vfront-porch = <7>;
 447                                 hsync-len = <60>;
 448                                 vsync-len = <10>;
 449                         };
 450                 };
 451         };
 452 };
 453
 454 &pcie {
 455         pinctrl-names = "default";
 456         pinctrl-0 = <&pinctrl_pcie>;
 457         reset-gpio = <&gpio4 31 GPIO_ACTIVE_LOW>;
 458         status = "okay";
 459 };
 460
 461 &pwm2 {
 462         pinctrl-names = "default";
 463         pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
 464         status = "disabled";
 465 };
 466
 467 &pwm3 {
 468         pinctrl-names = "default";
 469         pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
 470         status = "disabled";
 471 };
 472
 473 &pwm4 {
 474         pinctrl-names = "default";
 475         pinctrl-0 = <&pinctrl_pwm4>;
 476         status = "okay";
 477 };
 478
 479 &ssi1 {
 480         status = "okay";
 481 };
 482
 483 &uart1 {
 484         pinctrl-names = "default";
 485         pinctrl-0 = <&pinctrl_uart1>;
 486         uart-has-rtscts;
 487         rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
 488         status = "okay";
 489 };
 490
 491 &uart2 {
 492         pinctrl-names = "default";
 493         pinctrl-0 = <&pinctrl_uart2>;
 494         status = "okay";
 495 };
 496
 497 &uart5 {
 498         pinctrl-names = "default";
 499         pinctrl-0 = <&pinctrl_uart5>;
 500         status = "okay";
 501 };
 502
 503 &usbotg {
 504         vbus-supply = <&reg_usb_otg_vbus>;
 505         pinctrl-names = "default";
 506         pinctrl-0 = <&pinctrl_usbotg>;
 507         disable-over-current;
 508         status = "okay";
 509 };
 510
 511 &usbh1 {
 512         vbus-supply = <&reg_usb_h1_vbus>;
 513         pinctrl-names = "default";
 514         pinctrl-0 = <&pinctrl_usbh1>;
 515         status = "okay";
 516 };
 517
 518 &usdhc2 {
 519         pinctrl-names = "default";
 520         pinctrl-0 = <&pinctrl_usdhc2>;
 521         bus-width = <8>;
 522         vmmc-supply = <&reg_3p3v>;
 523         non-removable;
 524         status = "okay";
 525 };
 526
 527 &usdhc3 {
 528         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 529         pinctrl-0 = <&pinctrl_usdhc3>;
 530         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 531         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 532         cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
 533         vmmc-supply = <&reg_3p3v>;
 534         status = "okay";
 535 };
 536
 537 &wdog1 {
 538         pinctrl-names = "default";
 539         pinctrl-0 = <&pinctrl_wdog>;
 540         fsl,ext-reset-output;
 541 };
 542
 543 &iomuxc {
 544         pinctrl_audmux: audmuxgrp {
 545                 fsl,pins = <
 546                         /* AUD4 */
 547                         MX6QDL_PAD_DISP0_DAT20__AUD4_TXC        0x130b0
 548                         MX6QDL_PAD_DISP0_DAT21__AUD4_TXD        0x110b0
 549                         MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS       0x130b0
 550                         MX6QDL_PAD_DISP0_DAT23__AUD4_RXD        0x130b0
 551                         MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0 /* AUD4_MCK */
 552                         /* AUD6 */
 553                         MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x130b0
 554                         MX6QDL_PAD_DI0_PIN3__AUD6_TXFS          0x130b0
 555                         MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x130b0
 556                         MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x130b0
 557                 >;
 558         };
 559
 560         pinctrl_ecspi3: escpi3grp {
 561                 fsl,pins = <
 562                         MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK      0x100b1
 563                         MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI      0x100b1
 564                         MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO      0x100b1
 565                         MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24       0x100b1
 566                 >;
 567         };
 568
 569         pinctrl_enet: enetgrp {
 570                 fsl,pins = <
 571                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 572                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 573                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 574                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 575                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 576                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 577                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
 578                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
 579                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
 580                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
 581                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
 582                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
 583                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 584                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 585                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 586                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 587                         MX6QDL_PAD_ENET_TXD0__GPIO1_IO30        0x4001b0b0 /* PHY_RST# */
 588                 >;
 589         };
 590
 591         pinctrl_flexcan: flexcangrp {
 592                 fsl,pins = <
 593                         MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b1
 594                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b1
 595                         MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x4001b0b0 /* CAN_STBY */
 596                 >;
 597         };
 598
 599         pinctrl_gpio_leds: gpioledsgrp {
 600                 fsl,pins = <
 601                         MX6QDL_PAD_KEY_COL0__GPIO4_IO06         0x1b0b0
 602                         MX6QDL_PAD_KEY_ROW0__GPIO4_IO07         0x1b0b0
 603                         MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x1b0b0
 604                 >;
 605         };
 606
 607         pinctrl_i2c1: i2c1grp {
 608                 fsl,pins = <
 609                         MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 610                         MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 611                 >;
 612         };
 613
 614         pinctrl_i2c2: i2c2grp {
 615                 fsl,pins = <
 616                         MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 617                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 618                 >;
 619         };
 620
 621         pinctrl_i2c3: i2c3grp {
 622                 fsl,pins = <
 623                         MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 624                         MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 625                         MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x4001b0b0 /* DIOI2C_DIS# */
 626                         MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12      0x0001b0b0 /* LVDS_TOUCH_IRQ# */
 627                         MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13      0x0001b0b0 /* LVDS_BACKEN */
 628                 >;
 629         };
 630
 631         pinctrl_imu: imugrp {
 632                 fsl,pins = <
 633                         MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06      0x1b0b0
 634                 >;
 635         };
 636
 637         pinctrl_keypad: keypadgrp {
 638                 fsl,pins = <
 639                         MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11      0x0001b0b0 /* KEYPAD_IRQ# */
 640                         MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30       0x0001b0b0 /* KEYPAD_LED_EN */
 641                 >;
 642         };
 643
 644         pinctrl_mag: maggrp {
 645                 fsl,pins = <
 646                         MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09      0x1b0b0
 647                 >;
 648         };
 649
 650         pinctrl_pcie: pciegrp {
 651                 fsl,pins = <
 652                         MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31      0x1b0b0    /* PCI_RST# */
 653                         MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x4001b0b0 /* PCIESKT_WDIS# */
 654                 >;
 655         };
 656
 657         pinctrl_pmic: pmicgrp {
 658                 fsl,pins = <
 659                         MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0001b0b0 /* PMIC_IRQ# */
 660                 >;
 661         };
 662
 663         pinctrl_pps: ppsgrp {
 664                 fsl,pins = <
 665                         MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b1
 666                 >;
 667         };
 668
 669         pinctrl_pwm2: pwm2grp {
 670                 fsl,pins = <
 671                         MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
 672                 >;
 673         };
 674
 675         pinctrl_pwm3: pwm3grp {
 676                 fsl,pins = <
 677                         MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
 678                 >;
 679         };
 680
 681         pinctrl_pwm4: pwm4grp {
 682                 fsl,pins = <
 683                         MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
 684                 >;
 685         };
 686
 687         pinctrl_uart1: uart1grp {
 688                 fsl,pins = <
 689                         MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 690                         MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 691                         MX6QDL_PAD_SD3_DAT4__GPIO7_IO01         0x4001b0b1 /* TEN */
 692                 >;
 693         };
 694
 695         pinctrl_uart2: uart2grp {
 696                 fsl,pins = <
 697                         MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 698                         MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 699                 >;
 700         };
 701
 702         pinctrl_uart5: uart5grp {
 703                 fsl,pins = <
 704                         MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 705                         MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 706                 >;
 707         };
 708
 709         pinctrl_usbh1: usbh1grp {
 710                 fsl,pins = <
 711                         MX6QDL_PAD_GPIO_9__GPIO1_IO09           0x4001b0b0 /* USBHUB_RST# */
 712                 >;
 713         };
 714
 715         pinctrl_usbotg: usbotggrp {
 716                 fsl,pins = <
 717                         MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 718                         MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x1b0b0 /* PWR_EN */
 719                         MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x1b0b0 /* OC */
 720                 >;
 721         };
 722
 723         pinctrl_usdhc2: usdhc2grp {
 724                 fsl,pins = <
 725                         MX6QDL_PAD_SD2_CMD__SD2_CMD             0x170f9
 726                         MX6QDL_PAD_SD2_CLK__SD2_CLK             0x100f9
 727                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x170f9
 728                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x170f9
 729                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x170f9
 730                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x170f9
 731                         MX6QDL_PAD_NANDF_D4__SD2_DATA4          0x170f9
 732                         MX6QDL_PAD_NANDF_D5__SD2_DATA5          0x170f9
 733                         MX6QDL_PAD_NANDF_D6__SD2_DATA6          0x170f9
 734                         MX6QDL_PAD_NANDF_D7__SD2_DATA7          0x170f9
 735                 >;
 736         };
 737
 738         pinctrl_usdhc3: usdhc3grp {
 739                 fsl,pins = <
 740                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 741                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 742                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 743                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 744                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 745                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 746                         MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x17059 /* CD */
 747                         MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x17059
 748                 >;
 749         };
 750
 751         pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
 752                 fsl,pins = <
 753                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
 754                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
 755                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170b9
 756                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170b9
 757                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170b9
 758                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170b9
 759                         MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x170b9 /* CD */
 760                         MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x170b9
 761                 >;
 762         };
 763
 764         pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
 765                 fsl,pins = <
 766                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
 767                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
 768                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170f9
 769                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170f9
 770                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170f9
 771                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170f9
 772                         MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x170f9 /* CD */
 773                         MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x170f9
 774                 >;
 775         };
 776
 777         pinctrl_wdog: wdoggrp {
 778                 fsl,pins = <
 779                         MX6QDL_PAD_DISP0_DAT8__WDOG1_B          0x1b0b0
 780                 >;
 781         };
 782 };