1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2012 Freescale Semiconductor, Inc.
4 // Copyright 2011 Linaro Ltd.
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
16 device_type = "memory";
17 reg = <0x10000000 0x40000000>;
20 reg_usb_otg_vbus: regulator-usb-otg-vbus {
21 compatible = "regulator-fixed";
22 regulator-name = "usb_otg_vbus";
23 regulator-min-microvolt = <5000000>;
24 regulator-max-microvolt = <5000000>;
25 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
27 vin-supply = <&swbst_reg>;
30 reg_usb_h1_vbus: regulator-usb-h1-vbus {
31 compatible = "regulator-fixed";
32 regulator-name = "usb_h1_vbus";
33 regulator-min-microvolt = <5000000>;
34 regulator-max-microvolt = <5000000>;
35 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
37 vin-supply = <&swbst_reg>;
40 reg_audio: regulator-audio {
41 compatible = "regulator-fixed";
42 regulator-name = "wm8962-supply";
43 gpio = <&gpio4 10 GPIO_ACTIVE_HIGH>;
47 reg_pcie: regulator-pcie {
48 compatible = "regulator-fixed";
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_pcie_reg>;
51 regulator-name = "MPCIE_3V3";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
58 reg_sensors: regulator-sensors {
59 compatible = "regulator-fixed";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_sensors_reg>;
62 regulator-name = "sensors-supply";
63 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
65 gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
70 compatible = "gpio-keys";
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_gpio_keys>;
75 label = "Power Button";
76 gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
78 linux,code = <KEY_POWER>;
83 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
85 linux,code = <KEY_VOLUMEUP>;
89 label = "Volume Down";
90 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
92 linux,code = <KEY_VOLUMEDOWN>;
97 compatible = "fsl,imx6q-sabresd-wm8962",
98 "fsl,imx-audio-wm8962";
99 model = "wm8962-audio";
100 ssi-controller = <&ssi2>;
101 audio-codec = <&codec>;
103 "Headphone Jack", "HPOUTL",
104 "Headphone Jack", "HPOUTR",
105 "Ext Spk", "SPKOUTL",
106 "Ext Spk", "SPKOUTR",
113 backlight_lvds: backlight-lvds {
114 compatible = "pwm-backlight";
115 pwms = <&pwm1 0 5000000>;
116 brightness-levels = <0 4 8 16 32 64 128 255>;
117 default-brightness-level = <7>;
122 compatible = "gpio-leds";
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_gpio_leds>;
127 gpios = <&gpio1 2 0>;
128 default-state = "on";
133 compatible = "hannstar,hsd100pxn1";
134 backlight = <&backlight_lvds>;
138 remote-endpoint = <&lvds0_out>;
144 &ipu1_csi0_from_ipu1_csi0_mux {
146 data-shift = <12>; /* Lines 19:12 used */
151 &ipu1_csi0_mux_from_parallel_sensor {
152 remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_ipu1_csi0>;
166 mipi_csi2_in: endpoint {
167 remote-endpoint = <&ov5640_to_mipi_csi2>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&pinctrl_audmux>;
181 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
182 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
183 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
184 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
188 cs-gpios = <&gpio4 9 0>;
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_ecspi1>;
194 #address-cells = <1>;
196 compatible = "st,m25p32", "jedec,spi-nor";
197 spi-max-frequency = <20000000>;
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_enet>;
205 phy-mode = "rgmii-id";
206 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_hdmi_cec>;
214 ddc-i2c-bus = <&i2c2>;
219 clock-frequency = <100000>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_i2c1>;
225 compatible = "wlf,wm8962";
227 clocks = <&clks IMX6QDL_CLK_CKO>;
228 DCVDD-supply = <®_audio>;
229 DBVDD-supply = <®_audio>;
230 AVDD-supply = <®_audio>;
231 CPVDD-supply = <®_audio>;
232 MICVDD-supply = <®_audio>;
233 PLLVDD-supply = <®_audio>;
234 SPKVDD1-supply = <®_audio>;
235 SPKVDD2-supply = <®_audio>;
237 0x0000 /* 0:Default */
238 0x0000 /* 1:Default */
239 0x0013 /* 2:FN_DMICCLK */
240 0x0000 /* 3:Default */
241 0x8014 /* 4:FN_DMICCDAT */
242 0x0000 /* 5:Default */
247 compatible = "fsl,mma8451";
249 pinctrl-names = "default";
250 pinctrl-0 = <&pinctrl_i2c1_mma8451_int>;
251 interrupt-parent = <&gpio1>;
252 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
253 vdd-supply = <®_sensors>;
254 vddio-supply = <®_sensors>;
258 compatible = "ovti,ov5642";
259 pinctrl-names = "default";
260 pinctrl-0 = <&pinctrl_ov5642>;
261 clocks = <&clks IMX6QDL_CLK_CKO>;
262 clock-names = "xclk";
264 DOVDD-supply = <&vgen4_reg>; /* 1.8v */
265 AVDD-supply = <&vgen3_reg>; /* 2.8v, rev C board is VGEN3
266 rev B board is VGEN5 */
267 DVDD-supply = <&vgen2_reg>; /* 1.5v*/
268 powerdown-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
269 reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
273 ov5642_to_ipu1_csi0_mux: endpoint {
274 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
284 clock-frequency = <100000>;
285 pinctrl-names = "default";
286 pinctrl-0 = <&pinctrl_i2c2>;
290 compatible = "eeti,egalax_ts";
292 pinctrl-names = "default";
293 pinctrl-0 = <&pinctrl_i2c2_egalax_int>;
294 interrupt-parent = <&gpio6>;
295 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
296 wakeup-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
300 compatible = "ovti,ov5640";
301 pinctrl-names = "default";
302 pinctrl-0 = <&pinctrl_ov5640>;
304 clocks = <&clks IMX6QDL_CLK_CKO>;
305 clock-names = "xclk";
306 DOVDD-supply = <&vgen4_reg>; /* 1.8v */
307 AVDD-supply = <&vgen3_reg>; /* 2.8v, rev C board is VGEN3
308 rev B board is VGEN5 */
309 DVDD-supply = <&vgen2_reg>; /* 1.5v*/
310 powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
311 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
314 ov5640_to_mipi_csi2: endpoint {
315 remote-endpoint = <&mipi_csi2_in>;
323 compatible = "fsl,pfuze100";
328 regulator-min-microvolt = <300000>;
329 regulator-max-microvolt = <1875000>;
332 regulator-ramp-delay = <6250>;
336 regulator-min-microvolt = <300000>;
337 regulator-max-microvolt = <1875000>;
340 regulator-ramp-delay = <6250>;
344 regulator-min-microvolt = <800000>;
345 regulator-max-microvolt = <3300000>;
348 regulator-ramp-delay = <6250>;
352 regulator-min-microvolt = <400000>;
353 regulator-max-microvolt = <1975000>;
359 regulator-min-microvolt = <400000>;
360 regulator-max-microvolt = <1975000>;
366 regulator-min-microvolt = <800000>;
367 regulator-max-microvolt = <3300000>;
372 regulator-min-microvolt = <5000000>;
373 regulator-max-microvolt = <5150000>;
377 regulator-min-microvolt = <1000000>;
378 regulator-max-microvolt = <3000000>;
389 regulator-min-microvolt = <800000>;
390 regulator-max-microvolt = <1550000>;
394 regulator-min-microvolt = <800000>;
395 regulator-max-microvolt = <1550000>;
399 regulator-min-microvolt = <1800000>;
400 regulator-max-microvolt = <3300000>;
404 regulator-min-microvolt = <1800000>;
405 regulator-max-microvolt = <3300000>;
410 regulator-min-microvolt = <1800000>;
411 regulator-max-microvolt = <3300000>;
416 regulator-min-microvolt = <1800000>;
417 regulator-max-microvolt = <3300000>;
425 clock-frequency = <100000>;
426 pinctrl-names = "default";
427 pinctrl-0 = <&pinctrl_i2c3>;
431 compatible = "eeti,egalax_ts";
433 interrupt-parent = <&gpio6>;
435 wakeup-gpios = <&gpio6 7 0>;
439 compatible = "fsl,mag3110";
441 pinctrl-names = "default";
442 pinctrl-0 = <&pinctrl_i2c3_mag3110_int>;
443 interrupt-parent = <&gpio3>;
444 interrupts = <16 IRQ_TYPE_EDGE_RISING>;
445 vdd-supply = <®_sensors>;
446 vddio-supply = <®_sensors>;
450 compatible = "isil,isl29023";
452 pinctrl-names = "default";
453 pinctrl-0 = <&pinctrl_i2c3_isl29023_int>;
454 interrupt-parent = <&gpio3>;
455 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
456 vcc-supply = <®_sensors>;
461 pinctrl-names = "default";
462 pinctrl-0 = <&pinctrl_hog>;
465 pinctrl_hog: hoggrp {
467 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
468 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
469 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
470 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
471 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
472 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
473 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
474 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
475 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
479 pinctrl_audmux: audmuxgrp {
481 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
482 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
483 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
484 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
488 pinctrl_ecspi1: ecspi1grp {
490 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
491 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
492 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
493 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
497 pinctrl_enet: enetgrp {
499 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
500 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
501 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
502 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
503 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
504 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
505 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
506 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
507 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
508 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
509 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
510 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
511 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
512 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
513 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
514 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
518 pinctrl_gpio_keys: gpio_keysgrp {
520 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
521 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
522 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
526 pinctrl_hdmi_cec: hdmicecgrp {
528 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
532 pinctrl_i2c1: i2c1grp {
534 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
535 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
539 pinctrl_i2c1_mma8451_int: i2c1mma8451intgrp {
541 MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0xb0b1
545 pinctrl_i2c2: i2c2grp {
547 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
548 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
552 pinctrl_i2c2_egalax_int: i2c2egalaxintgrp {
554 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b0
558 pinctrl_i2c3: i2c3grp {
560 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
561 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
565 pinctrl_i2c3_isl29023_int: i2c3isl29023intgrp {
567 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0xb0b1
571 pinctrl_i2c3_mag3110_int: i2c3mag3110intgrp {
573 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0xb0b1
577 pinctrl_ipu1_csi0: ipu1csi0grp {
579 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
580 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
581 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
582 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
583 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
584 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
585 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
586 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
587 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
588 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
589 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
593 pinctrl_ov5640: ov5640grp {
595 MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0
596 MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x1b0b0
600 pinctrl_ov5642: ov5642grp {
602 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
603 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
607 pinctrl_pcie: pciegrp {
609 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
613 pinctrl_pcie_reg: pciereggrp {
615 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
619 pinctrl_pwm1: pwm1grp {
621 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
625 pinctrl_sensors_reg: sensorsreggrp {
627 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b0
631 pinctrl_uart1: uart1grp {
633 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
634 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
638 pinctrl_usbotg: usbotggrp {
640 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
644 pinctrl_usdhc2: usdhc2grp {
646 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
647 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
648 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
649 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
650 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
651 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
652 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
653 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
654 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
655 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
659 pinctrl_usdhc3: usdhc3grp {
661 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
662 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
663 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
664 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
665 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
666 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
667 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
668 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
669 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
670 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
674 pinctrl_usdhc4: usdhc4grp {
676 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
677 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
678 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
679 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
680 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
681 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
682 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
683 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
684 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
685 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
689 pinctrl_wdog: wdoggrp {
691 MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0
697 pinctrl_gpio_leds: gpioledsgrp {
699 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
709 fsl,data-mapping = "spwg";
710 fsl,data-width = <18>;
716 lvds0_out: endpoint {
717 remote-endpoint = <&panel_in>;
724 pinctrl-names = "default";
725 pinctrl-0 = <&pinctrl_pcie>;
726 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
727 vpcie-supply = <®_pcie>;
732 pinctrl-names = "default";
733 pinctrl-0 = <&pinctrl_pwm1>;
738 vin-supply = <&sw1a_reg>;
742 vin-supply = <&sw1c_reg>;
746 vin-supply = <&sw1c_reg>;
750 vin-supply = <&vgen5_reg>;
754 vin-supply = <&vgen5_reg>;
770 pinctrl-names = "default";
771 pinctrl-0 = <&pinctrl_uart1>;
776 vbus-supply = <®_usb_h1_vbus>;
781 vbus-supply = <®_usb_otg_vbus>;
782 pinctrl-names = "default";
783 pinctrl-0 = <&pinctrl_usbotg>;
784 disable-over-current;
789 pinctrl-names = "default";
790 pinctrl-0 = <&pinctrl_usdhc2>;
792 cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
793 wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
798 pinctrl-names = "default";
799 pinctrl-0 = <&pinctrl_usdhc3>;
801 cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
802 wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
807 pinctrl-names = "default";
808 pinctrl-0 = <&pinctrl_usdhc4>;
820 pinctrl-names = "default";
821 pinctrl-0 = <&pinctrl_wdog>;
822 fsl,ext-reset-output;