src/arm/imx6qdl-wandboard.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright 2013 Freescale Semiconductor, Inc.
   4  *
   5  * Author: Fabio Estevam <fabio.estevam@freescale.com>
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9
  10 / {
  11         regulators {
  12                 compatible = "simple-bus";
  13                 #address-cells = <1>;
  14                 #size-cells = <0>;
  15
  16                 reg_2p5v: regulator@0 {
  17                         compatible = "regulator-fixed";
  18                         reg = <0>;
  19                         regulator-name = "2P5V";
  20                         regulator-min-microvolt = <2500000>;
  21                         regulator-max-microvolt = <2500000>;
  22                         regulator-always-on;
  23                 };
  24
  25                 reg_3p3v: regulator@1 {
  26                         compatible = "regulator-fixed";
  27                         reg = <1>;
  28                         regulator-name = "3P3V";
  29                         regulator-min-microvolt = <3300000>;
  30                         regulator-max-microvolt = <3300000>;
  31                         regulator-always-on;
  32                 };
  33         };
  34
  35         sound {
  36                 compatible = "fsl,imx6-wandboard-sgtl5000",
  37                              "fsl,imx-audio-sgtl5000";
  38                 model = "imx6-wandboard-sgtl5000";
  39                 ssi-controller = <&ssi1>;
  40                 audio-codec = <&codec>;
  41                 audio-routing =
  42                         "MIC_IN", "Mic Jack",
  43                         "Mic Jack", "Mic Bias",
  44                         "Headphone Jack", "HP_OUT";
  45                 mux-int-port = <1>;
  46                 mux-ext-port = <3>;
  47         };
  48
  49         sound-spdif {
  50                 compatible = "fsl,imx-audio-spdif";
  51                 model = "imx-spdif";
  52                 spdif-controller = <&spdif>;
  53                 spdif-out;
  54         };
  55 };
  56
  57 &audmux {
  58         pinctrl-names = "default";
  59         pinctrl-0 = <&pinctrl_audmux>;
  60         status = "okay";
  61 };
  62
  63 &hdmi {
  64         ddc-i2c-bus = <&i2c1>;
  65         status = "okay";
  66 };
  67
  68 &i2c1 {
  69         clock-frequency = <100000>;
  70         pinctrl-names = "default";
  71         pinctrl-0 = <&pinctrl_i2c1>;
  72         status = "okay";
  73 };
  74
  75 &i2c2 {
  76         clock-frequency = <100000>;
  77         pinctrl-names = "default";
  78         pinctrl-0 = <&pinctrl_i2c2>;
  79         status = "okay";
  80
  81         codec: sgtl5000@a {
  82                 pinctrl-names = "default";
  83                 pinctrl-0 = <&pinctrl_mclk>;
  84                 compatible = "fsl,sgtl5000";
  85                 reg = <0x0a>;
  86                 clocks = <&clks IMX6QDL_CLK_CKO>;
  87                 VDDA-supply = <&reg_2p5v>;
  88                 VDDIO-supply = <&reg_3p3v>;
  89                 lrclk-strength = <3>;
  90         };
  91 };
  92
  93 &iomuxc {
  94         pinctrl-names = "default";
  95
  96         imx6qdl-wandboard {
  97
  98                 pinctrl_audmux: audmuxgrp {
  99                         fsl,pins = <
 100                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 101                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 102                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 103                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 104                         >;
 105                 };
 106
 107                 pinctrl_enet: enetgrp {
 108                         fsl,pins = <
 109                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 110                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 111                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
 112                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
 113                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
 114                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
 115                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
 116                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
 117                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 118                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 119                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 120                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 121                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 122                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 123                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 124                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 125                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 126                         >;
 127                 };
 128
 129                 pinctrl_i2c1: i2c1grp {
 130                         fsl,pins = <
 131                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 132                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 133                         >;
 134                 };
 135
 136                 pinctrl_i2c2: i2c2grp {
 137                         fsl,pins = <
 138                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 139                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 140                         >;
 141                 };
 142
 143                 pinctrl_mclk: mclkgrp {
 144                         fsl,pins = <
 145                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0
 146                         >;
 147                 };
 148
 149                 pinctrl_spdif: spdifgrp {
 150                         fsl,pins = <
 151                                 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT         0x1b0b0
 152                         >;
 153                 };
 154
 155                 pinctrl_uart1: uart1grp {
 156                         fsl,pins = <
 157                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
 158                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
 159                         >;
 160                 };
 161
 162                 pinctrl_uart3: uart3grp {
 163                         fsl,pins = <
 164                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
 165                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
 166                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
 167                                 MX6QDL_PAD_EIM_EB3__UART3_RTS_B         0x1b0b1
 168                         >;
 169                 };
 170
 171                 pinctrl_usbotg: usbotggrp {
 172                         fsl,pins = <
 173                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 174                         >;
 175                 };
 176
 177                 pinctrl_usdhc1: usdhc1grp {
 178                         fsl,pins = <
 179                                 MX6QDL_PAD_SD1_CMD__SD1_CMD             0x17059
 180                                 MX6QDL_PAD_SD1_CLK__SD1_CLK             0x10059
 181                                 MX6QDL_PAD_SD1_DAT0__SD1_DATA0          0x17059
 182                                 MX6QDL_PAD_SD1_DAT1__SD1_DATA1          0x17059
 183                                 MX6QDL_PAD_SD1_DAT2__SD1_DATA2          0x17059
 184                                 MX6QDL_PAD_SD1_DAT3__SD1_DATA3          0x17059
 185                         >;
 186                 };
 187
 188                 pinctrl_usdhc2: usdhc2grp {
 189                         fsl,pins = <
 190                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 191                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 192                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 193                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 194                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 195                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 196                         >;
 197                 };
 198
 199                 pinctrl_usdhc3: usdhc3grp {
 200                         fsl,pins = <
 201                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 202                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 203                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 204                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 205                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 206                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 207                         >;
 208                 };
 209         };
 210 };
 211
 212 &fec {
 213         pinctrl-names = "default";
 214         pinctrl-0 = <&pinctrl_enet>;
 215         phy-mode = "rgmii";
 216         phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
 217         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 218                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 219         fsl,err006687-workaround-present;
 220         status = "okay";
 221 };
 222
 223 &spdif {
 224         pinctrl-names = "default";
 225         pinctrl-0 = <&pinctrl_spdif>;
 226         status = "okay";
 227 };
 228
 229 &ssi1 {
 230         status = "okay";
 231 };
 232
 233 &uart1 {
 234         pinctrl-names = "default";
 235         pinctrl-0 = <&pinctrl_uart1>;
 236         status = "okay";
 237 };
 238
 239 &uart3 {
 240         pinctrl-names = "default";
 241         pinctrl-0 = <&pinctrl_uart3>;
 242         uart-has-rtscts;
 243         status = "okay";
 244 };
 245
 246 &usbh1 {
 247         status = "okay";
 248 };
 249
 250 &usbotg {
 251         pinctrl-names = "default";
 252         pinctrl-0 = <&pinctrl_usbotg>;
 253         disable-over-current;
 254         dr_mode = "peripheral";
 255         status = "okay";
 256 };
 257
 258 &usdhc1 {
 259         pinctrl-names = "default";
 260         pinctrl-0 = <&pinctrl_usdhc1>;
 261         cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
 262         status = "okay";
 263 };
 264
 265 &usdhc3 {
 266         pinctrl-names = "default";
 267         pinctrl-0 = <&pinctrl_usdhc3>;
 268         cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
 269         status = "okay";
 270 };