src/arm/omap3-n900.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
   4  * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
   5  */
   6
   7 /dts-v1/;
   8
   9 #include "omap34xx.dtsi"
  10 #include <dt-bindings/input/input.h>
  11
  12 /*
  13  * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
  14  * for omap AES HW crypto support. When linux kernel try to access memory of AES
  15  * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
  16  * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
  17  * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
  18  * There is "unofficial" version of bootloader which enables AES in L3 firewall
  19  * but it is not widely used and to prevent kernel crash rather AES is disabled.
  20  * There is also no runtime detection code if AES is disabled in L3 firewall...
  21  */
  22 &aes {
  23         status = "disabled";
  24 };
  25
  26 / {
  27         model = "Nokia N900";
  28         compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
  29
  30         aliases {
  31                 i2c0;
  32                 i2c1 = &i2c1;
  33                 i2c2 = &i2c2;
  34                 i2c3 = &i2c3;
  35                 display0 = &lcd;
  36                 display1 = &tv;
  37         };
  38
  39         cpus {
  40                 cpu@0 {
  41                         cpu0-supply = <&vcc>;
  42                 };
  43         };
  44
  45         leds {
  46                 compatible = "gpio-leds";
  47                 heartbeat {
  48                         label = "debug::sleep";
  49                         gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* 162 */
  50                         linux,default-trigger = "default-on";
  51                         pinctrl-names = "default";
  52                         pinctrl-0 = <&debug_leds>;
  53                 };
  54         };
  55
  56         memory@80000000 {
  57                 device_type = "memory";
  58                 reg = <0x80000000 0x10000000>; /* 256 MB */
  59         };
  60
  61         gpio_keys {
  62                 compatible = "gpio-keys";
  63
  64                 camera_lens_cover {
  65                         label = "Camera Lens Cover";
  66                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
  67                         linux,input-type = <EV_SW>;
  68                         linux,code = <SW_CAMERA_LENS_COVER>;
  69                         linux,can-disable;
  70                 };
  71
  72                 camera_focus {
  73                         label = "Camera Focus";
  74                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
  75                         linux,code = <KEY_CAMERA_FOCUS>;
  76                         linux,can-disable;
  77                 };
  78
  79                 camera_capture {
  80                         label = "Camera Capture";
  81                         gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
  82                         linux,code = <KEY_CAMERA>;
  83                         linux,can-disable;
  84                 };
  85
  86                 lock_button {
  87                         label = "Lock Button";
  88                         gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
  89                         linux,code = <KEY_SCREENLOCK>;
  90                         linux,can-disable;
  91                 };
  92
  93                 keypad_slide {
  94                         label = "Keypad Slide";
  95                         gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
  96                         linux,input-type = <EV_SW>;
  97                         linux,code = <SW_KEYPAD_SLIDE>;
  98                         linux,can-disable;
  99                 };
 100
 101                 proximity_sensor {
 102                         label = "Proximity Sensor";
 103                         gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
 104                         linux,input-type = <EV_SW>;
 105                         linux,code = <SW_FRONT_PROXIMITY>;
 106                         linux,can-disable;
 107                 };
 108         };
 109
 110         isp1707: isp1707 {
 111                 compatible = "nxp,isp1707";
 112                 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
 113                 usb-phy = <&usb2_phy>;
 114         };
 115
 116         tv: connector {
 117                 compatible = "composite-video-connector";
 118                 label = "tv";
 119
 120                 port {
 121                         tv_connector_in: endpoint {
 122                                 remote-endpoint = <&venc_out>;
 123                         };
 124                 };
 125         };
 126
 127         sound: n900-audio {
 128                 compatible = "nokia,n900-audio";
 129
 130                 nokia,cpu-dai = <&mcbsp2>;
 131                 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
 132                 nokia,headphone-amplifier = <&tpa6130a2>;
 133
 134                 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
 135                 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
 136                 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
 137                 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
 138         };
 139
 140         battery: n900-battery {
 141                 compatible = "nokia,n900-battery";
 142                 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
 143                 io-channel-names = "temp", "bsi", "vbat";
 144         };
 145
 146         pwm9: dmtimer-pwm {
 147                 compatible = "ti,omap-dmtimer-pwm";
 148                 #pwm-cells = <3>;
 149                 ti,timers = <&timer9>;
 150                 ti,clock-source = <0x00>; /* timer_sys_ck */
 151         };
 152
 153         ir: n900-ir {
 154                 compatible = "nokia,n900-ir";
 155                 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
 156         };
 157
 158         rom_rng: rng {
 159                 compatible = "nokia,n900-rom-rng";
 160                 clocks = <&rng_ick>;
 161                 clock-names = "ick";
 162         };
 163
 164         /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
 165         vctcxo: vctcxo {
 166                 compatible = "fixed-clock";
 167                 #clock-cells = <0>;
 168                 clock-frequency = <38400000>;
 169         };
 170 };
 171
 172 &isp {
 173         vdds_csib-supply = <&vaux2>;
 174
 175         pinctrl-names = "default";
 176         pinctrl-0 = <&camera_pins>;
 177
 178         ports {
 179                 port@1 {
 180                         reg = <1>;
 181
 182                         csi_isp: endpoint {
 183                                 remote-endpoint = <&csi_cam1>;
 184                                 bus-type = <3>; /* CCP2 */
 185                                 clock-lanes = <1>;
 186                                 data-lanes = <0>;
 187                                 lane-polarity = <0 0>;
 188                                 /* Select strobe = <1> for back camera, <0> for front camera */
 189                                 strobe = <1>;
 190                         };
 191                 };
 192         };
 193 };
 194
 195 &omap3_pmx_core {
 196         pinctrl-names = "default";
 197
 198         uart2_pins: pinmux_uart2_pins {
 199                 pinctrl-single,pins = <
 200                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)         /* uart2_cts */
 201                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)               /* uart2_rts */
 202                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
 203                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
 204                 >;
 205         };
 206
 207         uart3_pins: pinmux_uart3_pins {
 208                 pinctrl-single,pins = <
 209                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)                /* uart3_rx */
 210                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx */
 211                 >;
 212         };
 213
 214         ethernet_pins: pinmux_ethernet_pins {
 215                 pinctrl-single,pins = <
 216                         OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4)       /* gpmc_ncs3.gpio_54 */
 217                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4)               /* dss_data16.gpio_86 */
 218                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
 219                 >;
 220         };
 221
 222         gpmc_pins: pinmux_gpmc_pins {
 223                 pinctrl-single,pins = <
 224
 225                         /* address lines */
 226                         OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
 227                         OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
 228                         OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
 229
 230                         /* data lines, gpmc_d0..d7 not muxable according to TRM */
 231                         OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
 232                         OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
 233                         OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
 234                         OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
 235                         OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
 236                         OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
 237                         OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
 238                         OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
 239
 240                         /*
 241                          * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
 242                          * according to TRM. OneNAND seems to require PIN_INPUT on clock.
 243                          */
 244                         OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
 245                         OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
 246                 >;
 247         };
 248
 249         i2c1_pins: pinmux_i2c1_pins {
 250                 pinctrl-single,pins = <
 251                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl */
 252                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda */
 253                 >;
 254         };
 255
 256         i2c2_pins: pinmux_i2c2_pins {
 257                 pinctrl-single,pins = <
 258                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)                /* i2c2_scl */
 259                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)                /* i2c2_sda */
 260                 >;
 261         };
 262
 263         i2c3_pins: pinmux_i2c3_pins {
 264                 pinctrl-single,pins = <
 265                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)                /* i2c3_scl */
 266                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)                /* i2c3_sda */
 267                 >;
 268         };
 269
 270         debug_leds: pinmux_debug_led_pins {
 271                 pinctrl-single,pins = <
 272                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
 273                 >;
 274         };
 275
 276         mcspi4_pins: pinmux_mcspi4_pins {
 277                 pinctrl-single,pins = <
 278                         OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
 279                         OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
 280                         OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
 281                         OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
 282                 >;
 283         };
 284
 285         mmc1_pins: pinmux_mmc1_pins {
 286                 pinctrl-single,pins = <
 287                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
 288                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
 289                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0 */
 290                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
 291                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
 292                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
 293                 >;
 294         };
 295
 296         mmc2_pins: pinmux_mmc2_pins {
 297                 pinctrl-single,pins = <
 298                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
 299                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
 300                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0 */
 301                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
 302                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
 303                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
 304                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
 305                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
 306                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
 307                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
 308                 >;
 309         };
 310
 311         acx565akm_pins: pinmux_acx565akm_pins {
 312                 pinctrl-single,pins = <
 313                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4)               /* RX51_LCD_RESET_GPIO */
 314                 >;
 315         };
 316
 317         dss_sdi_pins: pinmux_dss_sdi_pins {
 318                 pinctrl-single,pins = <
 319                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
 320                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
 321                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
 322                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
 323
 324                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
 325                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
 326                 >;
 327         };
 328
 329         wl1251_pins: pinmux_wl1251 {
 330                 pinctrl-single,pins = <
 331                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4)               /* gpio 87 => wl1251 enable */
 332                         OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4)                /* gpio 42 => wl1251 irq */
 333                 >;
 334         };
 335
 336         ssi_pins: pinmux_ssi {
 337                 pinctrl-single,pins = <
 338                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
 339                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)               /* ssi1_flag_tx */
 340                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4)                /* ssi1_wake_tx (cawake) */
 341                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)               /* ssi1_dat_tx */
 342                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)                /* ssi1_dat_rx */
 343                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)                /* ssi1_flag_rx */
 344                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)               /* ssi1_rdy_rx */
 345                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)               /* ssi1_wake */
 346                 >;
 347         };
 348
 349         modem_pins: pinmux_modem {
 350                 pinctrl-single,pins = <
 351                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4)               /* gpio 70 => cmt_apeslpx */
 352                         OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4)                /* gpio 72 => ape_rst_rq */
 353                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)               /* gpio 73 => cmt_rst_rq */
 354                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4)               /* gpio 74 => cmt_en */
 355                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4)               /* gpio 75 => cmt_rst */
 356                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)               /* gpio 157 => cmt_bsi */
 357                 >;
 358         };
 359
 360         camera_pins: pinmux_camera {
 361                 pinctrl-single,pins = <
 362                         OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7)       /* cam_hs */
 363                         OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7)       /* cam_vs */
 364                         OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0)       /* cam_xclka */
 365                         OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7)       /* cam_d4 */
 366                         OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0)        /* cam_d6 */
 367                         OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0)        /* cam_d7 */
 368                         OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0)        /* cam_d8 */
 369                         OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0)        /* cam_d9 */
 370                         OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7)       /* cam_d10 */
 371                         OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7)       /* cam_xclkb */
 372                         OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0)       /* cam_strobe */
 373                 >;
 374         };
 375 };
 376
 377 &i2c1 {
 378         pinctrl-names = "default";
 379         pinctrl-0 = <&i2c1_pins>;
 380
 381         clock-frequency = <2200000>;
 382
 383         twl: twl@48 {
 384                 reg = <0x48>;
 385                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 386                 interrupt-parent = <&intc>;
 387         };
 388 };
 389
 390 #include "twl4030.dtsi"
 391 #include "twl4030_omap3.dtsi"
 392
 393 &vaux1 {
 394         regulator-name = "V28";
 395         regulator-min-microvolt = <2800000>;
 396         regulator-max-microvolt = <2800000>;
 397         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 398         regulator-always-on; /* due to battery cover sensor */
 399 };
 400
 401 &vaux2 {
 402         regulator-name = "VCSI";
 403         regulator-min-microvolt = <1800000>;
 404         regulator-max-microvolt = <1800000>;
 405         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 406 };
 407
 408 &vaux3 {
 409         regulator-name = "VMMC2_30";
 410         regulator-min-microvolt = <2800000>;
 411         regulator-max-microvolt = <3000000>;
 412         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 413 };
 414
 415 &vaux4 {
 416         regulator-name = "VCAM_ANA_28";
 417         regulator-min-microvolt = <2800000>;
 418         regulator-max-microvolt = <2800000>;
 419         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 420 };
 421
 422 &vmmc1 {
 423         regulator-name = "VMMC1";
 424         regulator-min-microvolt = <1850000>;
 425         regulator-max-microvolt = <3150000>;
 426         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 427 };
 428
 429 &vmmc2 {
 430         regulator-name = "V28_A";
 431         regulator-min-microvolt = <2800000>;
 432         regulator-max-microvolt = <3000000>;
 433         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 434         regulator-always-on; /* due VIO leak to AIC34 VDDs */
 435 };
 436
 437 &vpll1 {
 438         regulator-name = "VPLL";
 439         regulator-min-microvolt = <1800000>;
 440         regulator-max-microvolt = <1800000>;
 441         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 442         regulator-always-on;
 443 };
 444
 445 &vpll2 {
 446         regulator-name = "VSDI_CSI";
 447         regulator-min-microvolt = <1800000>;
 448         regulator-max-microvolt = <1800000>;
 449         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 450         regulator-always-on;
 451 };
 452
 453 &vsim {
 454         regulator-name = "VMMC2_IO_18";
 455         regulator-min-microvolt = <1800000>;
 456         regulator-max-microvolt = <1800000>;
 457         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 458 };
 459
 460 &vio {
 461         regulator-name = "VIO";
 462         regulator-min-microvolt = <1800000>;
 463         regulator-max-microvolt = <1800000>;
 464 };
 465
 466 &vintana1 {
 467         regulator-name = "VINTANA1";
 468         /* fixed to 1500000 */
 469         regulator-always-on;
 470 };
 471
 472 &vintana2 {
 473         regulator-name = "VINTANA2";
 474         regulator-min-microvolt = <2750000>;
 475         regulator-max-microvolt = <2750000>;
 476         regulator-always-on;
 477 };
 478
 479 &vintdig {
 480         regulator-name = "VINTDIG";
 481         /* fixed to 1500000 */
 482         regulator-always-on;
 483 };
 484
 485 &twl {
 486         twl_audio: audio {
 487                 compatible = "ti,twl4030-audio";
 488                 ti,enable-vibra = <1>;
 489         };
 490
 491         twl_power: power {
 492                 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
 493                 ti,use_poweroff;
 494         };
 495 };
 496
 497 &twl_keypad {
 498         linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
 499                          MATRIX_KEY(0x00, 0x01, KEY_O)
 500                          MATRIX_KEY(0x00, 0x02, KEY_P)
 501                          MATRIX_KEY(0x00, 0x03, KEY_COMMA)
 502                          MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
 503                          MATRIX_KEY(0x00, 0x06, KEY_A)
 504                          MATRIX_KEY(0x00, 0x07, KEY_S)
 505
 506                          MATRIX_KEY(0x01, 0x00, KEY_W)
 507                          MATRIX_KEY(0x01, 0x01, KEY_D)
 508                          MATRIX_KEY(0x01, 0x02, KEY_F)
 509                          MATRIX_KEY(0x01, 0x03, KEY_G)
 510                          MATRIX_KEY(0x01, 0x04, KEY_H)
 511                          MATRIX_KEY(0x01, 0x05, KEY_J)
 512                          MATRIX_KEY(0x01, 0x06, KEY_K)
 513                          MATRIX_KEY(0x01, 0x07, KEY_L)
 514
 515                          MATRIX_KEY(0x02, 0x00, KEY_E)
 516                          MATRIX_KEY(0x02, 0x01, KEY_DOT)
 517                          MATRIX_KEY(0x02, 0x02, KEY_UP)
 518                          MATRIX_KEY(0x02, 0x03, KEY_ENTER)
 519                          MATRIX_KEY(0x02, 0x05, KEY_Z)
 520                          MATRIX_KEY(0x02, 0x06, KEY_X)
 521                          MATRIX_KEY(0x02, 0x07, KEY_C)
 522                          MATRIX_KEY(0x02, 0x08, KEY_F9)
 523
 524                          MATRIX_KEY(0x03, 0x00, KEY_R)
 525                          MATRIX_KEY(0x03, 0x01, KEY_V)
 526                          MATRIX_KEY(0x03, 0x02, KEY_B)
 527                          MATRIX_KEY(0x03, 0x03, KEY_N)
 528                          MATRIX_KEY(0x03, 0x04, KEY_M)
 529                          MATRIX_KEY(0x03, 0x05, KEY_SPACE)
 530                          MATRIX_KEY(0x03, 0x06, KEY_SPACE)
 531                          MATRIX_KEY(0x03, 0x07, KEY_LEFT)
 532
 533                          MATRIX_KEY(0x04, 0x00, KEY_T)
 534                          MATRIX_KEY(0x04, 0x01, KEY_DOWN)
 535                          MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
 536                          MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
 537                          MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
 538                          MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
 539                          MATRIX_KEY(0x04, 0x08, KEY_F10)
 540
 541                          MATRIX_KEY(0x05, 0x00, KEY_Y)
 542                          MATRIX_KEY(0x05, 0x08, KEY_F11)
 543
 544                          MATRIX_KEY(0x06, 0x00, KEY_U)
 545
 546                          MATRIX_KEY(0x07, 0x00, KEY_I)
 547                          MATRIX_KEY(0x07, 0x01, KEY_F7)
 548                          MATRIX_KEY(0x07, 0x02, KEY_F8)
 549                          >;
 550 };
 551
 552 &twl_gpio {
 553         ti,pullups      = <0x0>;
 554         ti,pulldowns    = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
 555 };
 556
 557 &i2c2 {
 558         pinctrl-names = "default";
 559         pinctrl-0 = <&i2c2_pins>;
 560
 561         clock-frequency = <100000>;
 562
 563         tlv320aic3x: tlv320aic3x@18 {
 564                 compatible = "ti,tlv320aic3x";
 565                 reg = <0x18>;
 566                 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
 567                 ai3x-gpio-func = <
 568                         0 /* AIC3X_GPIO1_FUNC_DISABLED */
 569                         5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
 570                 >;
 571
 572                 AVDD-supply = <&vmmc2>;
 573                 DRVDD-supply = <&vmmc2>;
 574                 IOVDD-supply = <&vio>;
 575                 DVDD-supply = <&vio>;
 576
 577                 ai3x-micbias-vg = <1>;
 578         };
 579
 580         tlv320aic3x_aux: tlv320aic3x@19 {
 581                 compatible = "ti,tlv320aic3x";
 582                 reg = <0x19>;
 583                 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
 584
 585                 AVDD-supply = <&vmmc2>;
 586                 DRVDD-supply = <&vmmc2>;
 587                 IOVDD-supply = <&vio>;
 588                 DVDD-supply = <&vio>;
 589
 590                 ai3x-micbias-vg = <2>;
 591         };
 592
 593         tsl2563: tsl2563@29 {
 594                 compatible = "amstaos,tsl2563";
 595                 reg = <0x29>;
 596
 597                 amstaos,cover-comp-gain = <16>;
 598         };
 599
 600         adp1653: led-controller@30 {
 601                 compatible = "adi,adp1653";
 602                 reg = <0x30>;
 603                 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
 604
 605                 flash {
 606                         flash-timeout-us = <500000>;
 607                         flash-max-microamp = <320000>;
 608                         led-max-microamp = <50000>;
 609                 };
 610                 indicator {
 611                         led-max-microamp = <17500>;
 612                 };
 613         };
 614
 615         lp5523: lp5523@32 {
 616                 compatible = "national,lp5523";
 617                 reg = <0x32>;
 618                 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
 619                 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
 620
 621                 chan0 {
 622                         chan-name = "lp5523:kb1";
 623                         led-cur = /bits/ 8 <50>;
 624                         max-cur = /bits/ 8 <100>;
 625                 };
 626
 627                 chan1 {
 628                         chan-name = "lp5523:kb2";
 629                         led-cur = /bits/ 8 <50>;
 630                         max-cur = /bits/ 8 <100>;
 631                 };
 632
 633                 chan2 {
 634                         chan-name = "lp5523:kb3";
 635                         led-cur = /bits/ 8 <50>;
 636                         max-cur = /bits/ 8 <100>;
 637                 };
 638
 639                 chan3 {
 640                         chan-name = "lp5523:kb4";
 641                         led-cur = /bits/ 8 <50>;
 642                         max-cur = /bits/ 8 <100>;
 643                 };
 644
 645                 chan4 {
 646                         chan-name = "lp5523:b";
 647                         led-cur = /bits/ 8 <50>;
 648                         max-cur = /bits/ 8 <100>;
 649                 };
 650
 651                 chan5 {
 652                         chan-name = "lp5523:g";
 653                         led-cur = /bits/ 8 <50>;
 654                         max-cur = /bits/ 8 <100>;
 655                 };
 656
 657                 chan6 {
 658                         chan-name = "lp5523:r";
 659                         led-cur = /bits/ 8 <50>;
 660                         max-cur = /bits/ 8 <100>;
 661                 };
 662
 663                 chan7 {
 664                         chan-name = "lp5523:kb5";
 665                         led-cur = /bits/ 8 <50>;
 666                         max-cur = /bits/ 8 <100>;
 667                 };
 668
 669                 chan8 {
 670                         chan-name = "lp5523:kb6";
 671                         led-cur = /bits/ 8 <50>;
 672                         max-cur = /bits/ 8 <100>;
 673                 };
 674         };
 675
 676         bq27200: bq27200@55 {
 677                 compatible = "ti,bq27200";
 678                 reg = <0x55>;
 679                 power-supplies = <&bq24150a>;
 680         };
 681
 682         /* Stereo headphone amplifier */
 683         tpa6130a2: tpa6130a2@60 {
 684                 compatible = "ti,tpa6130a2";
 685                 reg = <0x60>;
 686
 687                 Vdd-supply = <&vmmc2>;
 688
 689                 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
 690         };
 691
 692         si4713: si4713@63 {
 693                 compatible = "silabs,si4713";
 694                 reg = <0x63>;
 695
 696                 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
 697                 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
 698                 vio-supply = <&vio>;
 699                 vdd-supply = <&vaux1>;
 700         };
 701
 702         bq24150a: bq24150a@6b {
 703                 compatible = "ti,bq24150a";
 704                 reg = <0x6b>;
 705
 706                 ti,current-limit = <100>;
 707                 ti,weak-battery-voltage = <3400>;
 708                 ti,battery-regulation-voltage = <4200>;
 709                 ti,charge-current = <650>;
 710                 ti,termination-current = <100>;
 711                 ti,resistor-sense = <68>;
 712
 713                 ti,usb-charger-detection = <&isp1707>;
 714         };
 715 };
 716
 717 &i2c3 {
 718         pinctrl-names = "default";
 719         pinctrl-0 = <&i2c3_pins>;
 720
 721         clock-frequency = <400000>;
 722
 723         lis302dl: lis3lv02d@1d {
 724                 compatible = "st,lis3lv02d";
 725                 reg = <0x1d>;
 726
 727                 Vdd-supply = <&vaux1>;
 728                 Vdd_IO-supply = <&vio>;
 729
 730                 interrupt-parent = <&gpio6>;
 731                 interrupts = <21 20>; /* 181 and 180 */
 732
 733                 /* click flags */
 734                 st,click-single-x;
 735                 st,click-single-y;
 736                 st,click-single-z;
 737
 738                 /* Limits are 0.5g * value */
 739                 st,click-threshold-x = <8>;
 740                 st,click-threshold-y = <8>;
 741                 st,click-threshold-z = <10>;
 742
 743                 /* Click must be longer than time limit */
 744                 st,click-time-limit = <9>;
 745
 746                 /* Kind of debounce filter */
 747                 st,click-latency = <50>;
 748
 749                 /* Interrupt line 2 for click detection */
 750                 st,irq2-click;
 751
 752                 st,wakeup-x-hi;
 753                 st,wakeup-y-hi;
 754                 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
 755
 756                 st,wakeup2-z-hi;
 757                 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
 758
 759                 st,hipass1-disable;
 760                 st,hipass2-disable;
 761
 762                 st,axis-x = <1>;    /* LIS3_DEV_X */
 763                 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
 764                 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
 765
 766                 st,min-limit-x = <(-32)>;
 767                 st,min-limit-y = <3>;
 768                 st,min-limit-z = <3>;
 769
 770                 st,max-limit-x = <(-3)>;
 771                 st,max-limit-y = <32>;
 772                 st,max-limit-z = <32>;
 773         };
 774
 775         cam1: camera@3e {
 776                 compatible = "toshiba,et8ek8";
 777                 reg = <0x3e>;
 778
 779                 vana-supply = <&vaux4>;
 780
 781                 clocks = <&isp 0>;
 782                 clock-names = "extclk";
 783                 clock-frequency = <9600000>;
 784
 785                 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
 786
 787                 lens-focus = <&ad5820>;
 788
 789                 port {
 790                         csi_cam1: endpoint {
 791                                 bus-type = <3>; /* CCP2 */
 792                                 strobe = <1>;
 793                                 clock-inv = <0>;
 794                                 crc = <1>;
 795
 796                                 remote-endpoint = <&csi_isp>;
 797                         };
 798                 };
 799         };
 800
 801         /* D/A converter for auto-focus */
 802         ad5820: dac@c {
 803                 compatible = "adi,ad5820";
 804                 reg = <0x0c>;
 805
 806                 VANA-supply = <&vaux4>;
 807
 808                 #io-channel-cells = <0>;
 809         };
 810 };
 811
 812 &mmc1 {
 813         pinctrl-names = "default";
 814         pinctrl-0 = <&mmc1_pins>;
 815         vmmc-supply = <&vmmc1>;
 816         bus-width = <4>;
 817         /* For debugging, it is often good idea to remove this GPIO.
 818            It means you can remove back cover (to reboot by removing
 819            battery) and still use the MMC card. */
 820         cd-gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
 821 };
 822
 823 /* most boards use vaux3, only some old versions use vmmc2 instead */
 824 &mmc2 {
 825         pinctrl-names = "default";
 826         pinctrl-0 = <&mmc2_pins>;
 827         vmmc-supply = <&vaux3>;
 828         vqmmc-supply = <&vsim>;
 829         bus-width = <8>;
 830         non-removable;
 831         no-sdio;
 832         no-sd;
 833 };
 834
 835 &mmc3 {
 836         status = "disabled";
 837 };
 838
 839 &gpmc {
 840         ranges = <0 0 0x01000000 0x01000000>,   /* 16 MB for OneNAND */
 841                  <1 0 0x02000000 0x01000000>;   /* 16 MB for smc91c96 */
 842         pinctrl-names = "default";
 843         pinctrl-0 = <&gpmc_pins>;
 844
 845         /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
 846         onenand@0,0 {
 847                 #address-cells = <1>;
 848                 #size-cells = <1>;
 849                 compatible = "ti,omap2-onenand";
 850                 reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
 851
 852                 gpmc,sync-read;
 853                 gpmc,sync-write;
 854                 gpmc,burst-length = <16>;
 855                 gpmc,burst-read;
 856                 gpmc,burst-wrap;
 857                 gpmc,burst-write;
 858                 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
 859                 gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
 860                 gpmc,cs-on-ns = <0>;
 861                 gpmc,cs-rd-off-ns = <87>;
 862                 gpmc,cs-wr-off-ns = <87>;
 863                 gpmc,adv-on-ns = <0>;
 864                 gpmc,adv-rd-off-ns = <10>;
 865                 gpmc,adv-wr-off-ns = <10>;
 866                 gpmc,oe-on-ns = <15>;
 867                 gpmc,oe-off-ns = <87>;
 868                 gpmc,we-on-ns = <0>;
 869                 gpmc,we-off-ns = <87>;
 870                 gpmc,rd-cycle-ns = <112>;
 871                 gpmc,wr-cycle-ns = <112>;
 872                 gpmc,access-ns = <81>;
 873                 gpmc,page-burst-access-ns = <15>;
 874                 gpmc,bus-turnaround-ns = <0>;
 875                 gpmc,cycle2cycle-delay-ns = <0>;
 876                 gpmc,wait-monitoring-ns = <0>;
 877                 gpmc,clk-activation-ns = <5>;
 878                 gpmc,wr-data-mux-bus-ns = <30>;
 879                 gpmc,wr-access-ns = <81>;
 880                 gpmc,sync-clk-ps = <15000>;
 881
 882                 /*
 883                  * MTD partition table corresponding to Nokia's
 884                  * Maemo 5 (Fremantle) release.
 885                  */
 886                 partition@0 {
 887                         label = "bootloader";
 888                         reg = <0x00000000 0x00020000>;
 889                         read-only;
 890                 };
 891                 partition@1 {
 892                         label = "config";
 893                         reg = <0x00020000 0x00060000>;
 894                 };
 895                 partition@2 {
 896                         label = "log";
 897                         reg = <0x00080000 0x00040000>;
 898                 };
 899                 partition@3 {
 900                         label = "kernel";
 901                         reg = <0x000c0000 0x00200000>;
 902                 };
 903                 partition@4 {
 904                         label = "initfs";
 905                         reg = <0x002c0000 0x00200000>;
 906                 };
 907                 partition@5 {
 908                         label = "rootfs";
 909                         reg = <0x004c0000 0x0fb40000>;
 910                 };
 911         };
 912
 913         /* Ethernet is on some early development boards and qemu */
 914         ethernet@gpmc {
 915                 compatible = "smsc,lan91c94";
 916                 interrupt-parent = <&gpio2>;
 917                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;  /* gpio54 */
 918                 reg = <1 0 0xf>;                /* 16 byte IO range */
 919                 bank-width = <2>;
 920                 pinctrl-names = "default";
 921                 pinctrl-0 = <&ethernet_pins>;
 922                 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;     /* gpio86 */
 923                 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;      /* gpio164 */
 924                 gpmc,device-width = <2>;
 925                 gpmc,sync-clk-ps = <0>;
 926                 gpmc,cs-on-ns = <0>;
 927                 gpmc,cs-rd-off-ns = <48>;
 928                 gpmc,cs-wr-off-ns = <24>;
 929                 gpmc,adv-on-ns = <0>;
 930                 gpmc,adv-rd-off-ns = <0>;
 931                 gpmc,adv-wr-off-ns = <0>;
 932                 gpmc,we-on-ns = <12>;
 933                 gpmc,we-off-ns = <18>;
 934                 gpmc,oe-on-ns = <12>;
 935                 gpmc,oe-off-ns = <48>;
 936                 gpmc,page-burst-access-ns = <0>;
 937                 gpmc,access-ns = <42>;
 938                 gpmc,rd-cycle-ns = <180>;
 939                 gpmc,wr-cycle-ns = <180>;
 940                 gpmc,bus-turnaround-ns = <0>;
 941                 gpmc,cycle2cycle-delay-ns = <0>;
 942                 gpmc,wait-monitoring-ns = <0>;
 943                 gpmc,clk-activation-ns = <0>;
 944                 gpmc,wr-access-ns = <0>;
 945                 gpmc,wr-data-mux-bus-ns = <12>;
 946         };
 947 };
 948
 949 &mcspi1 {
 950         /*
 951          * For some reason, touchscreen is necessary for screen to work at
 952          * all on real hw. It works well without it on emulator.
 953          *
 954          * Also... order in the device tree actually matters here.
 955          */
 956         tsc2005@0 {
 957                 compatible = "ti,tsc2005";
 958                 spi-max-frequency = <6000000>;
 959                 reg = <0>;
 960
 961                 vio-supply = <&vio>;
 962
 963                 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
 964                 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
 965
 966                 touchscreen-fuzz-x = <4>;
 967                 touchscreen-fuzz-y = <7>;
 968                 touchscreen-fuzz-pressure = <2>;
 969                 touchscreen-size-x = <4096>;
 970                 touchscreen-size-y = <4096>;
 971                 touchscreen-max-pressure = <2048>;
 972
 973                 ti,x-plate-ohms = <280>;
 974                 ti,esd-recovery-timeout-ms = <8000>;
 975         };
 976
 977         lcd: acx565akm@2 {
 978                 compatible = "sony,acx565akm";
 979                 spi-max-frequency = <6000000>;
 980                 reg = <2>;
 981
 982                 pinctrl-names = "default";
 983                 pinctrl-0 = <&acx565akm_pins>;
 984
 985                 label = "lcd";
 986                 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
 987
 988                 port {
 989                         lcd_in: endpoint {
 990                                 remote-endpoint = <&sdi_out>;
 991                         };
 992                 };
 993         };
 994 };
 995
 996 &mcspi4 {
 997         pinctrl-names = "default";
 998         pinctrl-0 = <&mcspi4_pins>;
 999
1000         wl1251@0 {
1001                 pinctrl-names = "default";
1002                 pinctrl-0 = <&wl1251_pins>;
1003
1004                 vio-supply = <&vio>;
1005
1006                 compatible = "ti,wl1251";
1007                 reg = <0>;
1008                 spi-max-frequency = <48000000>;
1009
1010                 spi-cpol;
1011                 spi-cpha;
1012
1013                 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
1014
1015                 interrupt-parent = <&gpio2>;
1016                 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
1017
1018                 clocks = <&vctcxo>;
1019         };
1020 };
1021
1022 /* RNG not directly accessible on n900, see omap3-rom-rng instead */
1023 &rng_target {
1024         status = "disabled";
1025 };
1026
1027 &usb_otg_hs {
1028         interface-type = <0>;
1029         usb-phy = <&usb2_phy>;
1030         phys = <&usb2_phy>;
1031         phy-names = "usb2-phy";
1032         mode = <2>;
1033         power = <50>;
1034 };
1035
1036 &uart1 {
1037         status = "disabled";
1038 };
1039
1040 &uart2 {
1041         pinctrl-names = "default";
1042         pinctrl-0 = <&uart2_pins>;
1043
1044         bcm2048: bluetooth {
1045                 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
1046                 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
1047                 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
1048                 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
1049                 clocks = <&vctcxo>;
1050                 clock-names = "sysclk";
1051         };
1052 };
1053
1054 &uart3 {
1055         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
1056         pinctrl-names = "default";
1057         pinctrl-0 = <&uart3_pins>;
1058 };
1059
1060 &dss {
1061         status = "ok";
1062
1063         pinctrl-names = "default";
1064         pinctrl-0 = <&dss_sdi_pins>;
1065
1066         vdds_sdi-supply = <&vaux1>;
1067
1068         ports {
1069                 #address-cells = <1>;
1070                 #size-cells = <0>;
1071
1072                 port@1 {
1073                         reg = <1>;
1074
1075                         sdi_out: endpoint {
1076                                 remote-endpoint = <&lcd_in>;
1077                                 datapairs = <2>;
1078                         };
1079                 };
1080         };
1081 };
1082
1083 &venc {
1084         status = "ok";
1085
1086         vdda-supply = <&vdac>;
1087
1088         port {
1089                 venc_out: endpoint {
1090                         remote-endpoint = <&tv_connector_in>;
1091                         ti,channels = <1>;
1092                 };
1093         };
1094 };
1095
1096 &mcbsp2 {
1097         status = "ok";
1098 };
1099
1100 &ssi_port1 {
1101         pinctrl-names = "default";
1102         pinctrl-0 = <&ssi_pins>;
1103
1104         ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1105
1106         modem: hsi-client {
1107                 compatible = "nokia,n900-modem";
1108
1109                 pinctrl-names = "default";
1110                 pinctrl-0 = <&modem_pins>;
1111
1112                 hsi-channel-ids = <0>, <1>, <2>, <3>;
1113                 hsi-channel-names = "mcsaab-control",
1114                                     "speech-control",
1115                                     "speech-data",
1116                                     "mcsaab-data";
1117                 hsi-speed-kbps = <55000>;
1118                 hsi-mode = "frame";
1119                 hsi-flow = "synchronized";
1120                 hsi-arb-mode = "round-robin";
1121
1122                 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1123
1124                 gpios = <&gpio3  6 GPIO_ACTIVE_HIGH>, /* 70 */
1125                         <&gpio3  9 GPIO_ACTIVE_HIGH>, /* 73 */
1126                         <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1127                         <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1128                         <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1129                 gpio-names = "cmt_apeslpx",
1130                              "cmt_rst_rq",
1131                              "cmt_en",
1132                              "cmt_rst",
1133                              "cmt_bsi";
1134         };
1135 };
1136
1137 &ssi_port2 {
1138         status = "disabled";
1139 };