src/arm/omap4-l4.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 &l4_cfg {                                               /* 0x4a000000 */
   3         compatible = "ti,omap4-l4-cfg", "simple-bus";
   4         reg = <0x4a000000 0x800>,
   5               <0x4a000800 0x800>,
   6               <0x4a001000 0x1000>;
   7         reg-names = "ap", "la", "ia0";
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
  11                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
  12                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
  13                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
  14                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
  15                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
  16                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
  17
  18         segment@0 {                                     /* 0x4a000000 */
  19                 compatible = "simple-bus";
  20                 #address-cells = <1>;
  21                 #size-cells = <1>;
  22                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  23                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
  24                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
  25                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
  26                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
  27                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
  28                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
  29                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
  30                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
  31                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
  32                          <0x00058000 0x00058000 0x004000>,      /* ap 10 */
  33                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
  34                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
  35                          <0x00008000 0x00008000 0x002000>,      /* ap 23 */
  36                          <0x0000a000 0x0000a000 0x001000>,      /* ap 24 */
  37                          <0x00066000 0x00066000 0x001000>,      /* ap 25 */
  38                          <0x00067000 0x00067000 0x001000>,      /* ap 26 */
  39                          <0x0005e000 0x0005e000 0x002000>,      /* ap 80 */
  40                          <0x00060000 0x00060000 0x001000>,      /* ap 81 */
  41                          <0x00064000 0x00064000 0x001000>,      /* ap 86 */
  42                          <0x00065000 0x00065000 0x001000>;      /* ap 87 */
  43
  44                 target-module@2000 {                    /* 0x4a002000, ap 3 06.0 */
  45                         compatible = "ti,sysc-omap4", "ti,sysc";
  46                         ti,hwmods = "ctrl_module_core";
  47                         reg = <0x2000 0x4>,
  48                               <0x2010 0x4>;
  49                         reg-names = "rev", "sysc";
  50                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
  51                                         <SYSC_IDLE_NO>,
  52                                         <SYSC_IDLE_SMART>,
  53                                         <SYSC_IDLE_SMART_WKUP>;
  54                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57                         ranges = <0x0 0x2000 0x1000>;
  58
  59                         omap4_scm_core: scm@0 {
  60                                 compatible = "ti,omap4-scm-core", "simple-bus";
  61                                 reg = <0x0 0x1000>;
  62                                 #address-cells = <1>;
  63                                 #size-cells = <1>;
  64                                 ranges = <0 0 0x1000>;
  65
  66                                 scm_conf: scm_conf@0 {
  67                                         compatible = "syscon";
  68                                         reg = <0x0 0x800>;
  69                                         #address-cells = <1>;
  70                                         #size-cells = <1>;
  71                                 };
  72
  73                                 omap_control_usb2phy: control-phy@300 {
  74                                         compatible = "ti,control-phy-usb2";
  75                                         reg = <0x300 0x4>;
  76                                         reg-names = "power";
  77                                 };
  78
  79                                 omap_control_usbotg: control-phy@33c {
  80                                         compatible = "ti,control-phy-otghs";
  81                                         reg = <0x33c 0x4>;
  82                                         reg-names = "otghs_control";
  83                                 };
  84                         };
  85                 };
  86
  87                 target-module@4000 {                    /* 0x4a004000, ap 5 02.0 */
  88                         compatible = "ti,sysc-omap4", "ti,sysc";
  89                         reg = <0x4000 0x4>;
  90                         reg-names = "rev";
  91                         #address-cells = <1>;
  92                         #size-cells = <1>;
  93                         ranges = <0x0 0x4000 0x1000>;
  94
  95                         cm1: cm1@0 {
  96                                 compatible = "ti,omap4-cm1", "simple-bus";
  97                                 reg = <0x0 0x2000>;
  98                                 #address-cells = <1>;
  99                                 #size-cells = <1>;
 100                                 ranges = <0 0 0x2000>;
 101
 102                                 cm1_clocks: clocks {
 103                                         #address-cells = <1>;
 104                                         #size-cells = <0>;
 105                                 };
 106
 107                                 cm1_clockdomains: clockdomains {
 108                                 };
 109                         };
 110                 };
 111
 112                 target-module@8000 {                    /* 0x4a008000, ap 23 32.0 */
 113                         compatible = "ti,sysc-omap4", "ti,sysc";
 114                         reg = <0x8000 0x4>;
 115                         reg-names = "rev";
 116                         #address-cells = <1>;
 117                         #size-cells = <1>;
 118                         ranges = <0x0 0x8000 0x2000>;
 119
 120                         cm2: cm2@0 {
 121                                 compatible = "ti,omap4-cm2", "simple-bus";
 122                                 reg = <0x0 0x2000>;
 123                                 #address-cells = <1>;
 124                                 #size-cells = <1>;
 125                                 ranges = <0 0 0x2000>;
 126
 127                                 cm2_clocks: clocks {
 128                                         #address-cells = <1>;
 129                                         #size-cells = <0>;
 130                                 };
 131
 132                                 cm2_clockdomains: clockdomains {
 133                                 };
 134                         };
 135                 };
 136
 137                 target-module@56000 {                   /* 0x4a056000, ap 7 0a.0 */
 138                         compatible = "ti,sysc-omap2", "ti,sysc";
 139                         reg = <0x56000 0x4>,
 140                               <0x5602c 0x4>,
 141                               <0x56028 0x4>;
 142                         reg-names = "rev", "sysc", "syss";
 143                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 144                                          SYSC_OMAP2_EMUFREE |
 145                                          SYSC_OMAP2_SOFTRESET |
 146                                          SYSC_OMAP2_AUTOIDLE)>;
 147                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 148                                         <SYSC_IDLE_NO>,
 149                                         <SYSC_IDLE_SMART>;
 150                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 151                                         <SYSC_IDLE_NO>,
 152                                         <SYSC_IDLE_SMART>;
 153                         ti,syss-mask = <1>;
 154                         /* Domains (V, P, C): core, core_pwrdm, l3_dma_clkdm */
 155                         clocks = <&l3_dma_clkctrl OMAP4_DMA_SYSTEM_CLKCTRL 0>;
 156                         clock-names = "fck";
 157                         #address-cells = <1>;
 158                         #size-cells = <1>;
 159                         ranges = <0x0 0x56000 0x1000>;
 160
 161                         sdma: dma-controller@0 {
 162                                 compatible = "ti,omap4430-sdma", "ti,omap-sdma";
 163                                 reg = <0x0 0x1000>;
 164                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 165                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 166                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 167                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 168                                 #dma-cells = <1>;
 169                                 dma-channels = <32>;
 170                                 dma-requests = <127>;
 171                         };
 172                 };
 173
 174                 target-module@58000 {                   /* 0x4a058000, ap 10 0e.0 */
 175                         compatible = "ti,sysc-omap2", "ti,sysc";
 176                         reg = <0x58000 0x4>,
 177                               <0x58010 0x4>,
 178                               <0x58014 0x4>;
 179                         reg-names = "rev", "sysc", "syss";
 180                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
 181                                          SYSC_OMAP2_SOFTRESET |
 182                                          SYSC_OMAP2_AUTOIDLE)>;
 183                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 184                                         <SYSC_IDLE_NO>,
 185                                         <SYSC_IDLE_SMART>,
 186                                         <SYSC_IDLE_SMART_WKUP>;
 187                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 188                                         <SYSC_IDLE_NO>,
 189                                         <SYSC_IDLE_SMART>,
 190                                         <SYSC_IDLE_SMART_WKUP>;
 191                         ti,syss-mask = <1>;
 192                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 193                         clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 194                         clock-names = "fck";
 195                         #address-cells = <1>;
 196                         #size-cells = <1>;
 197                         ranges = <0x0 0x58000 0x5000>;
 198
 199                         hsi: hsi@0 {
 200                                 compatible = "ti,omap4-hsi";
 201                                 reg = <0x0 0x4000>,
 202                                       <0x5000 0x1000>;
 203                                 reg-names = "sys", "gdd";
 204
 205                                 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 206                                 clock-names = "hsi_fck";
 207
 208                                 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 209                                 interrupt-names = "gdd_mpu";
 210
 211                                 #address-cells = <1>;
 212                                 #size-cells = <1>;
 213                                 ranges = <0 0 0x4000>;
 214
 215                                 hsi_port1: hsi-port@2000 {
 216                                         compatible = "ti,omap4-hsi-port";
 217                                         reg = <0x2000 0x800>,
 218                                               <0x2800 0x800>;
 219                                         reg-names = "tx", "rx";
 220                                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 221                                 };
 222
 223                                 hsi_port2: hsi-port@3000 {
 224                                         compatible = "ti,omap4-hsi-port";
 225                                         reg = <0x3000 0x800>,
 226                                               <0x3800 0x800>;
 227                                         reg-names = "tx", "rx";
 228                                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 229                                 };
 230                         };
 231                 };
 232
 233                 target-module@5e000 {                   /* 0x4a05e000, ap 80 68.0 */
 234                         compatible = "ti,sysc";
 235                         status = "disabled";
 236                         #address-cells = <1>;
 237                         #size-cells = <1>;
 238                         ranges = <0x0 0x5e000 0x2000>;
 239                 };
 240
 241                 target-module@62000 {                   /* 0x4a062000, ap 11 16.0 */
 242                         compatible = "ti,sysc-omap2", "ti,sysc";
 243                         ti,hwmods = "usb_tll_hs";
 244                         reg = <0x62000 0x4>,
 245                               <0x62010 0x4>,
 246                               <0x62014 0x4>;
 247                         reg-names = "rev", "sysc", "syss";
 248                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 249                                          SYSC_OMAP2_ENAWAKEUP |
 250                                          SYSC_OMAP2_SOFTRESET |
 251                                          SYSC_OMAP2_AUTOIDLE)>;
 252                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 253                                         <SYSC_IDLE_NO>,
 254                                         <SYSC_IDLE_SMART>;
 255                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 256                         clocks = <&l3_init_clkctrl OMAP4_USB_TLL_HS_CLKCTRL 0>;
 257                         clock-names = "fck";
 258                         #address-cells = <1>;
 259                         #size-cells = <1>;
 260                         ranges = <0x0 0x62000 0x1000>;
 261
 262                         usbhstll: usbhstll@0 {
 263                                 compatible = "ti,usbhs-tll";
 264                                 reg = <0x0 0x1000>;
 265                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 266                         };
 267                 };
 268
 269                 target-module@64000 {                   /* 0x4a064000, ap 86 1e.0 */
 270                         compatible = "ti,sysc-omap4", "ti,sysc";
 271                         ti,hwmods = "usb_host_hs";
 272                         reg = <0x64000 0x4>,
 273                               <0x64010 0x4>,
 274                               <0x64014 0x4>;
 275                         reg-names = "rev", "sysc", "syss";
 276                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 277                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 278                                         <SYSC_IDLE_NO>,
 279                                         <SYSC_IDLE_SMART>,
 280                                         <SYSC_IDLE_SMART_WKUP>;
 281                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 282                                         <SYSC_IDLE_NO>,
 283                                         <SYSC_IDLE_SMART>,
 284                                         <SYSC_IDLE_SMART_WKUP>;
 285                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 286                         clocks = <&l3_init_clkctrl OMAP4_USB_HOST_HS_CLKCTRL 0>;
 287                         clock-names = "fck";
 288                         #address-cells = <1>;
 289                         #size-cells = <1>;
 290                         ranges = <0x0 0x64000 0x1000>;
 291
 292                         usbhshost: usbhshost@0 {
 293                                 compatible = "ti,usbhs-host";
 294                                 reg = <0x0 0x800>;
 295                                 #address-cells = <1>;
 296                                 #size-cells = <1>;
 297                                 ranges = <0 0 0x1000>;
 298                                 clocks = <&init_60m_fclk>,
 299                                          <&xclk60mhsp1_ck>,
 300                                          <&xclk60mhsp2_ck>;
 301                                 clock-names = "refclk_60m_int",
 302                                               "refclk_60m_ext_p1",
 303                                               "refclk_60m_ext_p2";
 304
 305                                 usbhsohci: ohci@800 {
 306                                         compatible = "ti,ohci-omap3";
 307                                         reg = <0x800 0x400>;
 308                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 309                                         remote-wakeup-connected;
 310                                 };
 311
 312                                 usbhsehci: ehci@c00 {
 313                                         compatible = "ti,ehci-omap";
 314                                         reg = <0xc00 0x400>;
 315                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 316                                 };
 317                         };
 318                 };
 319
 320                 target-module@66000 {                   /* 0x4a066000, ap 25 26.0 */
 321                         compatible = "ti,sysc-omap2", "ti,sysc";
 322                         reg = <0x66000 0x4>,
 323                               <0x66010 0x4>,
 324                               <0x66014 0x4>;
 325                         reg-names = "rev", "sysc", "syss";
 326                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 327                                          SYSC_OMAP2_SOFTRESET |
 328                                          SYSC_OMAP2_AUTOIDLE)>;
 329                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 330                                         <SYSC_IDLE_NO>,
 331                                         <SYSC_IDLE_SMART>;
 332                         /* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */
 333                         clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
 334                         clock-names = "fck";
 335                         resets = <&prm_tesla 1>;
 336                         reset-names = "rstctrl";
 337                         #address-cells = <1>;
 338                         #size-cells = <1>;
 339                         ranges = <0x0 0x66000 0x1000>;
 340
 341                         mmu_dsp: mmu@0 {
 342                                 compatible = "ti,omap4-iommu";
 343                                 reg = <0x0 0x100>;
 344                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 345                                 #iommu-cells = <0>;
 346                         };
 347                 };
 348         };
 349
 350         segment@80000 {                                 /* 0x4a080000 */
 351                 compatible = "simple-bus";
 352                 #address-cells = <1>;
 353                 #size-cells = <1>;
 354                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
 355                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
 356                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
 357                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
 358                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
 359                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
 360                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
 361                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
 362                          <0x00074000 0x000f4000 0x001000>,      /* ap 27 */
 363                          <0x00075000 0x000f5000 0x001000>,      /* ap 28 */
 364                          <0x00076000 0x000f6000 0x001000>,      /* ap 29 */
 365                          <0x00077000 0x000f7000 0x001000>,      /* ap 30 */
 366                          <0x00036000 0x000b6000 0x001000>,      /* ap 69 */
 367                          <0x00037000 0x000b7000 0x001000>,      /* ap 70 */
 368                          <0x0004d000 0x000cd000 0x001000>,      /* ap 78 */
 369                          <0x0004e000 0x000ce000 0x001000>,      /* ap 79 */
 370                          <0x00029000 0x000a9000 0x001000>,      /* ap 82 */
 371                          <0x0002a000 0x000aa000 0x001000>,      /* ap 83 */
 372                          <0x0002b000 0x000ab000 0x001000>,      /* ap 84 */
 373                          <0x0002c000 0x000ac000 0x001000>,      /* ap 85 */
 374                          <0x0002d000 0x000ad000 0x001000>,      /* ap 88 */
 375                          <0x0002e000 0x000ae000 0x001000>;      /* ap 89 */
 376
 377                 target-module@29000 {                   /* 0x4a0a9000, ap 82 04.0 */
 378                         compatible = "ti,sysc";
 379                         status = "disabled";
 380                         #address-cells = <1>;
 381                         #size-cells = <1>;
 382                         ranges = <0x0 0x29000 0x1000>;
 383                 };
 384
 385                 target-module@2b000 {                   /* 0x4a0ab000, ap 84 12.0 */
 386                         compatible = "ti,sysc-omap2", "ti,sysc";
 387                         reg = <0x2b400 0x4>,
 388                               <0x2b404 0x4>,
 389                               <0x2b408 0x4>;
 390                         reg-names = "rev", "sysc", "syss";
 391                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 392                                          SYSC_OMAP2_SOFTRESET |
 393                                          SYSC_OMAP2_AUTOIDLE)>;
 394                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 395                                         <SYSC_IDLE_NO>,
 396                                         <SYSC_IDLE_SMART>;
 397                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 398                                         <SYSC_IDLE_NO>,
 399                                         <SYSC_IDLE_SMART>,
 400                                         <SYSC_IDLE_SMART_WKUP>;
 401                         ti,syss-mask = <1>;
 402                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 403                         clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
 404                         clock-names = "fck";
 405                         #address-cells = <1>;
 406                         #size-cells = <1>;
 407                         ranges = <0x0 0x2b000 0x1000>;
 408
 409                         usb_otg_hs: usb_otg_hs@0 {
 410                                 compatible = "ti,omap4-musb";
 411                                 reg = <0x0 0x7ff>;
 412                                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 413                                 interrupt-names = "mc", "dma";
 414                                 usb-phy = <&usb2_phy>;
 415                                 phys = <&usb2_phy>;
 416                                 phy-names = "usb2-phy";
 417                                 multipoint = <1>;
 418                                 num-eps = <16>;
 419                                 ram-bits = <12>;
 420                                 ctrl-module = <&omap_control_usbotg>;
 421                         };
 422                 };
 423
 424                 target-module@2d000 {                   /* 0x4a0ad000, ap 88 0c.0 */
 425                         compatible = "ti,sysc-omap2", "ti,sysc";
 426                         reg = <0x2d000 0x4>,
 427                               <0x2d010 0x4>,
 428                               <0x2d014 0x4>;
 429                         reg-names = "rev", "sysc", "syss";
 430                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 431                                          SYSC_OMAP2_AUTOIDLE)>;
 432                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 433                                         <SYSC_IDLE_NO>,
 434                                         <SYSC_IDLE_SMART>;
 435                         ti,syss-mask = <1>;
 436                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 437                         clocks = <&l3_init_clkctrl OMAP4_OCP2SCP_USB_PHY_CLKCTRL 0>;
 438                         clock-names = "fck";
 439                         #address-cells = <1>;
 440                         #size-cells = <1>;
 441                         ranges = <0x0 0x2d000 0x1000>;
 442
 443                         ocp2scp@0 {
 444                                 compatible = "ti,omap-ocp2scp";
 445                                 reg = <0x0 0x1f>;
 446                                 #address-cells = <1>;
 447                                 #size-cells = <1>;
 448                                 ranges = <0 0 0x1000>;
 449                                 usb2_phy: usb2phy@80 {
 450                                         compatible = "ti,omap-usb2";
 451                                         reg = <0x80 0x58>;
 452                                         ctrl-module = <&omap_control_usb2phy>;
 453                                         clocks = <&usb_phy_cm_clk32k>;
 454                                         clock-names = "wkupclk";
 455                                         #phy-cells = <0>;
 456                                 };
 457                         };
 458                 };
 459
 460                 /* d2d mdm */
 461                 target-module@36000 {                   /* 0x4a0b6000, ap 69 60.0 */
 462                         compatible = "ti,sysc-omap2", "ti,sysc";
 463                         reg = <0x36000 0x4>,
 464                               <0x36010 0x4>,
 465                               <0x36014 0x4>;
 466                         reg-names = "rev", "sysc", "syss";
 467                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 468                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 469                                         <SYSC_IDLE_NO>,
 470                                         <SYSC_IDLE_SMART>,
 471                                         <SYSC_IDLE_SMART_WKUP>;
 472                         ti,syss-mask = <1>;
 473                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 474                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 475                         clock-names = "fck";
 476                         #address-cells = <1>;
 477                         #size-cells = <1>;
 478                         ranges = <0x0 0x36000 0x1000>;
 479                 };
 480
 481                 /* d2d mpu */
 482                 target-module@4d000 {                   /* 0x4a0cd000, ap 78 58.0 */
 483                         compatible = "ti,sysc-omap2", "ti,sysc";
 484                         reg = <0x4d000 0x4>,
 485                               <0x4d010 0x4>,
 486                               <0x4d014 0x4>;
 487                         reg-names = "rev", "sysc", "syss";
 488                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 489                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 490                                         <SYSC_IDLE_NO>,
 491                                         <SYSC_IDLE_SMART>,
 492                                         <SYSC_IDLE_SMART_WKUP>;
 493                         ti,syss-mask = <1>;
 494                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 495                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 496                         clock-names = "fck";
 497                         #address-cells = <1>;
 498                         #size-cells = <1>;
 499                         ranges = <0x0 0x4d000 0x1000>;
 500                 };
 501
 502                 target-module@59000 {                   /* 0x4a0d9000, ap 13 1a.0 */
 503                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 504                         reg = <0x59038 0x4>;
 505                         reg-names = "sysc";
 506                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 507                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 508                                         <SYSC_IDLE_NO>,
 509                                         <SYSC_IDLE_SMART>,
 510                                         <SYSC_IDLE_SMART_WKUP>;
 511                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 512                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
 513                         clock-names = "fck";
 514                         #address-cells = <1>;
 515                         #size-cells = <1>;
 516                         ranges = <0x0 0x59000 0x1000>;
 517
 518                         smartreflex_mpu: smartreflex@0 {
 519                                 compatible = "ti,omap4-smartreflex-mpu";
 520                                 reg = <0x0 0x80>;
 521                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 522                         };
 523                 };
 524
 525                 target-module@5b000 {                   /* 0x4a0db000, ap 15 08.0 */
 526                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 527                         reg = <0x5b038 0x4>;
 528                         reg-names = "sysc";
 529                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 530                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 531                                         <SYSC_IDLE_NO>,
 532                                         <SYSC_IDLE_SMART>,
 533                                         <SYSC_IDLE_SMART_WKUP>;
 534                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 535                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
 536                         clock-names = "fck";
 537                         #address-cells = <1>;
 538                         #size-cells = <1>;
 539                         ranges = <0x0 0x5b000 0x1000>;
 540
 541                         smartreflex_iva: smartreflex@0 {
 542                                 compatible = "ti,omap4-smartreflex-iva";
 543                                 reg = <0x0 0x80>;
 544                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 545                         };
 546                 };
 547
 548                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 22.0 */
 549                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 550                         reg = <0x5d038 0x4>;
 551                         reg-names = "sysc";
 552                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 553                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 554                                         <SYSC_IDLE_NO>,
 555                                         <SYSC_IDLE_SMART>,
 556                                         <SYSC_IDLE_SMART_WKUP>;
 557                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 558                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
 559                         clock-names = "fck";
 560                         #address-cells = <1>;
 561                         #size-cells = <1>;
 562                         ranges = <0x0 0x5d000 0x1000>;
 563
 564                         smartreflex_core: smartreflex@0 {
 565                                 compatible = "ti,omap4-smartreflex-core";
 566                                 reg = <0x0 0x80>;
 567                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 568                         };
 569                 };
 570
 571                 target-module@60000 {                   /* 0x4a0e0000, ap 19 1c.0 */
 572                         compatible = "ti,sysc";
 573                         status = "disabled";
 574                         #address-cells = <1>;
 575                         #size-cells = <1>;
 576                         ranges = <0x0 0x60000 0x1000>;
 577                 };
 578
 579                 target-module@74000 {                   /* 0x4a0f4000, ap 27 24.0 */
 580                         compatible = "ti,sysc-omap4", "ti,sysc";
 581                         reg = <0x74000 0x4>,
 582                               <0x74010 0x4>;
 583                         reg-names = "rev", "sysc";
 584                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 585                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 586                                         <SYSC_IDLE_NO>,
 587                                         <SYSC_IDLE_SMART>;
 588                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 589                         clocks = <&l4_cfg_clkctrl OMAP4_MAILBOX_CLKCTRL 0>;
 590                         clock-names = "fck";
 591                         #address-cells = <1>;
 592                         #size-cells = <1>;
 593                         ranges = <0x0 0x74000 0x1000>;
 594
 595                         mailbox: mailbox@0 {
 596                                 compatible = "ti,omap4-mailbox";
 597                                 reg = <0x0 0x200>;
 598                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 599                                 #mbox-cells = <1>;
 600                                 ti,mbox-num-users = <3>;
 601                                 ti,mbox-num-fifos = <8>;
 602                                 mbox_ipu: mbox_ipu {
 603                                         ti,mbox-tx = <0 0 0>;
 604                                         ti,mbox-rx = <1 0 0>;
 605                                 };
 606                                 mbox_dsp: mbox_dsp {
 607                                         ti,mbox-tx = <3 0 0>;
 608                                         ti,mbox-rx = <2 0 0>;
 609                                 };
 610                         };
 611                 };
 612
 613                 target-module@76000 {                   /* 0x4a0f6000, ap 29 3a.0 */
 614                         compatible = "ti,sysc-omap2", "ti,sysc";
 615                         reg = <0x76000 0x4>,
 616                               <0x76010 0x4>,
 617                               <0x76014 0x4>;
 618                         reg-names = "rev", "sysc", "syss";
 619                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 620                                          SYSC_OMAP2_ENAWAKEUP |
 621                                          SYSC_OMAP2_SOFTRESET |
 622                                          SYSC_OMAP2_AUTOIDLE)>;
 623                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 624                                         <SYSC_IDLE_NO>,
 625                                         <SYSC_IDLE_SMART>;
 626                         ti,syss-mask = <1>;
 627                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 628                         clocks = <&l4_cfg_clkctrl OMAP4_SPINLOCK_CLKCTRL 0>;
 629                         clock-names = "fck";
 630                         #address-cells = <1>;
 631                         #size-cells = <1>;
 632                         ranges = <0x0 0x76000 0x1000>;
 633
 634                         hwspinlock: spinlock@0 {
 635                                 compatible = "ti,omap4-hwspinlock";
 636                                 reg = <0x0 0x1000>;
 637                                 #hwlock-cells = <1>;
 638                         };
 639                 };
 640         };
 641
 642         segment@100000 {                                        /* 0x4a100000 */
 643                 compatible = "simple-bus";
 644                 #address-cells = <1>;
 645                 #size-cells = <1>;
 646                 ranges = <0x00000000 0x00100000 0x001000>,      /* ap 21 */
 647                          <0x00001000 0x00101000 0x001000>,      /* ap 22 */
 648                          <0x00002000 0x00102000 0x001000>,      /* ap 61 */
 649                          <0x00003000 0x00103000 0x001000>,      /* ap 62 */
 650                          <0x00008000 0x00108000 0x001000>,      /* ap 63 */
 651                          <0x00009000 0x00109000 0x001000>,      /* ap 64 */
 652                          <0x0000a000 0x0010a000 0x001000>,      /* ap 65 */
 653                          <0x0000b000 0x0010b000 0x001000>;      /* ap 66 */
 654
 655                 target-module@0 {                       /* 0x4a100000, ap 21 2a.0 */
 656                         compatible = "ti,sysc-omap4", "ti,sysc";
 657                         ti,hwmods = "ctrl_module_pad_core";
 658                         reg = <0x0 0x4>,
 659                               <0x10 0x4>;
 660                         reg-names = "rev", "sysc";
 661                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 662                                         <SYSC_IDLE_NO>,
 663                                         <SYSC_IDLE_SMART>,
 664                                         <SYSC_IDLE_SMART_WKUP>;
 665                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 666                         #address-cells = <1>;
 667                         #size-cells = <1>;
 668                         ranges = <0x0 0x0 0x1000>;
 669
 670                         omap4_pmx_core: pinmux@40 {
 671                                 compatible = "ti,omap4-padconf",
 672                                              "pinctrl-single";
 673                                 reg = <0x40 0x0196>;
 674                                 #address-cells = <1>;
 675                                 #size-cells = <0>;
 676                                 #pinctrl-cells = <1>;
 677                                 #interrupt-cells = <1>;
 678                                 interrupt-controller;
 679                                 pinctrl-single,register-width = <16>;
 680                                 pinctrl-single,function-mask = <0x7fff>;
 681                         };
 682
 683                         omap4_padconf_global: omap4_padconf_global@5a0 {
 684                                 compatible = "syscon",
 685                                              "simple-bus";
 686                                 reg = <0x5a0 0x170>;
 687                                 #address-cells = <1>;
 688                                 #size-cells = <1>;
 689                                 ranges = <0 0x5a0 0x170>;
 690
 691                                 pbias_regulator: pbias_regulator@60 {
 692                                         compatible = "ti,pbias-omap4", "ti,pbias-omap";
 693                                         reg = <0x60 0x4>;
 694                                         syscon = <&omap4_padconf_global>;
 695                                         pbias_mmc_reg: pbias_mmc_omap4 {
 696                                                 regulator-name = "pbias_mmc_omap4";
 697                                                 regulator-min-microvolt = <1800000>;
 698                                                 regulator-max-microvolt = <3000000>;
 699                                         };
 700                                 };
 701                         };
 702                 };
 703
 704                 target-module@2000 {                    /* 0x4a102000, ap 61 3c.0 */
 705                         compatible = "ti,sysc";
 706                         status = "disabled";
 707                         #address-cells = <1>;
 708                         #size-cells = <1>;
 709                         ranges = <0x0 0x2000 0x1000>;
 710                 };
 711
 712                 target-module@8000 {                    /* 0x4a108000, ap 63 62.0 */
 713                         compatible = "ti,sysc";
 714                         status = "disabled";
 715                         #address-cells = <1>;
 716                         #size-cells = <1>;
 717                         ranges = <0x0 0x8000 0x1000>;
 718                 };
 719
 720                 target-module@a000 {                    /* 0x4a10a000, ap 65 50.0 */
 721                         compatible = "ti,sysc-omap4", "ti,sysc";
 722                         reg = <0xa000 0x4>,
 723                               <0xa010 0x4>;
 724                         reg-names = "rev", "sysc";
 725                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 726                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 727                                         <SYSC_IDLE_NO>,
 728                                         <SYSC_IDLE_SMART>;
 729                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 730                                         <SYSC_IDLE_NO>,
 731                                         <SYSC_IDLE_SMART>;
 732                         ti,sysc-delay-us = <2>;
 733                         /* Domains (V, P, C): core, cam_pwrdm, iss_clkdm */
 734                         clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
 735                         clock-names = "fck";
 736                         #address-cells = <1>;
 737                         #size-cells = <1>;
 738                         ranges = <0x0 0xa000 0x1000>;
 739
 740                         /* No child device binding or driver in mainline */
 741                 };
 742         };
 743
 744         segment@180000 {                                        /* 0x4a180000 */
 745                 compatible = "simple-bus";
 746                 #address-cells = <1>;
 747                 #size-cells = <1>;
 748         };
 749
 750         segment@200000 {                                        /* 0x4a200000 */
 751                 compatible = "simple-bus";
 752                 #address-cells = <1>;
 753                 #size-cells = <1>;
 754                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 31 */
 755                          <0x0001f000 0x0021f000 0x001000>,      /* ap 32 */
 756                          <0x0000a000 0x0020a000 0x001000>,      /* ap 33 */
 757                          <0x0000b000 0x0020b000 0x001000>,      /* ap 34 */
 758                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
 759                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
 760                          <0x00006000 0x00206000 0x001000>,      /* ap 37 */
 761                          <0x00007000 0x00207000 0x001000>,      /* ap 38 */
 762                          <0x00012000 0x00212000 0x001000>,      /* ap 39 */
 763                          <0x00013000 0x00213000 0x001000>,      /* ap 40 */
 764                          <0x0000c000 0x0020c000 0x001000>,      /* ap 41 */
 765                          <0x0000d000 0x0020d000 0x001000>,      /* ap 42 */
 766                          <0x00010000 0x00210000 0x001000>,      /* ap 43 */
 767                          <0x00011000 0x00211000 0x001000>,      /* ap 44 */
 768                          <0x00016000 0x00216000 0x001000>,      /* ap 45 */
 769                          <0x00017000 0x00217000 0x001000>,      /* ap 46 */
 770                          <0x00014000 0x00214000 0x001000>,      /* ap 47 */
 771                          <0x00015000 0x00215000 0x001000>,      /* ap 48 */
 772                          <0x00018000 0x00218000 0x001000>,      /* ap 49 */
 773                          <0x00019000 0x00219000 0x001000>,      /* ap 50 */
 774                          <0x00020000 0x00220000 0x001000>,      /* ap 51 */
 775                          <0x00021000 0x00221000 0x001000>,      /* ap 52 */
 776                          <0x00026000 0x00226000 0x001000>,      /* ap 53 */
 777                          <0x00027000 0x00227000 0x001000>,      /* ap 54 */
 778                          <0x00028000 0x00228000 0x001000>,      /* ap 55 */
 779                          <0x00029000 0x00229000 0x001000>,      /* ap 56 */
 780                          <0x0002a000 0x0022a000 0x001000>,      /* ap 57 */
 781                          <0x0002b000 0x0022b000 0x001000>,      /* ap 58 */
 782                          <0x0001c000 0x0021c000 0x001000>,      /* ap 59 */
 783                          <0x0001d000 0x0021d000 0x001000>;      /* ap 60 */
 784
 785                 target-module@4000 {                    /* 0x4a204000, ap 35 42.0 */
 786                         compatible = "ti,sysc";
 787                         status = "disabled";
 788                         #address-cells = <1>;
 789                         #size-cells = <1>;
 790                         ranges = <0x0 0x4000 0x1000>;
 791                 };
 792
 793                 target-module@6000 {                    /* 0x4a206000, ap 37 4a.0 */
 794                         compatible = "ti,sysc";
 795                         status = "disabled";
 796                         #address-cells = <1>;
 797                         #size-cells = <1>;
 798                         ranges = <0x0 0x6000 0x1000>;
 799                 };
 800
 801                 target-module@a000 {                    /* 0x4a20a000, ap 33 2c.0 */
 802                         compatible = "ti,sysc";
 803                         status = "disabled";
 804                         #address-cells = <1>;
 805                         #size-cells = <1>;
 806                         ranges = <0x0 0xa000 0x1000>;
 807                 };
 808
 809                 target-module@c000 {                    /* 0x4a20c000, ap 41 20.0 */
 810                         compatible = "ti,sysc";
 811                         status = "disabled";
 812                         #address-cells = <1>;
 813                         #size-cells = <1>;
 814                         ranges = <0x0 0xc000 0x1000>;
 815                 };
 816
 817                 target-module@10000 {                   /* 0x4a210000, ap 43 52.0 */
 818                         compatible = "ti,sysc";
 819                         status = "disabled";
 820                         #address-cells = <1>;
 821                         #size-cells = <1>;
 822                         ranges = <0x0 0x10000 0x1000>;
 823                 };
 824
 825                 target-module@12000 {                   /* 0x4a212000, ap 39 18.0 */
 826                         compatible = "ti,sysc";
 827                         status = "disabled";
 828                         #address-cells = <1>;
 829                         #size-cells = <1>;
 830                         ranges = <0x0 0x12000 0x1000>;
 831                 };
 832
 833                 target-module@14000 {                   /* 0x4a214000, ap 47 30.0 */
 834                         compatible = "ti,sysc";
 835                         status = "disabled";
 836                         #address-cells = <1>;
 837                         #size-cells = <1>;
 838                         ranges = <0x0 0x14000 0x1000>;
 839                 };
 840
 841                 target-module@16000 {                   /* 0x4a216000, ap 45 28.0 */
 842                         compatible = "ti,sysc";
 843                         status = "disabled";
 844                         #address-cells = <1>;
 845                         #size-cells = <1>;
 846                         ranges = <0x0 0x16000 0x1000>;
 847                 };
 848
 849                 target-module@18000 {                   /* 0x4a218000, ap 49 38.0 */
 850                         compatible = "ti,sysc";
 851                         status = "disabled";
 852                         #address-cells = <1>;
 853                         #size-cells = <1>;
 854                         ranges = <0x0 0x18000 0x1000>;
 855                 };
 856
 857                 target-module@1c000 {                   /* 0x4a21c000, ap 59 5a.0 */
 858                         compatible = "ti,sysc";
 859                         status = "disabled";
 860                         #address-cells = <1>;
 861                         #size-cells = <1>;
 862                         ranges = <0x0 0x1c000 0x1000>;
 863                 };
 864
 865                 target-module@1e000 {                   /* 0x4a21e000, ap 31 10.0 */
 866                         compatible = "ti,sysc";
 867                         status = "disabled";
 868                         #address-cells = <1>;
 869                         #size-cells = <1>;
 870                         ranges = <0x0 0x1e000 0x1000>;
 871                 };
 872
 873                 target-module@20000 {                   /* 0x4a220000, ap 51 40.0 */
 874                         compatible = "ti,sysc";
 875                         status = "disabled";
 876                         #address-cells = <1>;
 877                         #size-cells = <1>;
 878                         ranges = <0x0 0x20000 0x1000>;
 879                 };
 880
 881                 target-module@26000 {                   /* 0x4a226000, ap 53 34.0 */
 882                         compatible = "ti,sysc";
 883                         status = "disabled";
 884                         #address-cells = <1>;
 885                         #size-cells = <1>;
 886                         ranges = <0x0 0x26000 0x1000>;
 887                 };
 888
 889                 target-module@28000 {                   /* 0x4a228000, ap 55 2e.0 */
 890                         compatible = "ti,sysc";
 891                         status = "disabled";
 892                         #address-cells = <1>;
 893                         #size-cells = <1>;
 894                         ranges = <0x0 0x28000 0x1000>;
 895                 };
 896
 897                 target-module@2a000 {                   /* 0x4a22a000, ap 57 48.0 */
 898                         compatible = "ti,sysc";
 899                         status = "disabled";
 900                         #address-cells = <1>;
 901                         #size-cells = <1>;
 902                         ranges = <0x0 0x2a000 0x1000>;
 903                 };
 904         };
 905
 906         segment@280000 {                                        /* 0x4a280000 */
 907                 compatible = "simple-bus";
 908                 #address-cells = <1>;
 909                 #size-cells = <1>;
 910         };
 911
 912         l4_cfg_segment_300000: segment@300000 {                 /* 0x4a300000 */
 913                 compatible = "simple-bus";
 914                 #address-cells = <1>;
 915                 #size-cells = <1>;
 916                 ranges = <0x00000000 0x00300000 0x020000>,      /* ap 67 */
 917                          <0x00040000 0x00340000 0x001000>,      /* ap 68 */
 918                          <0x00020000 0x00320000 0x004000>,      /* ap 71 */
 919                          <0x00024000 0x00324000 0x002000>,      /* ap 72 */
 920                          <0x00026000 0x00326000 0x001000>,      /* ap 73 */
 921                          <0x00027000 0x00327000 0x001000>,      /* ap 74 */
 922                          <0x00028000 0x00328000 0x001000>,      /* ap 75 */
 923                          <0x00029000 0x00329000 0x001000>,      /* ap 76 */
 924                          <0x00030000 0x00330000 0x010000>,      /* ap 77 */
 925                          <0x0002a000 0x0032a000 0x002000>,      /* ap 90 */
 926                          <0x0002c000 0x0032c000 0x004000>;      /* ap 91 */
 927
 928                 l4_cfg_target_0: target-module@0 {      /* 0x4a300000, ap 67 14.0 */
 929                         compatible = "ti,sysc";
 930                         status = "disabled";
 931                         #address-cells = <1>;
 932                         #size-cells = <1>;
 933                         ranges = <0x00000000 0x00000000 0x00020000>,
 934                                  <0x00020000 0x00020000 0x00004000>,
 935                                  <0x00024000 0x00024000 0x00002000>,
 936                                  <0x00026000 0x00026000 0x00001000>,
 937                                  <0x00027000 0x00027000 0x00001000>,
 938                                  <0x00028000 0x00028000 0x00001000>,
 939                                  <0x00029000 0x00029000 0x00001000>,
 940                                  <0x0002a000 0x0002a000 0x00002000>,
 941                                  <0x0002c000 0x0002c000 0x00004000>,
 942                                  <0x00030000 0x00030000 0x00010000>;
 943                 };
 944         };
 945 };
 946
 947 &l4_wkup {                                              /* 0x4a300000 */
 948         compatible = "ti,omap4-l4-wkup", "simple-bus";
 949         reg = <0x4a300000 0x800>,
 950               <0x4a300800 0x800>,
 951               <0x4a301000 0x1000>;
 952         reg-names = "ap", "la", "ia0";
 953         #address-cells = <1>;
 954         #size-cells = <1>;
 955         ranges = <0x00000000 0x4a300000 0x010000>,      /* segment 0 */
 956                  <0x00010000 0x4a310000 0x010000>,      /* segment 1 */
 957                  <0x00020000 0x4a320000 0x010000>;      /* segment 2 */
 958
 959         segment@0 {                                     /* 0x4a300000 */
 960                 compatible = "simple-bus";
 961                 #address-cells = <1>;
 962                 #size-cells = <1>;
 963                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 964                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
 965                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
 966                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
 967                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
 968                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
 969                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
 970                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
 971                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
 972                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
 973                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
 974
 975                 target-module@4000 {                    /* 0x4a304000, ap 17 24.0 */
 976                         compatible = "ti,sysc-omap2", "ti,sysc";
 977                         reg = <0x4000 0x4>,
 978                               <0x4004 0x4>;
 979                         reg-names = "rev", "sysc";
 980                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 981                                         <SYSC_IDLE_NO>;
 982                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
 983                         clocks = <&l4_wkup_clkctrl OMAP4_COUNTER_32K_CLKCTRL 0>;
 984                         clock-names = "fck";
 985                         #address-cells = <1>;
 986                         #size-cells = <1>;
 987                         ranges = <0x0 0x4000 0x1000>;
 988
 989                         counter32k: counter@0 {
 990                                 compatible = "ti,omap-counter32k";
 991                                 reg = <0x0 0x20>;
 992                         };
 993                 };
 994
 995                 target-module@6000 {                    /* 0x4a306000, ap 3 08.0 */
 996                         compatible = "ti,sysc-omap4", "ti,sysc";
 997                         reg = <0x6000 0x4>;
 998                         reg-names = "rev";
 999                         #address-cells = <1>;
1000                         #size-cells = <1>;
1001                         ranges = <0x0 0x6000 0x2000>;
1002
1003                         prm: prm@0 {
1004                                 compatible = "ti,omap4-prm", "simple-bus";
1005                                 reg = <0x0 0x2000>;
1006                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
1007                                 #address-cells = <1>;
1008                                 #size-cells = <1>;
1009                                 ranges = <0 0 0x2000>;
1010
1011                                 prm_clocks: clocks {
1012                                         #address-cells = <1>;
1013                                         #size-cells = <0>;
1014                                 };
1015
1016                                 prm_clockdomains: clockdomains {
1017                                 };
1018                         };
1019                 };
1020
1021                 target-module@a000 {                    /* 0x4a30a000, ap 15 34.0 */
1022                         compatible = "ti,sysc-omap4", "ti,sysc";
1023                         reg = <0xa000 0x4>;
1024                         reg-names = "rev";
1025                         #address-cells = <1>;
1026                         #size-cells = <1>;
1027                         ranges = <0x0 0xa000 0x1000>;
1028
1029                         scrm: scrm@0 {
1030                                 compatible = "ti,omap4-scrm";
1031                                 reg = <0x0 0x2000>;
1032
1033                                 scrm_clocks: clocks {
1034                                         #address-cells = <1>;
1035                                         #size-cells = <0>;
1036                                 };
1037
1038                                 scrm_clockdomains: clockdomains {
1039                                 };
1040                         };
1041                 };
1042
1043                 target-module@c000 {                    /* 0x4a30c000, ap 19 2c.0 */
1044                         compatible = "ti,sysc-omap4", "ti,sysc";
1045                         ti,hwmods = "ctrl_module_wkup";
1046                         reg = <0xc000 0x4>,
1047                               <0xc010 0x4>;
1048                         reg-names = "rev", "sysc";
1049                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1050                                         <SYSC_IDLE_NO>,
1051                                         <SYSC_IDLE_SMART>,
1052                                         <SYSC_IDLE_SMART_WKUP>;
1053                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1054                         #address-cells = <1>;
1055                         #size-cells = <1>;
1056                         ranges = <0x0 0xc000 0x1000>;
1057
1058                         omap4_scm_wkup: scm@c000 {
1059                                 compatible = "ti,omap4-scm-wkup";
1060                                 reg = <0xc000 0x1000>;
1061                         };
1062                 };
1063         };
1064
1065         segment@10000 {                                 /* 0x4a310000 */
1066                 compatible = "simple-bus";
1067                 #address-cells = <1>;
1068                 #size-cells = <1>;
1069                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
1070                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
1071                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
1072                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
1073                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
1074                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
1075                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
1076                          <0x0000d000 0x0001d000 0x001000>,      /* ap 12 */
1077                          <0x0000e000 0x0001e000 0x001000>,      /* ap 21 */
1078                          <0x0000f000 0x0001f000 0x001000>;      /* ap 22 */
1079
1080                 gpio1_target: target-module@0 {                 /* 0x4a310000, ap 5 14.0 */
1081                         compatible = "ti,sysc-omap2", "ti,sysc";
1082                         reg = <0x0 0x4>,
1083                               <0x10 0x4>,
1084                               <0x114 0x4>;
1085                         reg-names = "rev", "sysc", "syss";
1086                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1087                                          SYSC_OMAP2_SOFTRESET |
1088                                          SYSC_OMAP2_AUTOIDLE)>;
1089                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1090                                         <SYSC_IDLE_NO>,
1091                                         <SYSC_IDLE_SMART>,
1092                                         <SYSC_IDLE_SMART_WKUP>;
1093                         ti,syss-mask = <1>;
1094                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1095                         clocks = <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 0>,
1096                                  <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 8>;
1097                         clock-names = "fck", "dbclk";
1098                         #address-cells = <1>;
1099                         #size-cells = <1>;
1100                         ranges = <0x0 0x0 0x1000>;
1101
1102                         gpio1: gpio@0 {
1103                                 compatible = "ti,omap4-gpio";
1104                                 reg = <0x0 0x200>;
1105                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
1106                                 ti,gpio-always-on;
1107                                 gpio-controller;
1108                                 #gpio-cells = <2>;
1109                                 interrupt-controller;
1110                                 #interrupt-cells = <2>;
1111                         };
1112                 };
1113
1114                 target-module@4000 {                    /* 0x4a314000, ap 7 18.0 */
1115                         compatible = "ti,sysc-omap2", "ti,sysc";
1116                         reg = <0x4000 0x4>,
1117                               <0x4010 0x4>,
1118                               <0x4014 0x4>;
1119                         reg-names = "rev", "sysc", "syss";
1120                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
1121                                          SYSC_OMAP2_SOFTRESET)>;
1122                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1123                                         <SYSC_IDLE_NO>,
1124                                         <SYSC_IDLE_SMART>,
1125                                         <SYSC_IDLE_SMART_WKUP>;
1126                         ti,syss-mask = <1>;
1127                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1128                         clocks = <&l4_wkup_clkctrl OMAP4_WD_TIMER2_CLKCTRL 0>;
1129                         clock-names = "fck";
1130                         #address-cells = <1>;
1131                         #size-cells = <1>;
1132                         ranges = <0x0 0x4000 0x1000>;
1133
1134                         wdt2: wdt@0 {
1135                                 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
1136                                 reg = <0x0 0x80>;
1137                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
1138                         };
1139                 };
1140
1141                 timer1_target: target-module@8000 {     /* 0x4a318000, ap 9 1c.0 */
1142                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1143                         reg = <0x8000 0x4>,
1144                               <0x8010 0x4>,
1145                               <0x8014 0x4>;
1146                         reg-names = "rev", "sysc", "syss";
1147                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1148                                          SYSC_OMAP2_EMUFREE |
1149                                          SYSC_OMAP2_ENAWAKEUP |
1150                                          SYSC_OMAP2_SOFTRESET |
1151                                          SYSC_OMAP2_AUTOIDLE)>;
1152                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1153                                         <SYSC_IDLE_NO>,
1154                                         <SYSC_IDLE_SMART>;
1155                         ti,syss-mask = <1>;
1156                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1157                         clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 0>;
1158                         clock-names = "fck";
1159                         #address-cells = <1>;
1160                         #size-cells = <1>;
1161                         ranges = <0x0 0x8000 0x1000>;
1162
1163                         timer1: timer@0 {
1164                                 compatible = "ti,omap3430-timer";
1165                                 reg = <0x0 0x80>;
1166                                 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
1167                                 clock-names = "fck";
1168                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1169                                 ti,timer-alwon;
1170                         };
1171                 };
1172
1173                 target-module@c000 {                    /* 0x4a31c000, ap 11 20.0 */
1174                         compatible = "ti,sysc-omap2", "ti,sysc";
1175                         reg = <0xc000 0x4>,
1176                               <0xc010 0x4>,
1177                               <0xc014 0x4>;
1178                         reg-names = "rev", "sysc", "syss";
1179                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1180                                          SYSC_OMAP2_EMUFREE |
1181                                          SYSC_OMAP2_ENAWAKEUP |
1182                                          SYSC_OMAP2_SOFTRESET |
1183                                          SYSC_OMAP2_AUTOIDLE)>;
1184                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1185                                         <SYSC_IDLE_NO>,
1186                                         <SYSC_IDLE_SMART>;
1187                         ti,syss-mask = <1>;
1188                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1189                         clocks = <&l4_wkup_clkctrl OMAP4_KBD_CLKCTRL 0>;
1190                         clock-names = "fck";
1191                         #address-cells = <1>;
1192                         #size-cells = <1>;
1193                         ranges = <0x0 0xc000 0x1000>;
1194
1195                         keypad: keypad@0 {
1196                                 compatible = "ti,omap4-keypad";
1197                                 reg = <0x0 0x80>;
1198                                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1199                                 reg-names = "mpu";
1200                         };
1201                 };
1202
1203                 target-module@e000 {                    /* 0x4a31e000, ap 21 30.0 */
1204                         compatible = "ti,sysc-omap4", "ti,sysc";
1205                         ti,hwmods = "ctrl_module_pad_wkup";
1206                         reg = <0xe000 0x4>,
1207                               <0xe010 0x4>;
1208                         reg-names = "rev", "sysc";
1209                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1210                                         <SYSC_IDLE_NO>,
1211                                         <SYSC_IDLE_SMART>,
1212                                         <SYSC_IDLE_SMART_WKUP>;
1213                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1214                         #address-cells = <1>;
1215                         #size-cells = <1>;
1216                         ranges = <0x0 0xe000 0x1000>;
1217
1218                         omap4_pmx_wkup: pinmux@40 {
1219                                 compatible = "ti,omap4-padconf",
1220                                              "pinctrl-single";
1221                                 reg = <0x40 0x0038>;
1222                                 #address-cells = <1>;
1223                                 #size-cells = <0>;
1224                                 #pinctrl-cells = <1>;
1225                                 #interrupt-cells = <1>;
1226                                 interrupt-controller;
1227                                 pinctrl-single,register-width = <16>;
1228                                 pinctrl-single,function-mask = <0x7fff>;
1229                         };
1230                 };
1231         };
1232
1233         segment@20000 {                                 /* 0x4a320000 */
1234                 compatible = "simple-bus";
1235                 #address-cells = <1>;
1236                 #size-cells = <1>;
1237                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
1238                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
1239                          <0x00000000 0x00020000 0x001000>,      /* ap 23 */
1240                          <0x00001000 0x00021000 0x001000>,      /* ap 24 */
1241                          <0x00002000 0x00022000 0x001000>,      /* ap 25 */
1242                          <0x00003000 0x00023000 0x001000>,      /* ap 26 */
1243                          <0x00004000 0x00024000 0x001000>,      /* ap 27 */
1244                          <0x00005000 0x00025000 0x001000>,      /* ap 28 */
1245                          <0x00007000 0x00027000 0x000400>,      /* ap 29 */
1246                          <0x00008000 0x00028000 0x000800>,      /* ap 30 */
1247                          <0x00009000 0x00029000 0x000400>;      /* ap 31 */
1248
1249                 target-module@0 {                       /* 0x4a320000, ap 23 04.0 */
1250                         compatible = "ti,sysc";
1251                         status = "disabled";
1252                         #address-cells = <1>;
1253                         #size-cells = <1>;
1254                         ranges = <0x0 0x0 0x1000>;
1255                 };
1256
1257                 target-module@2000 {                    /* 0x4a322000, ap 25 0c.0 */
1258                         compatible = "ti,sysc";
1259                         status = "disabled";
1260                         #address-cells = <1>;
1261                         #size-cells = <1>;
1262                         ranges = <0x0 0x2000 0x1000>;
1263                 };
1264
1265                 target-module@4000 {                    /* 0x4a324000, ap 27 10.0 */
1266                         compatible = "ti,sysc";
1267                         status = "disabled";
1268                         #address-cells = <1>;
1269                         #size-cells = <1>;
1270                         ranges = <0x0 0x4000 0x1000>;
1271                 };
1272
1273                 target-module@6000 {                    /* 0x4a326000, ap 13 28.0 */
1274                         compatible = "ti,sysc";
1275                         status = "disabled";
1276                         #address-cells = <1>;
1277                         #size-cells = <1>;
1278                         ranges = <0x00000000 0x00006000 0x00001000>,
1279                                  <0x00001000 0x00007000 0x00000400>,
1280                                  <0x00002000 0x00008000 0x00000800>,
1281                                  <0x00003000 0x00009000 0x00000400>;
1282                 };
1283         };
1284 };
1285
1286 &l4_per {                                               /* 0x48000000 */
1287         compatible = "ti,omap4-l4-per", "simple-bus";
1288         reg = <0x48000000 0x800>,
1289               <0x48000800 0x800>,
1290               <0x48001000 0x400>,
1291               <0x48001400 0x400>,
1292               <0x48001800 0x400>,
1293               <0x48001c00 0x400>;
1294         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
1295         #address-cells = <1>;
1296         #size-cells = <1>;
1297         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
1298                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
1299
1300         segment@0 {                                     /* 0x48000000 */
1301                 compatible = "simple-bus";
1302                 #address-cells = <1>;
1303                 #size-cells = <1>;
1304                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
1305                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
1306                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
1307                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
1308                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
1309                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
1310                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
1311                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
1312                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
1313                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
1314                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
1315                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
1316                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
1317                          <0x00040000 0x00040000 0x010000>,      /* ap 13 */
1318                          <0x00050000 0x00050000 0x001000>,      /* ap 14 */
1319                          <0x00055000 0x00055000 0x001000>,      /* ap 15 */
1320                          <0x00056000 0x00056000 0x001000>,      /* ap 16 */
1321                          <0x00057000 0x00057000 0x001000>,      /* ap 17 */
1322                          <0x00058000 0x00058000 0x001000>,      /* ap 18 */
1323                          <0x00059000 0x00059000 0x001000>,      /* ap 19 */
1324                          <0x0005a000 0x0005a000 0x001000>,      /* ap 20 */
1325                          <0x0005b000 0x0005b000 0x001000>,      /* ap 21 */
1326                          <0x0005c000 0x0005c000 0x001000>,      /* ap 22 */
1327                          <0x0005d000 0x0005d000 0x001000>,      /* ap 23 */
1328                          <0x0005e000 0x0005e000 0x001000>,      /* ap 24 */
1329                          <0x00060000 0x00060000 0x001000>,      /* ap 25 */
1330                          <0x0006a000 0x0006a000 0x001000>,      /* ap 26 */
1331                          <0x0006b000 0x0006b000 0x001000>,      /* ap 27 */
1332                          <0x0006c000 0x0006c000 0x001000>,      /* ap 28 */
1333                          <0x0006d000 0x0006d000 0x001000>,      /* ap 29 */
1334                          <0x0006e000 0x0006e000 0x001000>,      /* ap 30 */
1335                          <0x0006f000 0x0006f000 0x001000>,      /* ap 31 */
1336                          <0x00070000 0x00070000 0x001000>,      /* ap 32 */
1337                          <0x00071000 0x00071000 0x001000>,      /* ap 33 */
1338                          <0x00072000 0x00072000 0x001000>,      /* ap 34 */
1339                          <0x00073000 0x00073000 0x001000>,      /* ap 35 */
1340                          <0x00061000 0x00061000 0x001000>,      /* ap 36 */
1341                          <0x00096000 0x00096000 0x001000>,      /* ap 37 */
1342                          <0x00097000 0x00097000 0x001000>,      /* ap 38 */
1343                          <0x00076000 0x00076000 0x001000>,      /* ap 39 */
1344                          <0x00077000 0x00077000 0x001000>,      /* ap 40 */
1345                          <0x00078000 0x00078000 0x001000>,      /* ap 41 */
1346                          <0x00079000 0x00079000 0x001000>,      /* ap 42 */
1347                          <0x00086000 0x00086000 0x001000>,      /* ap 43 */
1348                          <0x00087000 0x00087000 0x001000>,      /* ap 44 */
1349                          <0x00088000 0x00088000 0x001000>,      /* ap 45 */
1350                          <0x00089000 0x00089000 0x001000>,      /* ap 46 */
1351                          <0x000b0000 0x000b0000 0x001000>,      /* ap 47 */
1352                          <0x000b1000 0x000b1000 0x001000>,      /* ap 48 */
1353                          <0x00098000 0x00098000 0x001000>,      /* ap 49 */
1354                          <0x00099000 0x00099000 0x001000>,      /* ap 50 */
1355                          <0x0009a000 0x0009a000 0x001000>,      /* ap 51 */
1356                          <0x0009b000 0x0009b000 0x001000>,      /* ap 52 */
1357                          <0x0009c000 0x0009c000 0x001000>,      /* ap 53 */
1358                          <0x0009d000 0x0009d000 0x001000>,      /* ap 54 */
1359                          <0x0009e000 0x0009e000 0x001000>,      /* ap 55 */
1360                          <0x0009f000 0x0009f000 0x001000>,      /* ap 56 */
1361                          <0x00090000 0x00090000 0x002000>,      /* ap 57 */
1362                          <0x00092000 0x00092000 0x001000>,      /* ap 58 */
1363                          <0x000a4000 0x000a4000 0x001000>,      /* ap 59 */
1364                          <0x000a6000 0x000a6000 0x001000>,      /* ap 60 */
1365                          <0x000a8000 0x000a8000 0x004000>,      /* ap 61 */
1366                          <0x000ac000 0x000ac000 0x001000>,      /* ap 62 */
1367                          <0x000ad000 0x000ad000 0x001000>,      /* ap 63 */
1368                          <0x000ae000 0x000ae000 0x001000>,      /* ap 64 */
1369                          <0x000b2000 0x000b2000 0x001000>,      /* ap 65 */
1370                          <0x000b3000 0x000b3000 0x001000>,      /* ap 66 */
1371                          <0x000b4000 0x000b4000 0x001000>,      /* ap 67 */
1372                          <0x000b5000 0x000b5000 0x001000>,      /* ap 68 */
1373                          <0x000b8000 0x000b8000 0x001000>,      /* ap 69 */
1374                          <0x000b9000 0x000b9000 0x001000>,      /* ap 70 */
1375                          <0x000ba000 0x000ba000 0x001000>,      /* ap 71 */
1376                          <0x000bb000 0x000bb000 0x001000>,      /* ap 72 */
1377                          <0x000d1000 0x000d1000 0x001000>,      /* ap 73 */
1378                          <0x000d2000 0x000d2000 0x001000>,      /* ap 74 */
1379                          <0x000d5000 0x000d5000 0x001000>,      /* ap 75 */
1380                          <0x000d6000 0x000d6000 0x001000>,      /* ap 76 */
1381                          <0x000a2000 0x000a2000 0x001000>,      /* ap 79 */
1382                          <0x000a3000 0x000a3000 0x001000>,      /* ap 80 */
1383                          <0x00001400 0x00001400 0x000400>,      /* ap 81 */
1384                          <0x00001800 0x00001800 0x000400>,      /* ap 82 */
1385                          <0x00001c00 0x00001c00 0x000400>,      /* ap 83 */
1386                          <0x000a5000 0x000a5000 0x001000>;      /* ap 84 */
1387
1388                 target-module@20000 {                   /* 0x48020000, ap 3 06.0 */
1389                         compatible = "ti,sysc-omap2", "ti,sysc";
1390                         reg = <0x20050 0x4>,
1391                               <0x20054 0x4>,
1392                               <0x20058 0x4>;
1393                         reg-names = "rev", "sysc", "syss";
1394                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1395                                          SYSC_OMAP2_SOFTRESET |
1396                                          SYSC_OMAP2_AUTOIDLE)>;
1397                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1398                                         <SYSC_IDLE_NO>,
1399                                         <SYSC_IDLE_SMART>,
1400                                         <SYSC_IDLE_SMART_WKUP>;
1401                         ti,syss-mask = <1>;
1402                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1403                         clocks = <&l4_per_clkctrl OMAP4_UART3_CLKCTRL 0>;
1404                         clock-names = "fck";
1405                         #address-cells = <1>;
1406                         #size-cells = <1>;
1407                         ranges = <0x0 0x20000 0x1000>;
1408
1409                         uart3: serial@0 {
1410                                 compatible = "ti,omap4-uart";
1411                                 reg = <0x0 0x100>;
1412                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1413                                 clock-frequency = <48000000>;
1414                         };
1415                 };
1416
1417                 target-module@32000 {                   /* 0x48032000, ap 5 02.0 */
1418                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1419                         reg = <0x32000 0x4>,
1420                               <0x32010 0x4>,
1421                               <0x32014 0x4>;
1422                         reg-names = "rev", "sysc", "syss";
1423                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1424                                          SYSC_OMAP2_EMUFREE |
1425                                          SYSC_OMAP2_ENAWAKEUP |
1426                                          SYSC_OMAP2_SOFTRESET |
1427                                          SYSC_OMAP2_AUTOIDLE)>;
1428                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1429                                         <SYSC_IDLE_NO>,
1430                                         <SYSC_IDLE_SMART>;
1431                         ti,syss-mask = <1>;
1432                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1433                         clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 0>;
1434                         clock-names = "fck";
1435                         #address-cells = <1>;
1436                         #size-cells = <1>;
1437                         ranges = <0x0 0x32000 0x1000>;
1438
1439                         timer2: timer@0 {
1440                                 compatible = "ti,omap3430-timer";
1441                                 reg = <0x0 0x80>;
1442                                 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>;
1443                                 clock-names = "fck";
1444                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1445                         };
1446                 };
1447
1448                 target-module@34000 {                   /* 0x48034000, ap 7 04.0 */
1449                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1450                         reg = <0x34000 0x4>,
1451                               <0x34010 0x4>;
1452                         reg-names = "rev", "sysc";
1453                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1454                                          SYSC_OMAP4_SOFTRESET)>;
1455                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1456                                         <SYSC_IDLE_NO>,
1457                                         <SYSC_IDLE_SMART>,
1458                                         <SYSC_IDLE_SMART_WKUP>;
1459                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1460                         clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 0>;
1461                         clock-names = "fck";
1462                         #address-cells = <1>;
1463                         #size-cells = <1>;
1464                         ranges = <0x0 0x34000 0x1000>;
1465
1466                         timer3: timer@0 {
1467                                 compatible = "ti,omap4430-timer";
1468                                 reg = <0x0 0x80>;
1469                                 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>;
1470                                 clock-names = "fck";
1471                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1472                         };
1473                 };
1474
1475                 target-module@36000 {                   /* 0x48036000, ap 9 0e.0 */
1476                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1477                         reg = <0x36000 0x4>,
1478                               <0x36010 0x4>;
1479                         reg-names = "rev", "sysc";
1480                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1481                                          SYSC_OMAP4_SOFTRESET)>;
1482                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1483                                         <SYSC_IDLE_NO>,
1484                                         <SYSC_IDLE_SMART>,
1485                                         <SYSC_IDLE_SMART_WKUP>;
1486                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1487                         clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 0>;
1488                         clock-names = "fck";
1489                         #address-cells = <1>;
1490                         #size-cells = <1>;
1491                         ranges = <0x0 0x36000 0x1000>;
1492
1493                         timer4: timer@0 {
1494                                 compatible = "ti,omap4430-timer";
1495                                 reg = <0x0 0x80>;
1496                                 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>;
1497                                 clock-names = "fck";
1498                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1499                         };
1500                 };
1501
1502                 target-module@3e000 {                   /* 0x4803e000, ap 11 08.0 */
1503                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1504                         reg = <0x3e000 0x4>,
1505                               <0x3e010 0x4>;
1506                         reg-names = "rev", "sysc";
1507                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1508                                          SYSC_OMAP4_SOFTRESET)>;
1509                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1510                                         <SYSC_IDLE_NO>,
1511                                         <SYSC_IDLE_SMART>,
1512                                         <SYSC_IDLE_SMART_WKUP>;
1513                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1514                         clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 0>;
1515                         clock-names = "fck";
1516                         #address-cells = <1>;
1517                         #size-cells = <1>;
1518                         ranges = <0x0 0x3e000 0x1000>;
1519
1520                         timer9: timer@0 {
1521                                 compatible = "ti,omap4430-timer";
1522                                 reg = <0x0 0x80>;
1523                                 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
1524                                 clock-names = "fck";
1525                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1526                                 ti,timer-pwm;
1527                         };
1528                 };
1529
1530                 /* Unused DSS L4 access, see L3 instead */
1531                 target-module@40000 {                   /* 0x48040000, ap 13 0a.0 */
1532                         compatible = "ti,sysc";
1533                         status = "disabled";
1534                         #address-cells = <1>;
1535                         #size-cells = <1>;
1536                         ranges = <0x0 0x40000 0x10000>;
1537                 };
1538
1539                 target-module@55000 {                   /* 0x48055000, ap 15 0c.0 */
1540                         compatible = "ti,sysc-omap2", "ti,sysc";
1541                         reg = <0x55000 0x4>,
1542                               <0x55010 0x4>,
1543                               <0x55114 0x4>;
1544                         reg-names = "rev", "sysc", "syss";
1545                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1546                                          SYSC_OMAP2_SOFTRESET |
1547                                          SYSC_OMAP2_AUTOIDLE)>;
1548                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1549                                         <SYSC_IDLE_NO>,
1550                                         <SYSC_IDLE_SMART>,
1551                                         <SYSC_IDLE_SMART_WKUP>;
1552                         ti,syss-mask = <1>;
1553                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1554                         clocks = <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 0>,
1555                                  <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 8>;
1556                         clock-names = "fck", "dbclk";
1557                         #address-cells = <1>;
1558                         #size-cells = <1>;
1559                         ranges = <0x0 0x55000 0x1000>;
1560
1561                         gpio2: gpio@0 {
1562                                 compatible = "ti,omap4-gpio";
1563                                 reg = <0x0 0x200>;
1564                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1565                                 gpio-controller;
1566                                 #gpio-cells = <2>;
1567                                 interrupt-controller;
1568                                 #interrupt-cells = <2>;
1569                         };
1570                 };
1571
1572                 target-module@57000 {                   /* 0x48057000, ap 17 16.0 */
1573                         compatible = "ti,sysc-omap2", "ti,sysc";
1574                         reg = <0x57000 0x4>,
1575                               <0x57010 0x4>,
1576                               <0x57114 0x4>;
1577                         reg-names = "rev", "sysc", "syss";
1578                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1579                                          SYSC_OMAP2_SOFTRESET |
1580                                          SYSC_OMAP2_AUTOIDLE)>;
1581                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1582                                         <SYSC_IDLE_NO>,
1583                                         <SYSC_IDLE_SMART>,
1584                                         <SYSC_IDLE_SMART_WKUP>;
1585                         ti,syss-mask = <1>;
1586                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1587                         clocks = <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 0>,
1588                                  <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 8>;
1589                         clock-names = "fck", "dbclk";
1590                         #address-cells = <1>;
1591                         #size-cells = <1>;
1592                         ranges = <0x0 0x57000 0x1000>;
1593
1594                         gpio3: gpio@0 {
1595                                 compatible = "ti,omap4-gpio";
1596                                 reg = <0x0 0x200>;
1597                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1598                                 gpio-controller;
1599                                 #gpio-cells = <2>;
1600                                 interrupt-controller;
1601                                 #interrupt-cells = <2>;
1602                         };
1603                 };
1604
1605                 target-module@59000 {                   /* 0x48059000, ap 19 10.0 */
1606                         compatible = "ti,sysc-omap2", "ti,sysc";
1607                         reg = <0x59000 0x4>,
1608                               <0x59010 0x4>,
1609                               <0x59114 0x4>;
1610                         reg-names = "rev", "sysc", "syss";
1611                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1612                                          SYSC_OMAP2_SOFTRESET |
1613                                          SYSC_OMAP2_AUTOIDLE)>;
1614                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1615                                         <SYSC_IDLE_NO>,
1616                                         <SYSC_IDLE_SMART>,
1617                                         <SYSC_IDLE_SMART_WKUP>;
1618                         ti,syss-mask = <1>;
1619                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1620                         clocks = <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 0>,
1621                                  <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 8>;
1622                         clock-names = "fck", "dbclk";
1623                         #address-cells = <1>;
1624                         #size-cells = <1>;
1625                         ranges = <0x0 0x59000 0x1000>;
1626
1627                         gpio4: gpio@0 {
1628                                 compatible = "ti,omap4-gpio";
1629                                 reg = <0x0 0x200>;
1630                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1631                                 gpio-controller;
1632                                 #gpio-cells = <2>;
1633                                 interrupt-controller;
1634                                 #interrupt-cells = <2>;
1635                         };
1636                 };
1637
1638                 target-module@5b000 {                   /* 0x4805b000, ap 21 12.0 */
1639                         compatible = "ti,sysc-omap2", "ti,sysc";
1640                         reg = <0x5b000 0x4>,
1641                               <0x5b010 0x4>,
1642                               <0x5b114 0x4>;
1643                         reg-names = "rev", "sysc", "syss";
1644                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1645                                          SYSC_OMAP2_SOFTRESET |
1646                                          SYSC_OMAP2_AUTOIDLE)>;
1647                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1648                                         <SYSC_IDLE_NO>,
1649                                         <SYSC_IDLE_SMART>,
1650                                         <SYSC_IDLE_SMART_WKUP>;
1651                         ti,syss-mask = <1>;
1652                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1653                         clocks = <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 0>,
1654                                  <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 8>;
1655                         clock-names = "fck", "dbclk";
1656                         #address-cells = <1>;
1657                         #size-cells = <1>;
1658                         ranges = <0x0 0x5b000 0x1000>;
1659
1660                         gpio5: gpio@0 {
1661                                 compatible = "ti,omap4-gpio";
1662                                 reg = <0x0 0x200>;
1663                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1664                                 gpio-controller;
1665                                 #gpio-cells = <2>;
1666                                 interrupt-controller;
1667                                 #interrupt-cells = <2>;
1668                         };
1669                 };
1670
1671                 target-module@5d000 {                   /* 0x4805d000, ap 23 14.0 */
1672                         compatible = "ti,sysc-omap2", "ti,sysc";
1673                         reg = <0x5d000 0x4>,
1674                               <0x5d010 0x4>,
1675                               <0x5d114 0x4>;
1676                         reg-names = "rev", "sysc", "syss";
1677                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1678                                          SYSC_OMAP2_SOFTRESET |
1679                                          SYSC_OMAP2_AUTOIDLE)>;
1680                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1681                                         <SYSC_IDLE_NO>,
1682                                         <SYSC_IDLE_SMART>,
1683                                         <SYSC_IDLE_SMART_WKUP>;
1684                         ti,syss-mask = <1>;
1685                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1686                         clocks = <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 0>,
1687                                  <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 8>;
1688                         clock-names = "fck", "dbclk";
1689                         #address-cells = <1>;
1690                         #size-cells = <1>;
1691                         ranges = <0x0 0x5d000 0x1000>;
1692
1693                         gpio6: gpio@0 {
1694                                 compatible = "ti,omap4-gpio";
1695                                 reg = <0x0 0x200>;
1696                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1697                                 gpio-controller;
1698                                 #gpio-cells = <2>;
1699                                 interrupt-controller;
1700                                 #interrupt-cells = <2>;
1701                         };
1702                 };
1703
1704                 target-module@60000 {                   /* 0x48060000, ap 25 1e.0 */
1705                         compatible = "ti,sysc-omap2", "ti,sysc";
1706                         reg = <0x60000 0x8>,
1707                               <0x60010 0x8>,
1708                               <0x60090 0x8>;
1709                         reg-names = "rev", "sysc", "syss";
1710                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1711                                          SYSC_OMAP2_ENAWAKEUP |
1712                                          SYSC_OMAP2_SOFTRESET |
1713                                          SYSC_OMAP2_AUTOIDLE)>;
1714                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1715                                         <SYSC_IDLE_NO>,
1716                                         <SYSC_IDLE_SMART>,
1717                                         <SYSC_IDLE_SMART_WKUP>;
1718                         ti,syss-mask = <1>;
1719                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1720                         clocks = <&l4_per_clkctrl OMAP4_I2C3_CLKCTRL 0>;
1721                         clock-names = "fck";
1722                         #address-cells = <1>;
1723                         #size-cells = <1>;
1724                         ranges = <0x0 0x60000 0x1000>;
1725
1726                         i2c3: i2c@0 {
1727                                 compatible = "ti,omap4-i2c";
1728                                 reg = <0x0 0x100>;
1729                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1730                                 #address-cells = <1>;
1731                                 #size-cells = <0>;
1732                         };
1733                 };
1734
1735                 target-module@6a000 {                   /* 0x4806a000, ap 26 18.0 */
1736                         compatible = "ti,sysc-omap2", "ti,sysc";
1737                         reg = <0x6a050 0x4>,
1738                               <0x6a054 0x4>,
1739                               <0x6a058 0x4>;
1740                         reg-names = "rev", "sysc", "syss";
1741                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1742                                          SYSC_OMAP2_SOFTRESET |
1743                                          SYSC_OMAP2_AUTOIDLE)>;
1744                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1745                                         <SYSC_IDLE_NO>,
1746                                         <SYSC_IDLE_SMART>,
1747                                         <SYSC_IDLE_SMART_WKUP>;
1748                         ti,syss-mask = <1>;
1749                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1750                         clocks = <&l4_per_clkctrl OMAP4_UART1_CLKCTRL 0>;
1751                         clock-names = "fck";
1752                         #address-cells = <1>;
1753                         #size-cells = <1>;
1754                         ranges = <0x0 0x6a000 0x1000>;
1755
1756                         uart1: serial@0 {
1757                                 compatible = "ti,omap4-uart";
1758                                 reg = <0x0 0x100>;
1759                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1760                                 clock-frequency = <48000000>;
1761                         };
1762                 };
1763
1764                 target-module@6c000 {                   /* 0x4806c000, ap 28 20.0 */
1765                         compatible = "ti,sysc-omap2", "ti,sysc";
1766                         reg = <0x6c050 0x4>,
1767                               <0x6c054 0x4>,
1768                               <0x6c058 0x4>;
1769                         reg-names = "rev", "sysc", "syss";
1770                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1771                                          SYSC_OMAP2_SOFTRESET |
1772                                          SYSC_OMAP2_AUTOIDLE)>;
1773                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1774                                         <SYSC_IDLE_NO>,
1775                                         <SYSC_IDLE_SMART>,
1776                                         <SYSC_IDLE_SMART_WKUP>;
1777                         ti,syss-mask = <1>;
1778                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1779                         clocks = <&l4_per_clkctrl OMAP4_UART2_CLKCTRL 0>;
1780                         clock-names = "fck";
1781                         #address-cells = <1>;
1782                         #size-cells = <1>;
1783                         ranges = <0x0 0x6c000 0x1000>;
1784
1785                         uart2: serial@0 {
1786                                 compatible = "ti,omap4-uart";
1787                                 reg = <0x0 0x100>;
1788                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1789                                 clock-frequency = <48000000>;
1790                         };
1791                 };
1792
1793                 target-module@6e000 {                   /* 0x4806e000, ap 30 1c.1 */
1794                         compatible = "ti,sysc-omap2", "ti,sysc";
1795                         reg = <0x6e050 0x4>,
1796                               <0x6e054 0x4>,
1797                               <0x6e058 0x4>;
1798                         reg-names = "rev", "sysc", "syss";
1799                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1800                                          SYSC_OMAP2_SOFTRESET |
1801                                          SYSC_OMAP2_AUTOIDLE)>;
1802                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1803                                         <SYSC_IDLE_NO>,
1804                                         <SYSC_IDLE_SMART>,
1805                                         <SYSC_IDLE_SMART_WKUP>;
1806                         ti,syss-mask = <1>;
1807                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1808                         clocks = <&l4_per_clkctrl OMAP4_UART4_CLKCTRL 0>;
1809                         clock-names = "fck";
1810                         #address-cells = <1>;
1811                         #size-cells = <1>;
1812                         ranges = <0x0 0x6e000 0x1000>;
1813
1814                         uart4: serial@0 {
1815                                 compatible = "ti,omap4-uart";
1816                                 reg = <0x0 0x100>;
1817                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1818                                 clock-frequency = <48000000>;
1819                         };
1820                 };
1821
1822                 target-module@70000 {                   /* 0x48070000, ap 32 28.0 */
1823                         compatible = "ti,sysc-omap2", "ti,sysc";
1824                         reg = <0x70000 0x8>,
1825                               <0x70010 0x8>,
1826                               <0x70090 0x8>;
1827                         reg-names = "rev", "sysc", "syss";
1828                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1829                                          SYSC_OMAP2_ENAWAKEUP |
1830                                          SYSC_OMAP2_SOFTRESET |
1831                                          SYSC_OMAP2_AUTOIDLE)>;
1832                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1833                                         <SYSC_IDLE_NO>,
1834                                         <SYSC_IDLE_SMART>,
1835                                         <SYSC_IDLE_SMART_WKUP>;
1836                         ti,syss-mask = <1>;
1837                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1838                         clocks = <&l4_per_clkctrl OMAP4_I2C1_CLKCTRL 0>;
1839                         clock-names = "fck";
1840                         #address-cells = <1>;
1841                         #size-cells = <1>;
1842                         ranges = <0x0 0x70000 0x1000>;
1843
1844                         i2c1: i2c@0 {
1845                                 compatible = "ti,omap4-i2c";
1846                                 reg = <0x0 0x100>;
1847                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1848                                 #address-cells = <1>;
1849                                 #size-cells = <0>;
1850                         };
1851                 };
1852
1853                 target-module@72000 {                   /* 0x48072000, ap 34 30.0 */
1854                         compatible = "ti,sysc-omap2", "ti,sysc";
1855                         reg = <0x72000 0x8>,
1856                               <0x72010 0x8>,
1857                               <0x72090 0x8>;
1858                         reg-names = "rev", "sysc", "syss";
1859                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1860                                          SYSC_OMAP2_ENAWAKEUP |
1861                                          SYSC_OMAP2_SOFTRESET |
1862                                          SYSC_OMAP2_AUTOIDLE)>;
1863                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1864                                         <SYSC_IDLE_NO>,
1865                                         <SYSC_IDLE_SMART>,
1866                                         <SYSC_IDLE_SMART_WKUP>;
1867                         ti,syss-mask = <1>;
1868                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1869                         clocks = <&l4_per_clkctrl OMAP4_I2C2_CLKCTRL 0>;
1870                         clock-names = "fck";
1871                         #address-cells = <1>;
1872                         #size-cells = <1>;
1873                         ranges = <0x0 0x72000 0x1000>;
1874
1875                         i2c2: i2c@0 {
1876                                 compatible = "ti,omap4-i2c";
1877                                 reg = <0x0 0x100>;
1878                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1879                                 #address-cells = <1>;
1880                                 #size-cells = <0>;
1881                         };
1882                 };
1883
1884                 target-module@76000 {                   /* 0x48076000, ap 39 38.0 */
1885                         compatible = "ti,sysc-omap4", "ti,sysc";
1886                         reg = <0x76000 0x4>,
1887                               <0x76010 0x4>;
1888                         reg-names = "rev", "sysc";
1889                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1890                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1891                                         <SYSC_IDLE_NO>,
1892                                         <SYSC_IDLE_SMART>,
1893                                         <SYSC_IDLE_SMART_WKUP>;
1894                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1895                         clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
1896                         clock-names = "fck";
1897                         #address-cells = <1>;
1898                         #size-cells = <1>;
1899                         ranges = <0x0 0x76000 0x1000>;
1900
1901                         /* No child device binding or driver in mainline */
1902                 };
1903
1904                 target-module@78000 {                   /* 0x48078000, ap 41 1a.0 */
1905                         compatible = "ti,sysc-omap2", "ti,sysc";
1906                         reg = <0x78000 0x4>,
1907                               <0x78010 0x4>,
1908                               <0x78014 0x4>;
1909                         reg-names = "rev", "sysc", "syss";
1910                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1911                                          SYSC_OMAP2_SOFTRESET |
1912                                          SYSC_OMAP2_AUTOIDLE)>;
1913                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1914                                         <SYSC_IDLE_NO>,
1915                                         <SYSC_IDLE_SMART>;
1916                         ti,syss-mask = <1>;
1917                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1918                         clocks = <&l4_per_clkctrl OMAP4_ELM_CLKCTRL 0>;
1919                         clock-names = "fck";
1920                         #address-cells = <1>;
1921                         #size-cells = <1>;
1922                         ranges = <0x0 0x78000 0x1000>;
1923
1924                         elm: elm@0 {
1925                                 compatible = "ti,am3352-elm";
1926                                 reg = <0x0 0x2000>;
1927                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1928                                 status = "disabled";
1929                         };
1930                 };
1931
1932                 target-module@86000 {                   /* 0x48086000, ap 43 24.0 */
1933                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1934                         reg = <0x86000 0x4>,
1935                               <0x86010 0x4>,
1936                               <0x86014 0x4>;
1937                         reg-names = "rev", "sysc", "syss";
1938                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1939                                          SYSC_OMAP2_EMUFREE |
1940                                          SYSC_OMAP2_ENAWAKEUP |
1941                                          SYSC_OMAP2_SOFTRESET |
1942                                          SYSC_OMAP2_AUTOIDLE)>;
1943                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1944                                         <SYSC_IDLE_NO>,
1945                                         <SYSC_IDLE_SMART>;
1946                         ti,syss-mask = <1>;
1947                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1948                         clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 0>;
1949                         clock-names = "fck";
1950                         #address-cells = <1>;
1951                         #size-cells = <1>;
1952                         ranges = <0x0 0x86000 0x1000>;
1953
1954                         timer10: timer@0 {
1955                                 compatible = "ti,omap3430-timer";
1956                                 reg = <0x0 0x80>;
1957                                 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>;
1958                                 clock-names = "fck";
1959                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1960                                 ti,timer-pwm;
1961                         };
1962                 };
1963
1964                 target-module@88000 {                   /* 0x48088000, ap 45 2e.0 */
1965                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1966                         reg = <0x88000 0x4>,
1967                               <0x88010 0x4>;
1968                         reg-names = "rev", "sysc";
1969                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1970                                          SYSC_OMAP4_SOFTRESET)>;
1971                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1972                                         <SYSC_IDLE_NO>,
1973                                         <SYSC_IDLE_SMART>,
1974                                         <SYSC_IDLE_SMART_WKUP>;
1975                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1976                         clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 0>;
1977                         clock-names = "fck";
1978                         #address-cells = <1>;
1979                         #size-cells = <1>;
1980                         ranges = <0x0 0x88000 0x1000>;
1981
1982                         timer11: timer@0 {
1983                                 compatible = "ti,omap4430-timer";
1984                                 reg = <0x0 0x80>;
1985                                 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>;
1986                                 clock-names = "fck";
1987                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1988                                 ti,timer-pwm;
1989                         };
1990                 };
1991
1992                 rng_target: target-module@90000 {       /* 0x48090000, ap 57 2a.0 */
1993                         compatible = "ti,sysc-omap2", "ti,sysc";
1994                         reg = <0x91fe0 0x4>,
1995                               <0x91fe4 0x4>;
1996                         reg-names = "rev", "sysc";
1997                         ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
1998                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1999                                         <SYSC_IDLE_NO>;
2000                         /* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
2001                         clocks = <&l4_secure_clkctrl OMAP4_RNG_CLKCTRL 0>;
2002                         clock-names = "fck";
2003                         #address-cells = <1>;
2004                         #size-cells = <1>;
2005                         ranges = <0x0 0x90000 0x2000>;
2006
2007                         rng: rng@0 {
2008                                 compatible = "ti,omap4-rng";
2009                                 reg = <0x0 0x2000>;
2010                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
2011                         };
2012                 };
2013
2014                 target-module@96000 {                   /* 0x48096000, ap 37 26.0 */
2015                         compatible = "ti,sysc-omap2", "ti,sysc";
2016                         reg = <0x9608c 0x4>;
2017                         reg-names = "sysc";
2018                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2019                                          SYSC_OMAP2_ENAWAKEUP |
2020                                          SYSC_OMAP2_SOFTRESET)>;
2021                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2022                                         <SYSC_IDLE_NO>,
2023                                         <SYSC_IDLE_SMART>;
2024                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2025                         clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 0>;
2026                         clock-names = "fck";
2027                         #address-cells = <1>;
2028                         #size-cells = <1>;
2029                         ranges = <0x0 0x96000 0x1000>;
2030
2031                         mcbsp4: mcbsp@0 {
2032                                 compatible = "ti,omap4-mcbsp";
2033                                 reg = <0x0 0xff>; /* L4 Interconnect */
2034                                 reg-names = "mpu";
2035                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2036                                 interrupt-names = "common";
2037                                 ti,buffer-size = <128>;
2038                                 dmas = <&sdma 31>,
2039                                        <&sdma 32>;
2040                                 dma-names = "tx", "rx";
2041                                 status = "disabled";
2042                         };
2043                 };
2044
2045                 target-module@98000 {                   /* 0x48098000, ap 49 22.0 */
2046                         compatible = "ti,sysc-omap4", "ti,sysc";
2047                         reg = <0x98000 0x4>,
2048                               <0x98010 0x4>;
2049                         reg-names = "rev", "sysc";
2050                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2051                                          SYSC_OMAP4_SOFTRESET)>;
2052                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2053                                         <SYSC_IDLE_NO>,
2054                                         <SYSC_IDLE_SMART>,
2055                                         <SYSC_IDLE_SMART_WKUP>;
2056                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2057                         clocks = <&l4_per_clkctrl OMAP4_MCSPI1_CLKCTRL 0>;
2058                         clock-names = "fck";
2059                         #address-cells = <1>;
2060                         #size-cells = <1>;
2061                         ranges = <0x0 0x98000 0x1000>;
2062
2063                         mcspi1: spi@0 {
2064                                 compatible = "ti,omap4-mcspi";
2065                                 reg = <0x0 0x200>;
2066                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
2067                                 #address-cells = <1>;
2068                                 #size-cells = <0>;
2069                                 ti,spi-num-cs = <4>;
2070                                 dmas = <&sdma 35>,
2071                                        <&sdma 36>,
2072                                        <&sdma 37>,
2073                                        <&sdma 38>,
2074                                        <&sdma 39>,
2075                                        <&sdma 40>,
2076                                        <&sdma 41>,
2077                                        <&sdma 42>;
2078                                 dma-names = "tx0", "rx0", "tx1", "rx1",
2079                                             "tx2", "rx2", "tx3", "rx3";
2080                         };
2081                 };
2082
2083                 target-module@9a000 {                   /* 0x4809a000, ap 51 2c.0 */
2084                         compatible = "ti,sysc-omap4", "ti,sysc";
2085                         reg = <0x9a000 0x4>,
2086                               <0x9a010 0x4>;
2087                         reg-names = "rev", "sysc";
2088                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2089                                          SYSC_OMAP4_SOFTRESET)>;
2090                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2091                                         <SYSC_IDLE_NO>,
2092                                         <SYSC_IDLE_SMART>,
2093                                         <SYSC_IDLE_SMART_WKUP>;
2094                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2095                         clocks = <&l4_per_clkctrl OMAP4_MCSPI2_CLKCTRL 0>;
2096                         clock-names = "fck";
2097                         #address-cells = <1>;
2098                         #size-cells = <1>;
2099                         ranges = <0x0 0x9a000 0x1000>;
2100
2101                         mcspi2: spi@0 {
2102                                 compatible = "ti,omap4-mcspi";
2103                                 reg = <0x0 0x200>;
2104                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
2105                                 #address-cells = <1>;
2106                                 #size-cells = <0>;
2107                                 ti,spi-num-cs = <2>;
2108                                 dmas = <&sdma 43>,
2109                                        <&sdma 44>,
2110                                        <&sdma 45>,
2111                                        <&sdma 46>;
2112                                 dma-names = "tx0", "rx0", "tx1", "rx1";
2113                         };
2114                 };
2115
2116                 target-module@9c000 {                   /* 0x4809c000, ap 53 36.0 */
2117                         compatible = "ti,sysc-omap4", "ti,sysc";
2118                         reg = <0x9c000 0x4>,
2119                               <0x9c010 0x4>;
2120                         reg-names = "rev", "sysc";
2121                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2122                                          SYSC_OMAP4_SOFTRESET)>;
2123                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2124                                         <SYSC_IDLE_NO>,
2125                                         <SYSC_IDLE_SMART>,
2126                                         <SYSC_IDLE_SMART_WKUP>;
2127                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2128                                         <SYSC_IDLE_NO>,
2129                                         <SYSC_IDLE_SMART>,
2130                                         <SYSC_IDLE_SMART_WKUP>;
2131                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2132                         clocks = <&l3_init_clkctrl OMAP4_MMC1_CLKCTRL 0>;
2133                         clock-names = "fck";
2134                         #address-cells = <1>;
2135                         #size-cells = <1>;
2136                         ranges = <0x0 0x9c000 0x1000>;
2137
2138                         mmc1: mmc@0 {
2139                                 compatible = "ti,omap4-hsmmc";
2140                                 reg = <0x0 0x400>;
2141                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
2142                                 ti,dual-volt;
2143                                 ti,needs-special-reset;
2144                                 dmas = <&sdma 61>, <&sdma 62>;
2145                                 dma-names = "tx", "rx";
2146                                 pbias-supply = <&pbias_mmc_reg>;
2147                         };
2148                 };
2149
2150                 target-module@9e000 {                   /* 0x4809e000, ap 55 48.0 */
2151                         compatible = "ti,sysc";
2152                         status = "disabled";
2153                         #address-cells = <1>;
2154                         #size-cells = <1>;
2155                         ranges = <0x0 0x9e000 0x1000>;
2156                 };
2157
2158                 target-module@a2000 {                   /* 0x480a2000, ap 79 3a.0 */
2159                         compatible = "ti,sysc";
2160                         status = "disabled";
2161                         #address-cells = <1>;
2162                         #size-cells = <1>;
2163                         ranges = <0x0 0xa2000 0x1000>;
2164                 };
2165
2166                 target-module@a4000 {                   /* 0x480a4000, ap 59 34.0 */
2167                         compatible = "ti,sysc";
2168                         status = "disabled";
2169                         #address-cells = <1>;
2170                         #size-cells = <1>;
2171                         ranges = <0x00000000 0x000a4000 0x00001000>,
2172                                  <0x00001000 0x000a5000 0x00001000>;
2173                 };
2174
2175                 des_target: target-module@a5000 {       /* 0x480a5000 */
2176                         compatible = "ti,sysc-omap2", "ti,sysc";
2177                         reg = <0xa5030 0x4>,
2178                               <0xa5034 0x4>,
2179                               <0xa5038 0x4>;
2180                         reg-names = "rev", "sysc", "syss";
2181                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2182                                          SYSC_OMAP2_AUTOIDLE)>;
2183                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2184                                         <SYSC_IDLE_NO>,
2185                                         <SYSC_IDLE_SMART>,
2186                                         <SYSC_IDLE_SMART_WKUP>;
2187                         ti,syss-mask = <1>;
2188                         /* Domains (P, C): l4per_pwrdm, l4_secure_clkdm */
2189                         clocks = <&l4_secure_clkctrl OMAP4_DES3DES_CLKCTRL 0>;
2190                         clock-names = "fck";
2191                         #address-cells = <1>;
2192                         #size-cells = <1>;
2193                         ranges = <0 0xa5000 0x00001000>;
2194
2195                         des: des@0 {
2196                                 compatible = "ti,omap4-des";
2197                                 reg = <0 0xa0>;
2198                                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
2199                                 dmas = <&sdma 117>, <&sdma 116>;
2200                                 dma-names = "tx", "rx";
2201                         };
2202                 };
2203
2204                 target-module@a8000 {                   /* 0x480a8000, ap 61 3e.0 */
2205                         compatible = "ti,sysc";
2206                         status = "disabled";
2207                         #address-cells = <1>;
2208                         #size-cells = <1>;
2209                         ranges = <0x0 0xa8000 0x4000>;
2210                 };
2211
2212                 target-module@ad000 {                   /* 0x480ad000, ap 63 50.0 */
2213                         compatible = "ti,sysc-omap4", "ti,sysc";
2214                         reg = <0xad000 0x4>,
2215                               <0xad010 0x4>;
2216                         reg-names = "rev", "sysc";
2217                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2218                                          SYSC_OMAP4_SOFTRESET)>;
2219                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2220                                         <SYSC_IDLE_NO>,
2221                                         <SYSC_IDLE_SMART>,
2222                                         <SYSC_IDLE_SMART_WKUP>;
2223                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2224                                         <SYSC_IDLE_NO>,
2225                                         <SYSC_IDLE_SMART>,
2226                                         <SYSC_IDLE_SMART_WKUP>;
2227                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2228                         clocks = <&l4_per_clkctrl OMAP4_MMC3_CLKCTRL 0>;
2229                         clock-names = "fck";
2230                         #address-cells = <1>;
2231                         #size-cells = <1>;
2232                         ranges = <0x0 0xad000 0x1000>;
2233
2234                         mmc3: mmc@0 {
2235                                 compatible = "ti,omap4-hsmmc";
2236                                 reg = <0x0 0x400>;
2237                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
2238                                 ti,needs-special-reset;
2239                                 dmas = <&sdma 77>, <&sdma 78>;
2240                                 dma-names = "tx", "rx";
2241                         };
2242                 };
2243
2244                 target-module@b0000 {                   /* 0x480b0000, ap 47 40.0 */
2245                         compatible = "ti,sysc";
2246                         status = "disabled";
2247                         #address-cells = <1>;
2248                         #size-cells = <1>;
2249                         ranges = <0x0 0xb0000 0x1000>;
2250                 };
2251
2252                 target-module@b2000 {                   /* 0x480b2000, ap 65 3c.0 */
2253                         compatible = "ti,sysc-omap2", "ti,sysc";
2254                         reg = <0xb2000 0x4>,
2255                               <0xb2014 0x4>,
2256                               <0xb2018 0x4>;
2257                         reg-names = "rev", "sysc", "syss";
2258                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2259                                          SYSC_OMAP2_AUTOIDLE)>;
2260                         ti,syss-mask = <1>;
2261                         ti,no-reset-on-init;
2262                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2263                         clocks = <&l4_per_clkctrl OMAP4_HDQ1W_CLKCTRL 0>;
2264                         clock-names = "fck";
2265                         #address-cells = <1>;
2266                         #size-cells = <1>;
2267                         ranges = <0x0 0xb2000 0x1000>;
2268
2269                         hdqw1w: 1w@0 {
2270                                 compatible = "ti,omap3-1w";
2271                                 reg = <0x0 0x1000>;
2272                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
2273                         };
2274                 };
2275
2276                 target-module@b4000 {                   /* 0x480b4000, ap 67 46.0 */
2277                         compatible = "ti,sysc-omap4", "ti,sysc";
2278                         reg = <0xb4000 0x4>,
2279                               <0xb4010 0x4>;
2280                         reg-names = "rev", "sysc";
2281                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2282                                          SYSC_OMAP4_SOFTRESET)>;
2283                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2284                                         <SYSC_IDLE_NO>,
2285                                         <SYSC_IDLE_SMART>,
2286                                         <SYSC_IDLE_SMART_WKUP>;
2287                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2288                                         <SYSC_IDLE_NO>,
2289                                         <SYSC_IDLE_SMART>,
2290                                         <SYSC_IDLE_SMART_WKUP>;
2291                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2292                         clocks = <&l3_init_clkctrl OMAP4_MMC2_CLKCTRL 0>;
2293                         clock-names = "fck";
2294                         #address-cells = <1>;
2295                         #size-cells = <1>;
2296                         ranges = <0x0 0xb4000 0x1000>;
2297
2298                         mmc2: mmc@0 {
2299                                 compatible = "ti,omap4-hsmmc";
2300                                 reg = <0x0 0x400>;
2301                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2302                                 ti,needs-special-reset;
2303                                 dmas = <&sdma 47>, <&sdma 48>;
2304                                 dma-names = "tx", "rx";
2305                         };
2306                 };
2307
2308                 target-module@b8000 {                   /* 0x480b8000, ap 69 58.0 */
2309                         compatible = "ti,sysc-omap4", "ti,sysc";
2310                         reg = <0xb8000 0x4>,
2311                               <0xb8010 0x4>;
2312                         reg-names = "rev", "sysc";
2313                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2314                                          SYSC_OMAP4_SOFTRESET)>;
2315                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2316                                         <SYSC_IDLE_NO>,
2317                                         <SYSC_IDLE_SMART>,
2318                                         <SYSC_IDLE_SMART_WKUP>;
2319                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2320                         clocks = <&l4_per_clkctrl OMAP4_MCSPI3_CLKCTRL 0>;
2321                         clock-names = "fck";
2322                         #address-cells = <1>;
2323                         #size-cells = <1>;
2324                         ranges = <0x0 0xb8000 0x1000>;
2325
2326                         mcspi3: spi@0 {
2327                                 compatible = "ti,omap4-mcspi";
2328                                 reg = <0x0 0x200>;
2329                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2330                                 #address-cells = <1>;
2331                                 #size-cells = <0>;
2332                                 ti,spi-num-cs = <2>;
2333                                 dmas = <&sdma 15>, <&sdma 16>;
2334                                 dma-names = "tx0", "rx0";
2335                         };
2336                 };
2337
2338                 target-module@ba000 {                   /* 0x480ba000, ap 71 32.0 */
2339                         compatible = "ti,sysc-omap4", "ti,sysc";
2340                         reg = <0xba000 0x4>,
2341                               <0xba010 0x4>;
2342                         reg-names = "rev", "sysc";
2343                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2344                                          SYSC_OMAP4_SOFTRESET)>;
2345                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2346                                         <SYSC_IDLE_NO>,
2347                                         <SYSC_IDLE_SMART>,
2348                                         <SYSC_IDLE_SMART_WKUP>;
2349                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2350                         clocks = <&l4_per_clkctrl OMAP4_MCSPI4_CLKCTRL 0>;
2351                         clock-names = "fck";
2352                         #address-cells = <1>;
2353                         #size-cells = <1>;
2354                         ranges = <0x0 0xba000 0x1000>;
2355
2356                         mcspi4: spi@0 {
2357                                 compatible = "ti,omap4-mcspi";
2358                                 reg = <0x0 0x200>;
2359                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2360                                 #address-cells = <1>;
2361                                 #size-cells = <0>;
2362                                 ti,spi-num-cs = <1>;
2363                                 dmas = <&sdma 70>, <&sdma 71>;
2364                                 dma-names = "tx0", "rx0";
2365                         };
2366                 };
2367
2368                 target-module@d1000 {                   /* 0x480d1000, ap 73 44.0 */
2369                         compatible = "ti,sysc-omap4", "ti,sysc";
2370                         reg = <0xd1000 0x4>,
2371                               <0xd1010 0x4>;
2372                         reg-names = "rev", "sysc";
2373                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2374                                          SYSC_OMAP4_SOFTRESET)>;
2375                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2376                                         <SYSC_IDLE_NO>,
2377                                         <SYSC_IDLE_SMART>,
2378                                         <SYSC_IDLE_SMART_WKUP>;
2379                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2380                                         <SYSC_IDLE_NO>,
2381                                         <SYSC_IDLE_SMART>,
2382                                         <SYSC_IDLE_SMART_WKUP>;
2383                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2384                         clocks = <&l4_per_clkctrl OMAP4_MMC4_CLKCTRL 0>;
2385                         clock-names = "fck";
2386                         #address-cells = <1>;
2387                         #size-cells = <1>;
2388                         ranges = <0x0 0xd1000 0x1000>;
2389
2390                         mmc4: mmc@0 {
2391                                 compatible = "ti,omap4-hsmmc";
2392                                 reg = <0x0 0x400>;
2393                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2394                                 ti,needs-special-reset;
2395                                 dmas = <&sdma 57>, <&sdma 58>;
2396                                 dma-names = "tx", "rx";
2397                         };
2398                 };
2399
2400                 target-module@d5000 {                   /* 0x480d5000, ap 75 4e.0 */
2401                         compatible = "ti,sysc-omap4", "ti,sysc";
2402                         reg = <0xd5000 0x4>,
2403                               <0xd5010 0x4>;
2404                         reg-names = "rev", "sysc";
2405                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2406                                          SYSC_OMAP4_SOFTRESET)>;
2407                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2408                                         <SYSC_IDLE_NO>,
2409                                         <SYSC_IDLE_SMART>,
2410                                         <SYSC_IDLE_SMART_WKUP>;
2411                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2412                                         <SYSC_IDLE_NO>,
2413                                         <SYSC_IDLE_SMART>,
2414                                         <SYSC_IDLE_SMART_WKUP>;
2415                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2416                         clocks = <&l4_per_clkctrl OMAP4_MMC5_CLKCTRL 0>;
2417                         clock-names = "fck";
2418                         #address-cells = <1>;
2419                         #size-cells = <1>;
2420                         ranges = <0x0 0xd5000 0x1000>;
2421
2422                         mmc5: mmc@0 {
2423                                 compatible = "ti,omap4-hsmmc";
2424                                 reg = <0x0 0x400>;
2425                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2426                                 ti,needs-special-reset;
2427                                 dmas = <&sdma 59>, <&sdma 60>;
2428                                 dma-names = "tx", "rx";
2429                         };
2430                 };
2431         };
2432
2433         segment@200000 {                                        /* 0x48200000 */
2434                 compatible = "simple-bus";
2435                 #address-cells = <1>;
2436                 #size-cells = <1>;
2437                 ranges = <0x00150000 0x00350000 0x001000>,      /* ap 77 */
2438                          <0x00151000 0x00351000 0x001000>;      /* ap 78 */
2439
2440                 target-module@150000 {                  /* 0x48350000, ap 77 4c.0 */
2441                         compatible = "ti,sysc-omap2", "ti,sysc";
2442                         reg = <0x150000 0x8>,
2443                               <0x150010 0x8>,
2444                               <0x150090 0x8>;
2445                         reg-names = "rev", "sysc", "syss";
2446                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2447                                          SYSC_OMAP2_ENAWAKEUP |
2448                                          SYSC_OMAP2_SOFTRESET |
2449                                          SYSC_OMAP2_AUTOIDLE)>;
2450                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2451                                         <SYSC_IDLE_NO>,
2452                                         <SYSC_IDLE_SMART>,
2453                                         <SYSC_IDLE_SMART_WKUP>;
2454                         ti,syss-mask = <1>;
2455                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2456                         clocks = <&l4_per_clkctrl OMAP4_I2C4_CLKCTRL 0>;
2457                         clock-names = "fck";
2458                         #address-cells = <1>;
2459                         #size-cells = <1>;
2460                         ranges = <0x0 0x150000 0x1000>;
2461
2462                         i2c4: i2c@0 {
2463                                 compatible = "ti,omap4-i2c";
2464                                 reg = <0x0 0x100>;
2465                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
2466                                 #address-cells = <1>;
2467                                 #size-cells = <0>;
2468                         };
2469                 };
2470         };
2471 };
2472