src/arm/r8a7793.dtsi

   1 /*
   2  * Device Tree Source for the r8a7793 SoC
   3  *
   4  * Copyright (C) 2014-2015 Renesas Electronics Corporation
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14 #include <dt-bindings/power/r8a7793-sysc.h>
  15
  16 / {
  17         compatible = "renesas,r8a7793";
  18         interrupt-parent = <&gic>;
  19         #address-cells = <2>;
  20         #size-cells = <2>;
  21
  22         aliases {
  23                 i2c0 = &i2c0;
  24                 i2c1 = &i2c1;
  25                 i2c2 = &i2c2;
  26                 i2c3 = &i2c3;
  27                 i2c4 = &i2c4;
  28                 i2c5 = &i2c5;
  29                 i2c6 = &i2c6;
  30                 i2c7 = &i2c7;
  31                 i2c8 = &i2c8;
  32                 spi0 = &qspi;
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38                 enable-method = "renesas,apmu";
  39
  40                 cpu0: cpu@0 {
  41                         device_type = "cpu";
  42                         compatible = "arm,cortex-a15";
  43                         reg = <0>;
  44                         clock-frequency = <1500000000>;
  45                         voltage-tolerance = <1>; /* 1% */
  46                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  47                         clock-latency = <300000>; /* 300 us */
  48                         power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
  49
  50                         /* kHz - uV - OPPs unknown yet */
  51                         operating-points = <1500000 1000000>,
  52                                            <1312500 1000000>,
  53                                            <1125000 1000000>,
  54                                            < 937500 1000000>,
  55                                            < 750000 1000000>,
  56                                            < 375000 1000000>;
  57                         next-level-cache = <&L2_CA15>;
  58                 };
  59
  60                 cpu1: cpu@1 {
  61                         device_type = "cpu";
  62                         compatible = "arm,cortex-a15";
  63                         reg = <1>;
  64                         clock-frequency = <1500000000>;
  65                         clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
  66                         power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
  67                 };
  68
  69                 L2_CA15: cache-controller-0 {
  70                         compatible = "cache";
  71                         power-domains = <&sysc R8A7793_PD_CA15_SCU>;
  72                         cache-unified;
  73                         cache-level = <2>;
  74                 };
  75         };
  76
  77         apmu@e6152000 {
  78                 compatible = "renesas,r8a7793-apmu", "renesas,apmu";
  79                 reg = <0 0xe6152000 0 0x188>;
  80                 cpus = <&cpu0 &cpu1>;
  81         };
  82
  83         thermal-zones {
  84                 cpu_thermal: cpu-thermal {
  85                         polling-delay-passive   = <0>;
  86                         polling-delay           = <0>;
  87
  88                         thermal-sensors = <&thermal>;
  89
  90                         trips {
  91                                 cpu-crit {
  92                                         temperature     = <95000>;
  93                                         hysteresis      = <0>;
  94                                         type            = "critical";
  95                                 };
  96                         };
  97                         cooling-maps {
  98                         };
  99                 };
 100         };
 101
 102         gic: interrupt-controller@f1001000 {
 103                 compatible = "arm,gic-400";
 104                 #interrupt-cells = <3>;
 105                 #address-cells = <0>;
 106                 interrupt-controller;
 107                 reg = <0 0xf1001000 0 0x1000>,
 108                         <0 0xf1002000 0 0x2000>,
 109                         <0 0xf1004000 0 0x2000>,
 110                         <0 0xf1006000 0 0x2000>;
 111                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 112                 clocks = <&cpg CPG_MOD 408>;
 113                 clock-names = "clk";
 114                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 115                 resets = <&cpg 408>;
 116         };
 117
 118         gpio0: gpio@e6050000 {
 119                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 120                 reg = <0 0xe6050000 0 0x50>;
 121                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 122                 #gpio-cells = <2>;
 123                 gpio-controller;
 124                 gpio-ranges = <&pfc 0 0 32>;
 125                 #interrupt-cells = <2>;
 126                 interrupt-controller;
 127                 clocks = <&cpg CPG_MOD 912>;
 128                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 129                 resets = <&cpg 912>;
 130         };
 131
 132         gpio1: gpio@e6051000 {
 133                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 134                 reg = <0 0xe6051000 0 0x50>;
 135                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 136                 #gpio-cells = <2>;
 137                 gpio-controller;
 138                 gpio-ranges = <&pfc 0 32 26>;
 139                 #interrupt-cells = <2>;
 140                 interrupt-controller;
 141                 clocks = <&cpg CPG_MOD 911>;
 142                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 143                 resets = <&cpg 911>;
 144         };
 145
 146         gpio2: gpio@e6052000 {
 147                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 148                 reg = <0 0xe6052000 0 0x50>;
 149                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 150                 #gpio-cells = <2>;
 151                 gpio-controller;
 152                 gpio-ranges = <&pfc 0 64 32>;
 153                 #interrupt-cells = <2>;
 154                 interrupt-controller;
 155                 clocks = <&cpg CPG_MOD 910>;
 156                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 157                 resets = <&cpg 910>;
 158         };
 159
 160         gpio3: gpio@e6053000 {
 161                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 162                 reg = <0 0xe6053000 0 0x50>;
 163                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 164                 #gpio-cells = <2>;
 165                 gpio-controller;
 166                 gpio-ranges = <&pfc 0 96 32>;
 167                 #interrupt-cells = <2>;
 168                 interrupt-controller;
 169                 clocks = <&cpg CPG_MOD 909>;
 170                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 171                 resets = <&cpg 909>;
 172         };
 173
 174         gpio4: gpio@e6054000 {
 175                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 176                 reg = <0 0xe6054000 0 0x50>;
 177                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 178                 #gpio-cells = <2>;
 179                 gpio-controller;
 180                 gpio-ranges = <&pfc 0 128 32>;
 181                 #interrupt-cells = <2>;
 182                 interrupt-controller;
 183                 clocks = <&cpg CPG_MOD 908>;
 184                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 185                 resets = <&cpg 908>;
 186         };
 187
 188         gpio5: gpio@e6055000 {
 189                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 190                 reg = <0 0xe6055000 0 0x50>;
 191                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 192                 #gpio-cells = <2>;
 193                 gpio-controller;
 194                 gpio-ranges = <&pfc 0 160 32>;
 195                 #interrupt-cells = <2>;
 196                 interrupt-controller;
 197                 clocks = <&cpg CPG_MOD 907>;
 198                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 199                 resets = <&cpg 907>;
 200         };
 201
 202         gpio6: gpio@e6055400 {
 203                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 204                 reg = <0 0xe6055400 0 0x50>;
 205                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 206                 #gpio-cells = <2>;
 207                 gpio-controller;
 208                 gpio-ranges = <&pfc 0 192 32>;
 209                 #interrupt-cells = <2>;
 210                 interrupt-controller;
 211                 clocks = <&cpg CPG_MOD 905>;
 212                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 213                 resets = <&cpg 905>;
 214         };
 215
 216         gpio7: gpio@e6055800 {
 217                 compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio";
 218                 reg = <0 0xe6055800 0 0x50>;
 219                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 220                 #gpio-cells = <2>;
 221                 gpio-controller;
 222                 gpio-ranges = <&pfc 0 224 26>;
 223                 #interrupt-cells = <2>;
 224                 interrupt-controller;
 225                 clocks = <&cpg CPG_MOD 904>;
 226                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 227                 resets = <&cpg 904>;
 228         };
 229
 230         thermal: thermal@e61f0000 {
 231                 compatible =    "renesas,thermal-r8a7793",
 232                                 "renesas,rcar-gen2-thermal",
 233                                 "renesas,rcar-thermal";
 234                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
 235                 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 236                 clocks = <&cpg CPG_MOD 522>;
 237                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 238                 resets = <&cpg 522>;
 239                 #thermal-sensor-cells = <0>;
 240         };
 241
 242         timer {
 243                 compatible = "arm,armv7-timer";
 244                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 245                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 246                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 247                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
 248         };
 249
 250         cmt0: timer@ffca0000 {
 251                 compatible = "renesas,r8a7793-cmt0", "renesas,rcar-gen2-cmt0";
 252                 reg = <0 0xffca0000 0 0x1004>;
 253                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 254                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 255                 clocks = <&cpg CPG_MOD 124>;
 256                 clock-names = "fck";
 257                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 258                 resets = <&cpg 124>;
 259
 260                 status = "disabled";
 261         };
 262
 263         cmt1: timer@e6130000 {
 264                 compatible = "renesas,r8a7793-cmt1", "renesas,rcar-gen2-cmt1";
 265                 reg = <0 0xe6130000 0 0x1004>;
 266                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 267                              <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 268                              <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 269                              <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 270                              <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 271                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 272                              <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 273                              <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 274                 clocks = <&cpg CPG_MOD 329>;
 275                 clock-names = "fck";
 276                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 277                 resets = <&cpg 329>;
 278
 279                 status = "disabled";
 280         };
 281
 282         irqc0: interrupt-controller@e61c0000 {
 283                 compatible = "renesas,irqc-r8a7793", "renesas,irqc";
 284                 #interrupt-cells = <2>;
 285                 interrupt-controller;
 286                 reg = <0 0xe61c0000 0 0x200>;
 287                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 288                              <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 289                              <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 290                              <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 291                              <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 292                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 293                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 294                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 295                              <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 296                              <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 297                 clocks = <&cpg CPG_MOD 407>;
 298                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 299                 resets = <&cpg 407>;
 300         };
 301
 302         dmac0: dma-controller@e6700000 {
 303                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 304                 reg = <0 0xe6700000 0 0x20000>;
 305                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 306                               GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 307                               GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 308                               GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 309                               GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 310                               GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 311                               GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 312                               GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 313                               GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 314                               GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 315                               GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 316                               GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 317                               GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 318                               GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 319                               GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 320                               GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 321                 interrupt-names = "error",
 322                                 "ch0", "ch1", "ch2", "ch3",
 323                                 "ch4", "ch5", "ch6", "ch7",
 324                                 "ch8", "ch9", "ch10", "ch11",
 325                                 "ch12", "ch13", "ch14";
 326                 clocks = <&cpg CPG_MOD 219>;
 327                 clock-names = "fck";
 328                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 329                 resets = <&cpg 219>;
 330                 #dma-cells = <1>;
 331                 dma-channels = <15>;
 332         };
 333
 334         dmac1: dma-controller@e6720000 {
 335                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 336                 reg = <0 0xe6720000 0 0x20000>;
 337                 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 338                               GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 339                               GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 340                               GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 341                               GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 342                               GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 343                               GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 344                               GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 345                               GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 346                               GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 347                               GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 348                               GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 349                               GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 350                               GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 351                               GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 352                               GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 353                 interrupt-names = "error",
 354                                 "ch0", "ch1", "ch2", "ch3",
 355                                 "ch4", "ch5", "ch6", "ch7",
 356                                 "ch8", "ch9", "ch10", "ch11",
 357                                 "ch12", "ch13", "ch14";
 358                 clocks = <&cpg CPG_MOD 218>;
 359                 clock-names = "fck";
 360                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 361                 resets = <&cpg 218>;
 362                 #dma-cells = <1>;
 363                 dma-channels = <15>;
 364         };
 365
 366         audma0: dma-controller@ec700000 {
 367                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 368                 reg = <0 0xec700000 0 0x10000>;
 369                 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 370                               GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 371                               GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 372                               GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 373                               GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 374                               GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 375                               GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 376                               GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 377                               GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 378                               GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 379                               GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 380                               GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 381                               GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 382                               GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 383                 interrupt-names = "error",
 384                                 "ch0", "ch1", "ch2", "ch3",
 385                                 "ch4", "ch5", "ch6", "ch7",
 386                                 "ch8", "ch9", "ch10", "ch11",
 387                                 "ch12";
 388                 clocks = <&cpg CPG_MOD 502>;
 389                 clock-names = "fck";
 390                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 391                 resets = <&cpg 502>;
 392                 #dma-cells = <1>;
 393                 dma-channels = <13>;
 394         };
 395
 396         audma1: dma-controller@ec720000 {
 397                 compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac";
 398                 reg = <0 0xec720000 0 0x10000>;
 399                 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 400                               GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 401                               GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 402                               GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
 403                               GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 404                               GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 405                               GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 406                               GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 407                               GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 408                               GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 409                               GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 410                               GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 411                               GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 412                               GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
 413                 interrupt-names = "error",
 414                                 "ch0", "ch1", "ch2", "ch3",
 415                                 "ch4", "ch5", "ch6", "ch7",
 416                                 "ch8", "ch9", "ch10", "ch11",
 417                                 "ch12";
 418                 clocks = <&cpg CPG_MOD 501>;
 419                 clock-names = "fck";
 420                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 421                 resets = <&cpg 501>;
 422                 #dma-cells = <1>;
 423                 dma-channels = <13>;
 424         };
 425
 426         /* The memory map in the User's Manual maps the cores to bus numbers */
 427         i2c0: i2c@e6508000 {
 428                 #address-cells = <1>;
 429                 #size-cells = <0>;
 430                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 431                 reg = <0 0xe6508000 0 0x40>;
 432                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 433                 clocks = <&cpg CPG_MOD 931>;
 434                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 435                 resets = <&cpg 931>;
 436                 i2c-scl-internal-delay-ns = <6>;
 437                 status = "disabled";
 438         };
 439
 440         i2c1: i2c@e6518000 {
 441                 #address-cells = <1>;
 442                 #size-cells = <0>;
 443                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 444                 reg = <0 0xe6518000 0 0x40>;
 445                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 446                 clocks = <&cpg CPG_MOD 930>;
 447                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 448                 resets = <&cpg 930>;
 449                 i2c-scl-internal-delay-ns = <6>;
 450                 status = "disabled";
 451         };
 452
 453         i2c2: i2c@e6530000 {
 454                 #address-cells = <1>;
 455                 #size-cells = <0>;
 456                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 457                 reg = <0 0xe6530000 0 0x40>;
 458                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 459                 clocks = <&cpg CPG_MOD 929>;
 460                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 461                 resets = <&cpg 929>;
 462                 i2c-scl-internal-delay-ns = <6>;
 463                 status = "disabled";
 464         };
 465
 466         i2c3: i2c@e6540000 {
 467                 #address-cells = <1>;
 468                 #size-cells = <0>;
 469                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 470                 reg = <0 0xe6540000 0 0x40>;
 471                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 472                 clocks = <&cpg CPG_MOD 928>;
 473                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 474                 resets = <&cpg 928>;
 475                 i2c-scl-internal-delay-ns = <6>;
 476                 status = "disabled";
 477         };
 478
 479         i2c4: i2c@e6520000 {
 480                 #address-cells = <1>;
 481                 #size-cells = <0>;
 482                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 483                 reg = <0 0xe6520000 0 0x40>;
 484                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 485                 clocks = <&cpg CPG_MOD 927>;
 486                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 487                 resets = <&cpg 927>;
 488                 i2c-scl-internal-delay-ns = <6>;
 489                 status = "disabled";
 490         };
 491
 492         i2c5: i2c@e6528000 {
 493                 /* doesn't need pinmux */
 494                 #address-cells = <1>;
 495                 #size-cells = <0>;
 496                 compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
 497                 reg = <0 0xe6528000 0 0x40>;
 498                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 499                 clocks = <&cpg CPG_MOD 925>;
 500                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 501                 resets = <&cpg 925>;
 502                 i2c-scl-internal-delay-ns = <110>;
 503                 status = "disabled";
 504         };
 505
 506         i2c6: i2c@e60b0000 {
 507                 /* doesn't need pinmux */
 508                 #address-cells = <1>;
 509                 #size-cells = <0>;
 510                 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
 511                              "renesas,rmobile-iic";
 512                 reg = <0 0xe60b0000 0 0x425>;
 513                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 514                 clocks = <&cpg CPG_MOD 926>;
 515                 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 516                        <&dmac1 0x77>, <&dmac1 0x78>;
 517                 dma-names = "tx", "rx", "tx", "rx";
 518                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 519                 resets = <&cpg 926>;
 520                 status = "disabled";
 521         };
 522
 523         i2c7: i2c@e6500000 {
 524                 #address-cells = <1>;
 525                 #size-cells = <0>;
 526                 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
 527                              "renesas,rmobile-iic";
 528                 reg = <0 0xe6500000 0 0x425>;
 529                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 530                 clocks = <&cpg CPG_MOD 318>;
 531                 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 532                        <&dmac1 0x61>, <&dmac1 0x62>;
 533                 dma-names = "tx", "rx", "tx", "rx";
 534                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 535                 resets = <&cpg 318>;
 536                 status = "disabled";
 537         };
 538
 539         i2c8: i2c@e6510000 {
 540                 #address-cells = <1>;
 541                 #size-cells = <0>;
 542                 compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
 543                              "renesas,rmobile-iic";
 544                 reg = <0 0xe6510000 0 0x425>;
 545                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 546                 clocks = <&cpg CPG_MOD 323>;
 547                 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 548                        <&dmac1 0x65>, <&dmac1 0x66>;
 549                 dma-names = "tx", "rx", "tx", "rx";
 550                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 551                 resets = <&cpg 323>;
 552                 status = "disabled";
 553         };
 554
 555         pfc: pin-controller@e6060000 {
 556                 compatible = "renesas,pfc-r8a7793";
 557                 reg = <0 0xe6060000 0 0x250>;
 558         };
 559
 560         sdhi0: sd@ee100000 {
 561                 compatible = "renesas,sdhi-r8a7793",
 562                              "renesas,rcar-gen2-sdhi";
 563                 reg = <0 0xee100000 0 0x328>;
 564                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 565                 clocks = <&cpg CPG_MOD 314>;
 566                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 567                        <&dmac1 0xcd>, <&dmac1 0xce>;
 568                 dma-names = "tx", "rx", "tx", "rx";
 569                 max-frequency = <195000000>;
 570                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 571                 resets = <&cpg 314>;
 572                 status = "disabled";
 573         };
 574
 575         sdhi1: sd@ee140000 {
 576                 compatible = "renesas,sdhi-r8a7793",
 577                              "renesas,rcar-gen2-sdhi";
 578                 reg = <0 0xee140000 0 0x100>;
 579                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 580                 clocks = <&cpg CPG_MOD 312>;
 581                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 582                        <&dmac1 0xc1>, <&dmac1 0xc2>;
 583                 dma-names = "tx", "rx", "tx", "rx";
 584                 max-frequency = <97500000>;
 585                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 586                 resets = <&cpg 312>;
 587                 status = "disabled";
 588         };
 589
 590         sdhi2: sd@ee160000 {
 591                 compatible = "renesas,sdhi-r8a7793",
 592                              "renesas,rcar-gen2-sdhi";
 593                 reg = <0 0xee160000 0 0x100>;
 594                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 595                 clocks = <&cpg CPG_MOD 311>;
 596                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 597                        <&dmac1 0xd3>, <&dmac1 0xd4>;
 598                 dma-names = "tx", "rx", "tx", "rx";
 599                 max-frequency = <97500000>;
 600                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 601                 resets = <&cpg 311>;
 602                 status = "disabled";
 603         };
 604
 605         mmcif0: mmc@ee200000 {
 606                 compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif";
 607                 reg = <0 0xee200000 0 0x80>;
 608                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 609                 clocks = <&cpg CPG_MOD 315>;
 610                 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 611                        <&dmac1 0xd1>, <&dmac1 0xd2>;
 612                 dma-names = "tx", "rx", "tx", "rx";
 613                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 614                 resets = <&cpg 315>;
 615                 reg-io-width = <4>;
 616                 status = "disabled";
 617                 max-frequency = <97500000>;
 618         };
 619
 620         scifa0: serial@e6c40000 {
 621                 compatible = "renesas,scifa-r8a7793",
 622                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 623                 reg = <0 0xe6c40000 0 64>;
 624                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 625                 clocks = <&cpg CPG_MOD 204>;
 626                 clock-names = "fck";
 627                 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 628                        <&dmac1 0x21>, <&dmac1 0x22>;
 629                 dma-names = "tx", "rx", "tx", "rx";
 630                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 631                 resets = <&cpg 204>;
 632                 status = "disabled";
 633         };
 634
 635         scifa1: serial@e6c50000 {
 636                 compatible = "renesas,scifa-r8a7793",
 637                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 638                 reg = <0 0xe6c50000 0 64>;
 639                 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 640                 clocks = <&cpg CPG_MOD 203>;
 641                 clock-names = "fck";
 642                 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 643                        <&dmac1 0x25>, <&dmac1 0x26>;
 644                 dma-names = "tx", "rx", "tx", "rx";
 645                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 646                 resets = <&cpg 203>;
 647                 status = "disabled";
 648         };
 649
 650         scifa2: serial@e6c60000 {
 651                 compatible = "renesas,scifa-r8a7793",
 652                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 653                 reg = <0 0xe6c60000 0 64>;
 654                 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 655                 clocks = <&cpg CPG_MOD 202>;
 656                 clock-names = "fck";
 657                 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 658                        <&dmac1 0x27>, <&dmac1 0x28>;
 659                 dma-names = "tx", "rx", "tx", "rx";
 660                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 661                 resets = <&cpg 202>;
 662                 status = "disabled";
 663         };
 664
 665         scifa3: serial@e6c70000 {
 666                 compatible = "renesas,scifa-r8a7793",
 667                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 668                 reg = <0 0xe6c70000 0 64>;
 669                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 670                 clocks = <&cpg CPG_MOD 1106>;
 671                 clock-names = "fck";
 672                 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 673                        <&dmac1 0x1b>, <&dmac1 0x1c>;
 674                 dma-names = "tx", "rx", "tx", "rx";
 675                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 676                 resets = <&cpg 1106>;
 677                 status = "disabled";
 678         };
 679
 680         scifa4: serial@e6c78000 {
 681                 compatible = "renesas,scifa-r8a7793",
 682                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 683                 reg = <0 0xe6c78000 0 64>;
 684                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 685                 clocks = <&cpg CPG_MOD 1107>;
 686                 clock-names = "fck";
 687                 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 688                        <&dmac1 0x1f>, <&dmac1 0x20>;
 689                 dma-names = "tx", "rx", "tx", "rx";
 690                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 691                 resets = <&cpg 1107>;
 692                 status = "disabled";
 693         };
 694
 695         scifa5: serial@e6c80000 {
 696                 compatible = "renesas,scifa-r8a7793",
 697                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 698                 reg = <0 0xe6c80000 0 64>;
 699                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 700                 clocks = <&cpg CPG_MOD 1108>;
 701                 clock-names = "fck";
 702                 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 703                        <&dmac1 0x23>, <&dmac1 0x24>;
 704                 dma-names = "tx", "rx", "tx", "rx";
 705                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 706                 resets = <&cpg 1108>;
 707                 status = "disabled";
 708         };
 709
 710         scifb0: serial@e6c20000 {
 711                 compatible = "renesas,scifb-r8a7793",
 712                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 713                 reg = <0 0xe6c20000 0 0x100>;
 714                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 715                 clocks = <&cpg CPG_MOD 206>;
 716                 clock-names = "fck";
 717                 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 718                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 719                 dma-names = "tx", "rx", "tx", "rx";
 720                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 721                 resets = <&cpg 206>;
 722                 status = "disabled";
 723         };
 724
 725         scifb1: serial@e6c30000 {
 726                 compatible = "renesas,scifb-r8a7793",
 727                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 728                 reg = <0 0xe6c30000 0 0x100>;
 729                 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 730                 clocks = <&cpg CPG_MOD 207>;
 731                 clock-names = "fck";
 732                 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 733                        <&dmac1 0x19>, <&dmac1 0x1a>;
 734                 dma-names = "tx", "rx", "tx", "rx";
 735                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 736                 resets = <&cpg 207>;
 737                 status = "disabled";
 738         };
 739
 740         scifb2: serial@e6ce0000 {
 741                 compatible = "renesas,scifb-r8a7793",
 742                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 743                 reg = <0 0xe6ce0000 0 0x100>;
 744                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 745                 clocks = <&cpg CPG_MOD 216>;
 746                 clock-names = "fck";
 747                 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 748                        <&dmac1 0x1d>, <&dmac1 0x1e>;
 749                 dma-names = "tx", "rx", "tx", "rx";
 750                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 751                 resets = <&cpg 216>;
 752                 status = "disabled";
 753         };
 754
 755         scif0: serial@e6e60000 {
 756                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 757                              "renesas,scif";
 758                 reg = <0 0xe6e60000 0 64>;
 759                 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 760                 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 761                          <&scif_clk>;
 762                 clock-names = "fck", "brg_int", "scif_clk";
 763                 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 764                        <&dmac1 0x29>, <&dmac1 0x2a>;
 765                 dma-names = "tx", "rx", "tx", "rx";
 766                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 767                 resets = <&cpg 721>;
 768                 status = "disabled";
 769         };
 770
 771         scif1: serial@e6e68000 {
 772                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 773                              "renesas,scif";
 774                 reg = <0 0xe6e68000 0 64>;
 775                 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 776                 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 777                          <&scif_clk>;
 778                 clock-names = "fck", "brg_int", "scif_clk";
 779                 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 780                        <&dmac1 0x2d>, <&dmac1 0x2e>;
 781                 dma-names = "tx", "rx", "tx", "rx";
 782                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 783                 resets = <&cpg 720>;
 784                 status = "disabled";
 785         };
 786
 787         scif2: serial@e6e58000 {
 788                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 789                              "renesas,scif";
 790                 reg = <0 0xe6e58000 0 64>;
 791                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 792                 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 793                          <&scif_clk>;
 794                 clock-names = "fck", "brg_int", "scif_clk";
 795                 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 796                        <&dmac1 0x2b>, <&dmac1 0x2c>;
 797                 dma-names = "tx", "rx", "tx", "rx";
 798                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 799                 resets = <&cpg 719>;
 800                 status = "disabled";
 801         };
 802
 803         scif3: serial@e6ea8000 {
 804                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 805                              "renesas,scif";
 806                 reg = <0 0xe6ea8000 0 64>;
 807                 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 808                 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 809                          <&scif_clk>;
 810                 clock-names = "fck", "brg_int", "scif_clk";
 811                 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 812                        <&dmac1 0x2f>, <&dmac1 0x30>;
 813                 dma-names = "tx", "rx", "tx", "rx";
 814                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 815                 resets = <&cpg 718>;
 816                 status = "disabled";
 817         };
 818
 819         scif4: serial@e6ee0000 {
 820                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 821                              "renesas,scif";
 822                 reg = <0 0xe6ee0000 0 64>;
 823                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 824                 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 825                          <&scif_clk>;
 826                 clock-names = "fck", "brg_int", "scif_clk";
 827                 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 828                        <&dmac1 0xfb>, <&dmac1 0xfc>;
 829                 dma-names = "tx", "rx", "tx", "rx";
 830                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 831                 resets = <&cpg 715>;
 832                 status = "disabled";
 833         };
 834
 835         scif5: serial@e6ee8000 {
 836                 compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif",
 837                              "renesas,scif";
 838                 reg = <0 0xe6ee8000 0 64>;
 839                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 840                 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 841                          <&scif_clk>;
 842                 clock-names = "fck", "brg_int", "scif_clk";
 843                 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 844                        <&dmac1 0xfd>, <&dmac1 0xfe>;
 845                 dma-names = "tx", "rx", "tx", "rx";
 846                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 847                 resets = <&cpg 714>;
 848                 status = "disabled";
 849         };
 850
 851         hscif0: serial@e62c0000 {
 852                 compatible = "renesas,hscif-r8a7793",
 853                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 854                 reg = <0 0xe62c0000 0 96>;
 855                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 856                 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 857                          <&scif_clk>;
 858                 clock-names = "fck", "brg_int", "scif_clk";
 859                 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 860                        <&dmac1 0x39>, <&dmac1 0x3a>;
 861                 dma-names = "tx", "rx", "tx", "rx";
 862                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 863                 resets = <&cpg 717>;
 864                 status = "disabled";
 865         };
 866
 867         hscif1: serial@e62c8000 {
 868                 compatible = "renesas,hscif-r8a7793",
 869                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 870                 reg = <0 0xe62c8000 0 96>;
 871                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 872                 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 873                          <&scif_clk>;
 874                 clock-names = "fck", "brg_int", "scif_clk";
 875                 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 876                        <&dmac1 0x4d>, <&dmac1 0x4e>;
 877                 dma-names = "tx", "rx", "tx", "rx";
 878                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 879                 resets = <&cpg 716>;
 880                 status = "disabled";
 881         };
 882
 883         hscif2: serial@e62d0000 {
 884                 compatible = "renesas,hscif-r8a7793",
 885                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 886                 reg = <0 0xe62d0000 0 96>;
 887                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 888                 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
 889                          <&scif_clk>;
 890                 clock-names = "fck", "brg_int", "scif_clk";
 891                 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 892                        <&dmac1 0x3b>, <&dmac1 0x3c>;
 893                 dma-names = "tx", "rx", "tx", "rx";
 894                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 895                 resets = <&cpg 713>;
 896                 status = "disabled";
 897         };
 898
 899         icram0: sram@e63a0000 {
 900                 compatible = "mmio-sram";
 901                 reg = <0 0xe63a0000 0 0x12000>;
 902         };
 903
 904         icram1: sram@e63c0000 {
 905                 compatible = "mmio-sram";
 906                 reg = <0 0xe63c0000 0 0x1000>;
 907                 #address-cells = <1>;
 908                 #size-cells = <1>;
 909                 ranges = <0 0 0xe63c0000 0x1000>;
 910
 911                 smp-sram@0 {
 912                         compatible = "renesas,smp-sram";
 913                         reg = <0 0x10>;
 914                 };
 915         };
 916
 917         ether: ethernet@ee700000 {
 918                 compatible = "renesas,ether-r8a7793",
 919                              "renesas,rcar-gen2-ether";
 920                 reg = <0 0xee700000 0 0x400>;
 921                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 922                 clocks = <&cpg CPG_MOD 813>;
 923                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 924                 resets = <&cpg 813>;
 925                 phy-mode = "rmii";
 926                 #address-cells = <1>;
 927                 #size-cells = <0>;
 928                 status = "disabled";
 929         };
 930
 931         vin0: video@e6ef0000 {
 932                 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
 933                 reg = <0 0xe6ef0000 0 0x1000>;
 934                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 935                 clocks = <&cpg CPG_MOD 811>;
 936                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 937                 resets = <&cpg 811>;
 938                 status = "disabled";
 939         };
 940
 941         vin1: video@e6ef1000 {
 942                 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
 943                 reg = <0 0xe6ef1000 0 0x1000>;
 944                 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 945                 clocks = <&cpg CPG_MOD 810>;
 946                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 947                 resets = <&cpg 810>;
 948                 status = "disabled";
 949         };
 950
 951         vin2: video@e6ef2000 {
 952                 compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
 953                 reg = <0 0xe6ef2000 0 0x1000>;
 954                 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
 955                 clocks = <&cpg CPG_MOD 809>;
 956                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 957                 resets = <&cpg 809>;
 958                 status = "disabled";
 959         };
 960
 961         qspi: spi@e6b10000 {
 962                 compatible = "renesas,qspi-r8a7793", "renesas,qspi";
 963                 reg = <0 0xe6b10000 0 0x2c>;
 964                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 965                 clocks = <&cpg CPG_MOD 917>;
 966                 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 967                        <&dmac1 0x17>, <&dmac1 0x18>;
 968                 dma-names = "tx", "rx", "tx", "rx";
 969                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 970                 resets = <&cpg 917>;
 971                 num-cs = <1>;
 972                 #address-cells = <1>;
 973                 #size-cells = <0>;
 974                 status = "disabled";
 975         };
 976
 977         du: display@feb00000 {
 978                 compatible = "renesas,du-r8a7793";
 979                 reg = <0 0xfeb00000 0 0x40000>,
 980                       <0 0xfeb90000 0 0x1c>;
 981                 reg-names = "du", "lvds.0";
 982                 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
 983                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 984                 clocks = <&cpg CPG_MOD 724>,
 985                          <&cpg CPG_MOD 723>,
 986                          <&cpg CPG_MOD 726>;
 987                 clock-names = "du.0", "du.1", "lvds.0";
 988                 status = "disabled";
 989
 990                 ports {
 991                         #address-cells = <1>;
 992                         #size-cells = <0>;
 993
 994                         port@0 {
 995                                 reg = <0>;
 996                                 du_out_rgb: endpoint {
 997                                 };
 998                         };
 999                         port@1 {
1000                                 reg = <1>;
1001                                 du_out_lvds0: endpoint {
1002                                 };
1003                         };
1004                 };
1005         };
1006
1007         can0: can@e6e80000 {
1008                 compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
1009                 reg = <0 0xe6e80000 0 0x1000>;
1010                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1011                 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
1012                          <&can_clk>;
1013                 clock-names = "clkp1", "clkp2", "can_clk";
1014                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1015                 resets = <&cpg 916>;
1016                 status = "disabled";
1017         };
1018
1019         can1: can@e6e88000 {
1020                 compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can";
1021                 reg = <0 0xe6e88000 0 0x1000>;
1022                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1023                 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
1024                          <&can_clk>;
1025                 clock-names = "clkp1", "clkp2", "can_clk";
1026                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1027                 resets = <&cpg 915>;
1028                 status = "disabled";
1029         };
1030
1031         /* External root clock */
1032         extal_clk: extal {
1033                 compatible = "fixed-clock";
1034                 #clock-cells = <0>;
1035                 /* This value must be overridden by the board. */
1036                 clock-frequency = <0>;
1037         };
1038
1039         /*
1040          * The external audio clocks are configured as 0 Hz fixed frequency
1041          * clocks by default.
1042          * Boards that provide audio clocks should override them.
1043          */
1044         audio_clk_a: audio_clk_a {
1045                 compatible = "fixed-clock";
1046                 #clock-cells = <0>;
1047                 clock-frequency = <0>;
1048         };
1049         audio_clk_b: audio_clk_b {
1050                 compatible = "fixed-clock";
1051                 #clock-cells = <0>;
1052                 clock-frequency = <0>;
1053         };
1054         audio_clk_c: audio_clk_c {
1055                 compatible = "fixed-clock";
1056                 #clock-cells = <0>;
1057                 clock-frequency = <0>;
1058         };
1059
1060         /* External USB clock - can be overridden by the board */
1061         usb_extal_clk: usb_extal {
1062                 compatible = "fixed-clock";
1063                 #clock-cells = <0>;
1064                 clock-frequency = <48000000>;
1065         };
1066
1067         /* External CAN clock */
1068         can_clk: can {
1069                 compatible = "fixed-clock";
1070                 #clock-cells = <0>;
1071                 /* This value must be overridden by the board. */
1072                 clock-frequency = <0>;
1073         };
1074
1075         /* External SCIF clock */
1076         scif_clk: scif {
1077                 compatible = "fixed-clock";
1078                 #clock-cells = <0>;
1079                 /* This value must be overridden by the board. */
1080                 clock-frequency = <0>;
1081         };
1082
1083         /* Special CPG clocks */
1084         cpg: clock-controller@e6150000 {
1085                 compatible = "renesas,r8a7793-cpg-mssr";
1086                 reg = <0 0xe6150000 0 0x1000>;
1087                 clocks = <&extal_clk>, <&usb_extal_clk>;
1088                 clock-names = "extal", "usb_extal";
1089                 #clock-cells = <2>;
1090                 #power-domain-cells = <0>;
1091                 #reset-cells = <1>;
1092         };
1093
1094         rst: reset-controller@e6160000 {
1095                 compatible = "renesas,r8a7793-rst";
1096                 reg = <0 0xe6160000 0 0x0100>;
1097         };
1098
1099         prr: chipid@ff000044 {
1100                 compatible = "renesas,prr";
1101                 reg = <0 0xff000044 0 4>;
1102         };
1103
1104         sysc: system-controller@e6180000 {
1105                 compatible = "renesas,r8a7793-sysc";
1106                 reg = <0 0xe6180000 0 0x0200>;
1107                 #power-domain-cells = <1>;
1108         };
1109
1110         ipmmu_sy0: mmu@e6280000 {
1111                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1112                 reg = <0 0xe6280000 0 0x1000>;
1113                 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1114                              <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1115                 #iommu-cells = <1>;
1116                 status = "disabled";
1117         };
1118
1119         ipmmu_sy1: mmu@e6290000 {
1120                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1121                 reg = <0 0xe6290000 0 0x1000>;
1122                 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1123                 #iommu-cells = <1>;
1124                 status = "disabled";
1125         };
1126
1127         ipmmu_ds: mmu@e6740000 {
1128                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1129                 reg = <0 0xe6740000 0 0x1000>;
1130                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1131                              <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1132                 #iommu-cells = <1>;
1133                 status = "disabled";
1134         };
1135
1136         ipmmu_mp: mmu@ec680000 {
1137                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1138                 reg = <0 0xec680000 0 0x1000>;
1139                 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1140                 #iommu-cells = <1>;
1141                 status = "disabled";
1142         };
1143
1144         ipmmu_mx: mmu@fe951000 {
1145                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1146                 reg = <0 0xfe951000 0 0x1000>;
1147                 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1148                              <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1149                 #iommu-cells = <1>;
1150                 status = "disabled";
1151         };
1152
1153         ipmmu_rt: mmu@ffc80000 {
1154                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1155                 reg = <0 0xffc80000 0 0x1000>;
1156                 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1157                 #iommu-cells = <1>;
1158                 status = "disabled";
1159         };
1160
1161         ipmmu_gp: mmu@e62a0000 {
1162                 compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
1163                 reg = <0 0xe62a0000 0 0x1000>;
1164                 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1165                              <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1166                 #iommu-cells = <1>;
1167                 status = "disabled";
1168         };
1169
1170         rcar_sound: sound@ec500000 {
1171                 /*
1172                  * #sound-dai-cells is required
1173                  *
1174                  * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1175                  * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1176                  */
1177                 compatible =  "renesas,rcar_sound-r8a7793", "renesas,rcar_sound-gen2";
1178                 reg =   <0 0xec500000 0 0x1000>, /* SCU */
1179                         <0 0xec5a0000 0 0x100>,  /* ADG */
1180                         <0 0xec540000 0 0x1000>, /* SSIU */
1181                         <0 0xec541000 0 0x280>,  /* SSI */
1182                         <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1183                 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1184
1185                 clocks = <&cpg CPG_MOD 1005>,
1186                          <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1187                          <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1188                          <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1189                          <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1190                          <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1191                          <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1192                          <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1193                          <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1194                          <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1195                          <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1196                          <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1197                          <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1198                          <&cpg CPG_CORE R8A7793_CLK_M2>;
1199                 clock-names = "ssi-all",
1200                                 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1201                                 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1202                                 "src.9", "src.8", "src.7", "src.6", "src.5",
1203                                 "src.4", "src.3", "src.2", "src.1", "src.0",
1204                                 "dvc.0", "dvc.1",
1205                                 "clk_a", "clk_b", "clk_c", "clk_i";
1206                 power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1207                 resets = <&cpg 1005>,
1208                          <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1209                          <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1210                          <&cpg 1014>, <&cpg 1015>;
1211                 reset-names = "ssi-all",
1212                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1213                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1214
1215                 status = "disabled";
1216
1217                 rcar_sound,dvc {
1218                         dvc0: dvc-0 {
1219                                 dmas = <&audma1 0xbc>;
1220                                 dma-names = "tx";
1221                         };
1222                         dvc1: dvc-1 {
1223                                 dmas = <&audma1 0xbe>;
1224                                 dma-names = "tx";
1225                         };
1226                 };
1227
1228                 rcar_sound,src {
1229                         src0: src-0 {
1230                                 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1231                                 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1232                                 dma-names = "rx", "tx";
1233                         };
1234                         src1: src-1 {
1235                                 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1236                                 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1237                                 dma-names = "rx", "tx";
1238                         };
1239                         src2: src-2 {
1240                                 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1241                                 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1242                                 dma-names = "rx", "tx";
1243                         };
1244                         src3: src-3 {
1245                                 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1246                                 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1247                                 dma-names = "rx", "tx";
1248                         };
1249                         src4: src-4 {
1250                                 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1251                                 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1252                                 dma-names = "rx", "tx";
1253                         };
1254                         src5: src-5 {
1255                                 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1256                                 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1257                                 dma-names = "rx", "tx";
1258                         };
1259                         src6: src-6 {
1260                                 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1261                                 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1262                                 dma-names = "rx", "tx";
1263                         };
1264                         src7: src-7 {
1265                                 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1266                                 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1267                                 dma-names = "rx", "tx";
1268                         };
1269                         src8: src-8 {
1270                                 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1271                                 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1272                                 dma-names = "rx", "tx";
1273                         };
1274                         src9: src-9 {
1275                                 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1276                                 dmas = <&audma0 0x97>, <&audma1 0xba>;
1277                                 dma-names = "rx", "tx";
1278                         };
1279                 };
1280
1281                 rcar_sound,ssi {
1282                         ssi0: ssi-0 {
1283                                 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1284                                 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1285                                 dma-names = "rx", "tx", "rxu", "txu";
1286                         };
1287                         ssi1: ssi-1 {
1288                                  interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1289                                 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1290                                 dma-names = "rx", "tx", "rxu", "txu";
1291                         };
1292                         ssi2: ssi-2 {
1293                                 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1294                                 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1295                                 dma-names = "rx", "tx", "rxu", "txu";
1296                         };
1297                         ssi3: ssi-3 {
1298                                 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1299                                 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1300                                 dma-names = "rx", "tx", "rxu", "txu";
1301                         };
1302                         ssi4: ssi-4 {
1303                                 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1304                                 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1305                                 dma-names = "rx", "tx", "rxu", "txu";
1306                         };
1307                         ssi5: ssi-5 {
1308                                 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1309                                 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1310                                 dma-names = "rx", "tx", "rxu", "txu";
1311                         };
1312                         ssi6: ssi-6 {
1313                                 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1314                                 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1315                                 dma-names = "rx", "tx", "rxu", "txu";
1316                         };
1317                         ssi7: ssi-7 {
1318                                 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1319                                 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1320                                 dma-names = "rx", "tx", "rxu", "txu";
1321                         };
1322                         ssi8: ssi-8 {
1323                                 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1324                                 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1325                                 dma-names = "rx", "tx", "rxu", "txu";
1326                         };
1327                         ssi9: ssi-9 {
1328                                 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1329                                 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1330                                 dma-names = "rx", "tx", "rxu", "txu";
1331                         };
1332                 };
1333         };
1334 };