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1 /*
2  * Device Tree Source for the Alt board
3  *
4  * Copyright (C) 2014 Renesas Electronics Corporation
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2.  This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10
11 /dts-v1/;
12 #include "r8a7794.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14
15 / {
16         model = "Alt";
17         compatible = "renesas,alt", "renesas,r8a7794";
18
19         aliases {
20                 serial0 = &scif2;
21                 i2c9 = &gpioi2c1;
22                 i2c10 = &gpioi2c4;
23                 i2c11 = &i2chdmi;
24                 i2c12 = &i2cexio4;
25         };
26
27         chosen {
28                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
29                 stdout-path = "serial0:115200n8";
30         };
31
32         memory@40000000 {
33                 device_type = "memory";
34                 reg = <0 0x40000000 0 0x40000000>;
35         };
36
37         d3_3v: regulator-d3-3v {
38                 compatible = "regulator-fixed";
39                 regulator-name = "D3.3V";
40                 regulator-min-microvolt = <3300000>;
41                 regulator-max-microvolt = <3300000>;
42                 regulator-boot-on;
43                 regulator-always-on;
44         };
45
46         vcc_sdhi0: regulator-vcc-sdhi0 {
47                 compatible = "regulator-fixed";
48
49                 regulator-name = "SDHI0 Vcc";
50                 regulator-min-microvolt = <3300000>;
51                 regulator-max-microvolt = <3300000>;
52
53                 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
54                 enable-active-high;
55         };
56
57         vccq_sdhi0: regulator-vccq-sdhi0 {
58                 compatible = "regulator-gpio";
59
60                 regulator-name = "SDHI0 VccQ";
61                 regulator-min-microvolt = <1800000>;
62                 regulator-max-microvolt = <3300000>;
63
64                 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
65                 gpios-states = <1>;
66                 states = <3300000 1
67                           1800000 0>;
68         };
69
70         vcc_sdhi1: regulator-vcc-sdhi1 {
71                 compatible = "regulator-fixed";
72
73                 regulator-name = "SDHI1 Vcc";
74                 regulator-min-microvolt = <3300000>;
75                 regulator-max-microvolt = <3300000>;
76
77                 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
78                 enable-active-high;
79         };
80
81         vccq_sdhi1: regulator-vccq-sdhi1 {
82                 compatible = "regulator-gpio";
83
84                 regulator-name = "SDHI1 VccQ";
85                 regulator-min-microvolt = <1800000>;
86                 regulator-max-microvolt = <3300000>;
87
88                 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
89                 gpios-states = <1>;
90                 states = <3300000 1
91                           1800000 0>;
92         };
93
94         lbsc {
95                 #address-cells = <1>;
96                 #size-cells = <1>;
97         };
98
99         vga-encoder {
100                 compatible = "adi,adv7123";
101
102                 ports {
103                         #address-cells = <1>;
104                         #size-cells = <0>;
105
106                         port@0 {
107                                 reg = <0>;
108                                 adv7123_in: endpoint {
109                                         remote-endpoint = <&du_out_rgb1>;
110                                 };
111                         };
112                         port@1 {
113                                 reg = <1>;
114                                 adv7123_out: endpoint {
115                                         remote-endpoint = <&vga_in>;
116                                 };
117                         };
118                 };
119         };
120
121         vga {
122                 compatible = "vga-connector";
123
124                 port {
125                         vga_in: endpoint {
126                                 remote-endpoint = <&adv7123_out>;
127                         };
128                 };
129         };
130
131         x2_clk: x2-clock {
132                 compatible = "fixed-clock";
133                 #clock-cells = <0>;
134                 clock-frequency = <74250000>;
135         };
136
137         x13_clk: x13-clock {
138                 compatible = "fixed-clock";
139                 #clock-cells = <0>;
140                 clock-frequency = <148500000>;
141         };
142
143         gpioi2c1: i2c-9 {
144                 #address-cells = <1>;
145                 #size-cells = <0>;
146                 compatible = "i2c-gpio";
147                 status = "disabled";
148                 scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
149                 sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
150         };
151
152         gpioi2c4: i2c-10 {
153                 #address-cells = <1>;
154                 #size-cells = <0>;
155                 compatible = "i2c-gpio";
156                 status = "disabled";
157                 scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
158                 sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
159                 i2c-gpio,delay-us = <5>;
160         };
161
162         /*
163          * A fallback to GPIO is provided for I2C1.
164          */
165         i2chdmi: i2c-11 {
166                 compatible = "i2c-demux-pinctrl";
167                 i2c-parent = <&i2c1>, <&gpioi2c1>;
168                 i2c-bus-name = "i2c-hdmi";
169                 #address-cells = <1>;
170                 #size-cells = <0>;
171
172                 composite-in@20 {
173                         compatible = "adi,adv7180";
174                         reg = <0x20>;
175                         remote = <&vin0>;
176
177                         port {
178                                 adv7180: endpoint {
179                                         bus-width = <8>;
180                                         remote-endpoint = <&vin0ep>;
181                                 };
182                         };
183                 };
184
185                 eeprom@50 {
186                         compatible = "renesas,r1ex24002", "atmel,24c02";
187                         reg = <0x50>;
188                         pagesize = <16>;
189                 };
190         };
191
192         /*
193          * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
194          * A fallback to GPIO is provided.
195          */
196         i2cexio4: i2c-14 {
197                 compatible = "i2c-demux-pinctrl";
198                 i2c-parent = <&i2c4>, <&gpioi2c4>;
199                 i2c-bus-name = "i2c-exio4";
200                 #address-cells = <1>;
201                 #size-cells = <0>;
202         };
203 };
204
205 &du {
206         pinctrl-0 = <&du_pins>;
207         pinctrl-names = "default";
208         status = "okay";
209
210         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
211                  <&x13_clk>, <&x2_clk>;
212         clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
213
214         ports {
215                 port@1 {
216                         endpoint {
217                                 remote-endpoint = <&adv7123_in>;
218                         };
219                 };
220         };
221 };
222
223 &extal_clk {
224         clock-frequency = <20000000>;
225 };
226
227 &pfc {
228         pinctrl-0 = <&scif_clk_pins>;
229         pinctrl-names = "default";
230
231         du_pins: du {
232                 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
233                 function = "du1";
234         };
235
236         scif2_pins: scif2 {
237                 groups = "scif2_data";
238                 function = "scif2";
239         };
240
241         scif_clk_pins: scif_clk {
242                 groups = "scif_clk";
243                 function = "scif_clk";
244         };
245
246         ether_pins: ether {
247                 groups = "eth_link", "eth_mdio", "eth_rmii";
248                 function = "eth";
249         };
250
251         phy1_pins: phy1 {
252                 groups = "intc_irq8";
253                 function = "intc";
254         };
255
256         i2c1_pins: i2c1 {
257                 groups = "i2c1";
258                 function = "i2c1";
259         };
260
261         i2c4_pins: i2c4 {
262                 groups = "i2c4";
263                 function = "i2c4";
264         };
265
266         vin0_pins: vin0 {
267                 groups = "vin0_data8", "vin0_clk";
268                 function = "vin0";
269         };
270
271         mmcif0_pins: mmcif0 {
272                 groups = "mmc_data8", "mmc_ctrl";
273                 function = "mmc";
274         };
275
276         sdhi0_pins: sd0 {
277                 groups = "sdhi0_data4", "sdhi0_ctrl";
278                 function = "sdhi0";
279                 power-source = <3300>;
280         };
281
282         sdhi0_pins_uhs: sd0_uhs {
283                 groups = "sdhi0_data4", "sdhi0_ctrl";
284                 function = "sdhi0";
285                 power-source = <1800>;
286         };
287
288         sdhi1_pins: sd1 {
289                 groups = "sdhi1_data4", "sdhi1_ctrl";
290                 function = "sdhi1";
291                 power-source = <3300>;
292         };
293
294         sdhi1_pins_uhs: sd1_uhs {
295                 groups = "sdhi1_data4", "sdhi1_ctrl";
296                 function = "sdhi1";
297                 power-source = <1800>;
298         };
299 };
300
301 &cmt0 {
302         status = "okay";
303 };
304
305 &pfc {
306         qspi_pins: qspi {
307                 groups = "qspi_ctrl", "qspi_data4";
308                 function = "qspi";
309         };
310 };
311
312 &ether {
313         pinctrl-0 = <&ether_pins &phy1_pins>;
314         pinctrl-names = "default";
315
316         phy-handle = <&phy1>;
317         renesas,ether-link-active-low;
318         status = "okay";
319
320         phy1: ethernet-phy@1 {
321                 reg = <1>;
322                 interrupt-parent = <&irqc0>;
323                 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
324                 micrel,led-mode = <1>;
325         };
326 };
327
328 &mmcif0 {
329         pinctrl-0 = <&mmcif0_pins>;
330         pinctrl-names = "default";
331
332         vmmc-supply = <&d3_3v>;
333         vqmmc-supply = <&d3_3v>;
334         bus-width = <8>;
335         non-removable;
336         status = "okay";
337 };
338
339 &rwdt {
340         timeout-sec = <60>;
341         status = "okay";
342 };
343
344 &sdhi0 {
345         pinctrl-0 = <&sdhi0_pins>;
346         pinctrl-1 = <&sdhi0_pins_uhs>;
347         pinctrl-names = "default", "state_uhs";
348
349         vmmc-supply = <&vcc_sdhi0>;
350         vqmmc-supply = <&vccq_sdhi0>;
351         cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
352         wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
353         sd-uhs-sdr50;
354         sd-uhs-sdr104;
355         status = "okay";
356 };
357
358 &sdhi1 {
359         pinctrl-0 = <&sdhi1_pins>;
360         pinctrl-1 = <&sdhi1_pins_uhs>;
361         pinctrl-names = "default", "state_uhs";
362
363         vmmc-supply = <&vcc_sdhi1>;
364         vqmmc-supply = <&vccq_sdhi1>;
365         cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
366         wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
367         sd-uhs-sdr50;
368         status = "okay";
369 };
370
371 &i2c1 {
372         pinctrl-0 = <&i2c1_pins>;
373         pinctrl-names = "i2c-hdmi";
374
375         clock-frequency = <400000>;
376 };
377
378 &i2c4 {
379         pinctrl-0 = <&i2c4_pins>;
380         pinctrl-names = "i2c-exio4";
381 };
382
383 &vin0 {
384         status = "okay";
385         pinctrl-0 = <&vin0_pins>;
386         pinctrl-names = "default";
387
388         port {
389                 vin0ep: endpoint {
390                         remote-endpoint = <&adv7180>;
391                         bus-width = <8>;
392                 };
393         };
394 };
395
396 &scif2 {
397         pinctrl-0 = <&scif2_pins>;
398         pinctrl-names = "default";
399
400         status = "okay";
401 };
402
403 &scif_clk {
404         clock-frequency = <14745600>;
405 };
406
407 &qspi {
408         pinctrl-0 = <&qspi_pins>;
409         pinctrl-names = "default";
410
411         status = "okay";
412
413         flash@0 {
414                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
415                 reg = <0>;
416                 spi-max-frequency = <30000000>;
417                 spi-tx-bus-width = <4>;
418                 spi-rx-bus-width = <4>;
419                 spi-cpol;
420                 spi-cpha;
421                 m25p,fast-read;
422
423                 partitions {
424                         compatible = "fixed-partitions";
425                         #address-cells = <1>;
426                         #size-cells = <1>;
427
428                         partition@0 {
429                                 label = "loader";
430                                 reg = <0x00000000 0x00040000>;
431                                 read-only;
432                         };
433                         partition@40000 {
434                                 label = "system";
435                                 reg = <0x00040000 0x00040000>;
436                                 read-only;
437                         };
438                         partition@80000 {
439                                 label = "user";
440                                 reg = <0x00080000 0x03f80000>;
441                         };
442                 };
443         };
444 };