src/arm/sama5d2.dtsi

   1 /*
   2  * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
   3  *
   4  *  Copyright (C) 2015 Atmel,
   5  *                2015 Ludovic Desroches <ludovic.desroches@atmel.com>
   6  *
   7  * This file is dual-licensed: you can use it either under the terms
   8  * of the GPL or the X11 license, at your option. Note that this dual
   9  * licensing only applies to this file, and not this project as a
  10  * whole.
  11  *
  12  *  a) This file is free software; you can redistribute it and/or
  13  *     modify it under the terms of the GNU General Public License as
  14  *     published by the Free Software Foundation; either version 2 of the
  15  *     License, or (at your option) any later version.
  16  *
  17  *     This file is distributed in the hope that it will be useful,
  18  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *     GNU General Public License for more details.
  21  *
  22  * Or, alternatively,
  23  *
  24  *  b) Permission is hereby granted, free of charge, to any person
  25  *     obtaining a copy of this software and associated documentation
  26  *     files (the "Software"), to deal in the Software without
  27  *     restriction, including without limitation the rights to use,
  28  *     copy, modify, merge, publish, distribute, sublicense, and/or
  29  *     sell copies of the Software, and to permit persons to whom the
  30  *     Software is furnished to do so, subject to the following
  31  *     conditions:
  32  *
  33  *     The above copyright notice and this permission notice shall be
  34  *     included in all copies or substantial portions of the Software.
  35  *
  36  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  37  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  38  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  39  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  40  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  41  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  42  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  43  *     OTHER DEALINGS IN THE SOFTWARE.
  44  */
  45
  46 #include "skeleton.dtsi"
  47 #include <dt-bindings/dma/at91.h>
  48 #include <dt-bindings/interrupt-controller/irq.h>
  49 #include <dt-bindings/clock/at91.h>
  50 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
  51
  52 / {
  53         model = "Atmel SAMA5D2 family SoC";
  54         compatible = "atmel,sama5d2";
  55         interrupt-parent = <&aic>;
  56
  57         aliases {
  58                 serial0 = &uart1;
  59                 serial1 = &uart3;
  60                 tcb0 = &tcb0;
  61                 tcb1 = &tcb1;
  62                 i2s0 = &i2s0;
  63                 i2s1 = &i2s1;
  64         };
  65
  66         cpus {
  67                 #address-cells = <1>;
  68                 #size-cells = <0>;
  69
  70                 cpu@0 {
  71                         device_type = "cpu";
  72                         compatible = "arm,cortex-a5";
  73                         reg = <0>;
  74                         next-level-cache = <&L2>;
  75                 };
  76         };
  77
  78         pmu {
  79                 compatible = "arm,cortex-a5-pmu";
  80                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
  81         };
  82
  83         etb {
  84                 compatible = "arm,coresight-etb10", "arm,primecell";
  85                 reg = <0x740000 0x1000>;
  86
  87                 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
  88                 clock-names = "apb_pclk";
  89
  90                 in-ports {
  91                         port {
  92                                 etb_in: endpoint {
  93                                         remote-endpoint = <&etm_out>;
  94                                 };
  95                         };
  96                 };
  97         };
  98
  99         etm {
 100                 compatible = "arm,coresight-etm3x", "arm,primecell";
 101                 reg = <0x73C000 0x1000>;
 102
 103                 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
 104                 clock-names = "apb_pclk";
 105
 106                 out-ports {
 107                         port {
 108                                 etm_out: endpoint {
 109                                         remote-endpoint = <&etb_in>;
 110                                 };
 111                         };
 112                 };
 113         };
 114
 115         memory {
 116                 reg = <0x20000000 0x20000000>;
 117         };
 118
 119         clocks {
 120                 slow_xtal: slow_xtal {
 121                         compatible = "fixed-clock";
 122                         #clock-cells = <0>;
 123                         clock-frequency = <0>;
 124                 };
 125
 126                 main_xtal: main_xtal {
 127                         compatible = "fixed-clock";
 128                         #clock-cells = <0>;
 129                         clock-frequency = <0>;
 130                 };
 131         };
 132
 133         ns_sram: sram@200000 {
 134                 compatible = "mmio-sram";
 135                 reg = <0x00200000 0x20000>;
 136         };
 137
 138         ahb {
 139                 compatible = "simple-bus";
 140                 #address-cells = <1>;
 141                 #size-cells = <1>;
 142                 ranges;
 143
 144                 nfc_sram: sram@100000 {
 145                         compatible = "mmio-sram";
 146                         no-memory-wc;
 147                         reg = <0x00100000 0x2400>;
 148                 };
 149
 150                 usb0: gadget@300000 {
 151                         #address-cells = <1>;
 152                         #size-cells = <0>;
 153                         compatible = "atmel,sama5d3-udc";
 154                         reg = <0x00300000 0x100000
 155                                0xfc02c000 0x400>;
 156                         interrupts = <42 IRQ_TYPE_LEVEL_HIGH 2>;
 157                         clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
 158                         clock-names = "pclk", "hclk";
 159                         status = "disabled";
 160
 161                         ep@0 {
 162                                 reg = <0>;
 163                                 atmel,fifo-size = <64>;
 164                                 atmel,nb-banks = <1>;
 165                         };
 166
 167                         ep@1 {
 168                                 reg = <1>;
 169                                 atmel,fifo-size = <1024>;
 170                                 atmel,nb-banks = <3>;
 171                                 atmel,can-dma;
 172                                 atmel,can-isoc;
 173                         };
 174
 175                         ep@2 {
 176                                 reg = <2>;
 177                                 atmel,fifo-size = <1024>;
 178                                 atmel,nb-banks = <3>;
 179                                 atmel,can-dma;
 180                                 atmel,can-isoc;
 181                         };
 182
 183                         ep@3 {
 184                                 reg = <3>;
 185                                 atmel,fifo-size = <1024>;
 186                                 atmel,nb-banks = <2>;
 187                                 atmel,can-dma;
 188                                 atmel,can-isoc;
 189                         };
 190
 191                         ep@4 {
 192                                 reg = <4>;
 193                                 atmel,fifo-size = <1024>;
 194                                 atmel,nb-banks = <2>;
 195                                 atmel,can-dma;
 196                                 atmel,can-isoc;
 197                         };
 198
 199                         ep@5 {
 200                                 reg = <5>;
 201                                 atmel,fifo-size = <1024>;
 202                                 atmel,nb-banks = <2>;
 203                                 atmel,can-dma;
 204                                 atmel,can-isoc;
 205                         };
 206
 207                         ep@6 {
 208                                 reg = <6>;
 209                                 atmel,fifo-size = <1024>;
 210                                 atmel,nb-banks = <2>;
 211                                 atmel,can-dma;
 212                                 atmel,can-isoc;
 213                         };
 214
 215                         ep@7 {
 216                                 reg = <7>;
 217                                 atmel,fifo-size = <1024>;
 218                                 atmel,nb-banks = <2>;
 219                                 atmel,can-dma;
 220                                 atmel,can-isoc;
 221                         };
 222
 223                         ep@8 {
 224                                 reg = <8>;
 225                                 atmel,fifo-size = <1024>;
 226                                 atmel,nb-banks = <2>;
 227                                 atmel,can-isoc;
 228                         };
 229
 230                         ep@9 {
 231                                 reg = <9>;
 232                                 atmel,fifo-size = <1024>;
 233                                 atmel,nb-banks = <2>;
 234                                 atmel,can-isoc;
 235                         };
 236
 237                         ep@10 {
 238                                 reg = <10>;
 239                                 atmel,fifo-size = <1024>;
 240                                 atmel,nb-banks = <2>;
 241                                 atmel,can-isoc;
 242                         };
 243
 244                         ep@11 {
 245                                 reg = <11>;
 246                                 atmel,fifo-size = <1024>;
 247                                 atmel,nb-banks = <2>;
 248                                 atmel,can-isoc;
 249                         };
 250
 251                         ep@12 {
 252                                 reg = <12>;
 253                                 atmel,fifo-size = <1024>;
 254                                 atmel,nb-banks = <2>;
 255                                 atmel,can-isoc;
 256                         };
 257
 258                         ep@13 {
 259                                 reg = <13>;
 260                                 atmel,fifo-size = <1024>;
 261                                 atmel,nb-banks = <2>;
 262                                 atmel,can-isoc;
 263                         };
 264
 265                         ep@14 {
 266                                 reg = <14>;
 267                                 atmel,fifo-size = <1024>;
 268                                 atmel,nb-banks = <2>;
 269                                 atmel,can-isoc;
 270                         };
 271
 272                         ep@15 {
 273                                 reg = <15>;
 274                                 atmel,fifo-size = <1024>;
 275                                 atmel,nb-banks = <2>;
 276                                 atmel,can-isoc;
 277                         };
 278                 };
 279
 280                 usb1: ohci@400000 {
 281                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 282                         reg = <0x00400000 0x100000>;
 283                         interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
 284                         clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_SYSTEM 6>;
 285                         clock-names = "ohci_clk", "hclk", "uhpck";
 286                         status = "disabled";
 287                 };
 288
 289                 usb2: ehci@500000 {
 290                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 291                         reg = <0x00500000 0x100000>;
 292                         interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
 293                         clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 41>;
 294                         clock-names = "usb_clk", "ehci_clk";
 295                         status = "disabled";
 296                 };
 297
 298                 L2: cache-controller@a00000 {
 299                         compatible = "arm,pl310-cache";
 300                         reg = <0x00a00000 0x1000>;
 301                         interrupts = <63 IRQ_TYPE_LEVEL_HIGH 4>;
 302                         cache-unified;
 303                         cache-level = <2>;
 304                 };
 305
 306                 ebi: ebi@10000000 {
 307                         compatible = "atmel,sama5d3-ebi";
 308                         #address-cells = <2>;
 309                         #size-cells = <1>;
 310                         atmel,smc = <&hsmc>;
 311                         reg = <0x10000000 0x10000000
 312                                0x60000000 0x30000000>;
 313                         ranges = <0x0 0x0 0x10000000 0x10000000
 314                                   0x1 0x0 0x60000000 0x10000000
 315                                   0x2 0x0 0x70000000 0x10000000
 316                                   0x3 0x0 0x80000000 0x10000000>;
 317                         clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
 318                         status = "disabled";
 319
 320                         nand_controller: nand-controller {
 321                                 compatible = "atmel,sama5d3-nand-controller";
 322                                 atmel,nfc-sram = <&nfc_sram>;
 323                                 atmel,nfc-io = <&nfc_io>;
 324                                 ecc-engine = <&pmecc>;
 325                                 #address-cells = <2>;
 326                                 #size-cells = <1>;
 327                                 ranges;
 328                                 status = "disabled";
 329                         };
 330                 };
 331
 332                 sdmmc0: sdio-host@a0000000 {
 333                         compatible = "atmel,sama5d2-sdhci";
 334                         reg = <0xa0000000 0x300>;
 335                         interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
 336                         clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
 337                         clock-names = "hclock", "multclk", "baseclk";
 338                         status = "disabled";
 339                 };
 340
 341                 sdmmc1: sdio-host@b0000000 {
 342                         compatible = "atmel,sama5d2-sdhci";
 343                         reg = <0xb0000000 0x300>;
 344                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>;
 345                         clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
 346                         clock-names = "hclock", "multclk", "baseclk";
 347                         status = "disabled";
 348                 };
 349
 350                 nfc_io: nfc-io@c0000000 {
 351                         compatible = "atmel,sama5d3-nfc-io", "syscon";
 352                         reg = <0xc0000000 0x8000000>;
 353                 };
 354
 355                 apb {
 356                         compatible = "simple-bus";
 357                         #address-cells = <1>;
 358                         #size-cells = <1>;
 359                         ranges;
 360
 361                         hlcdc: hlcdc@f0000000 {
 362                                 compatible = "atmel,sama5d2-hlcdc";
 363                                 reg = <0xf0000000 0x2000>;
 364                                 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
 365                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
 366                                 clock-names = "periph_clk","sys_clk", "slow_clk";
 367                                 status = "disabled";
 368
 369                                 hlcdc-display-controller {
 370                                         compatible = "atmel,hlcdc-display-controller";
 371                                         #address-cells = <1>;
 372                                         #size-cells = <0>;
 373
 374                                         port@0 {
 375                                                 #address-cells = <1>;
 376                                                 #size-cells = <0>;
 377                                                 reg = <0>;
 378                                         };
 379                                 };
 380
 381                                 hlcdc_pwm: hlcdc-pwm {
 382                                         compatible = "atmel,hlcdc-pwm";
 383                                         #pwm-cells = <3>;
 384                                 };
 385                         };
 386
 387                         isc: isc@f0008000 {
 388                                 compatible = "atmel,sama5d2-isc";
 389                                 reg = <0xf0008000 0x4000>;
 390                                 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 5>;
 391                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 18>, <&pmc PMC_TYPE_GCK 46>;
 392                                 clock-names = "hclock", "iscck", "gck";
 393                                 #clock-cells = <0>;
 394                                 clock-output-names = "isc-mck";
 395                                 status = "disabled";
 396                         };
 397
 398                         ramc0: ramc@f000c000 {
 399                                 compatible = "atmel,sama5d3-ddramc";
 400                                 reg = <0xf000c000 0x200>;
 401                                 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 13>;
 402                                 clock-names = "ddrck", "mpddr";
 403                         };
 404
 405                         dma0: dma-controller@f0010000 {
 406                                 compatible = "atmel,sama5d4-dma";
 407                                 reg = <0xf0010000 0x1000>;
 408                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
 409                                 #dma-cells = <1>;
 410                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
 411                                 clock-names = "dma_clk";
 412                         };
 413
 414                         /* Place dma1 here despite its address */
 415                         dma1: dma-controller@f0004000 {
 416                                 compatible = "atmel,sama5d4-dma";
 417                                 reg = <0xf0004000 0x1000>;
 418                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 0>;
 419                                 #dma-cells = <1>;
 420                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
 421                                 clock-names = "dma_clk";
 422                         };
 423
 424                         pmc: pmc@f0014000 {
 425                                 compatible = "atmel,sama5d2-pmc", "syscon";
 426                                 reg = <0xf0014000 0x160>;
 427                                 interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
 428                                 #clock-cells = <2>;
 429                                 clocks = <&clk32k>, <&main_xtal>;
 430                                 clock-names = "slow_clk", "main_xtal";
 431                         };
 432
 433                         qspi0: spi@f0020000 {
 434                                 compatible = "atmel,sama5d2-qspi";
 435                                 reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
 436                                 reg-names = "qspi_base", "qspi_mmap";
 437                                 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
 438                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
 439                                 #address-cells = <1>;
 440                                 #size-cells = <0>;
 441                                 status = "disabled";
 442                         };
 443
 444                         qspi1: spi@f0024000 {
 445                                 compatible = "atmel,sama5d2-qspi";
 446                                 reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
 447                                 reg-names = "qspi_base", "qspi_mmap";
 448                                 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 7>;
 449                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
 450                                 #address-cells = <1>;
 451                                 #size-cells = <0>;
 452                                 status = "disabled";
 453                         };
 454
 455                         sha@f0028000 {
 456                                 compatible = "atmel,at91sam9g46-sha";
 457                                 reg = <0xf0028000 0x100>;
 458                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
 459                                 dmas = <&dma0
 460                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 461                                          AT91_XDMAC_DT_PERID(30))>;
 462                                 dma-names = "tx";
 463                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
 464                                 clock-names = "sha_clk";
 465                                 status = "okay";
 466                         };
 467
 468                         aes@f002c000 {
 469                                 compatible = "atmel,at91sam9g46-aes";
 470                                 reg = <0xf002c000 0x100>;
 471                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
 472                                 dmas = <&dma0
 473                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 474                                          AT91_XDMAC_DT_PERID(26))>,
 475                                        <&dma0
 476                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 477                                          AT91_XDMAC_DT_PERID(27))>;
 478                                 dma-names = "tx", "rx";
 479                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
 480                                 clock-names = "aes_clk";
 481                                 status = "okay";
 482                         };
 483
 484                         spi0: spi@f8000000 {
 485                                 compatible = "atmel,at91rm9200-spi";
 486                                 reg = <0xf8000000 0x100>;
 487                                 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
 488                                 dmas = <&dma0
 489                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 490                                          AT91_XDMAC_DT_PERID(6))>,
 491                                        <&dma0
 492                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 493                                          AT91_XDMAC_DT_PERID(7))>;
 494                                 dma-names = "tx", "rx";
 495                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
 496                                 clock-names = "spi_clk";
 497                                 atmel,fifo-size = <16>;
 498                                 #address-cells = <1>;
 499                                 #size-cells = <0>;
 500                                 status = "disabled";
 501                         };
 502
 503                         ssc0: ssc@f8004000 {
 504                                 compatible = "atmel,at91sam9g45-ssc";
 505                                 reg = <0xf8004000 0x4000>;
 506                                 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
 507                                 dmas = <&dma0
 508                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 509                                         AT91_XDMAC_DT_PERID(21))>,
 510                                        <&dma0
 511                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 512                                         AT91_XDMAC_DT_PERID(22))>;
 513                                 dma-names = "tx", "rx";
 514                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
 515                                 clock-names = "pclk";
 516                                 status = "disabled";
 517                         };
 518
 519                         macb0: ethernet@f8008000 {
 520                                 compatible = "atmel,sama5d2-gem";
 521                                 reg = <0xf8008000 0x1000>;
 522                                 interrupts = <5  IRQ_TYPE_LEVEL_HIGH 3          /* Queue 0 */
 523                                               66 IRQ_TYPE_LEVEL_HIGH 3          /* Queue 1 */
 524                                               67 IRQ_TYPE_LEVEL_HIGH 3>;        /* Queue 2 */
 525                                 #address-cells = <1>;
 526                                 #size-cells = <0>;
 527                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&pmc PMC_TYPE_PERIPHERAL 5>;
 528                                 clock-names = "hclk", "pclk";
 529                                 status = "disabled";
 530                         };
 531
 532                         tcb0: timer@f800c000 {
 533                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
 534                                 #address-cells = <1>;
 535                                 #size-cells = <0>;
 536                                 reg = <0xf800c000 0x100>;
 537                                 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
 538                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&clk32k>;
 539                                 clock-names = "t0_clk", "slow_clk";
 540                         };
 541
 542                         tcb1: timer@f8010000 {
 543                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
 544                                 #address-cells = <1>;
 545                                 #size-cells = <0>;
 546                                 reg = <0xf8010000 0x100>;
 547                                 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
 548                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&clk32k>;
 549                                 clock-names = "t0_clk", "slow_clk";
 550                         };
 551
 552                         hsmc: hsmc@f8014000 {
 553                                 compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
 554                                 reg = <0xf8014000 0x1000>;
 555                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
 556                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
 557                                 #address-cells = <1>;
 558                                 #size-cells = <1>;
 559                                 ranges;
 560
 561                                 pmecc: ecc-engine@f8014070 {
 562                                         compatible = "atmel,sama5d2-pmecc";
 563                                         reg = <0xf8014070 0x490>,
 564                                               <0xf8014500 0x100>;
 565                                 };
 566                         };
 567
 568                         pdmic: pdmic@f8018000 {
 569                                 compatible = "atmel,sama5d2-pdmic";
 570                                 reg = <0xf8018000 0x124>;
 571                                 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 7>;
 572                                 dmas = <&dma0
 573                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
 574                                         | AT91_XDMAC_DT_PERID(50))>;
 575                                 dma-names = "rx";
 576                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 48>, <&pmc PMC_TYPE_GCK 48>;
 577                                 clock-names = "pclk", "gclk";
 578                                 status = "disabled";
 579                         };
 580
 581                         uart0: serial@f801c000 {
 582                                 compatible = "atmel,at91sam9260-usart";
 583                                 reg = <0xf801c000 0x100>;
 584                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 7>;
 585                                 dmas = <&dma0
 586                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 587                                          AT91_XDMAC_DT_PERID(35))>,
 588                                        <&dma0
 589                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 590                                          AT91_XDMAC_DT_PERID(36))>;
 591                                 dma-names = "tx", "rx";
 592                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
 593                                 clock-names = "usart";
 594                                 status = "disabled";
 595                         };
 596
 597                         uart1: serial@f8020000 {
 598                                 compatible = "atmel,at91sam9260-usart";
 599                                 reg = <0xf8020000 0x100>;
 600                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 7>;
 601                                 dmas = <&dma0
 602                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 603                                          AT91_XDMAC_DT_PERID(37))>,
 604                                        <&dma0
 605                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 606                                          AT91_XDMAC_DT_PERID(38))>;
 607                                 dma-names = "tx", "rx";
 608                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
 609                                 clock-names = "usart";
 610                                 status = "disabled";
 611                         };
 612
 613                         uart2: serial@f8024000 {
 614                                 compatible = "atmel,at91sam9260-usart";
 615                                 reg = <0xf8024000 0x100>;
 616                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 7>;
 617                                 dmas = <&dma0
 618                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 619                                          AT91_XDMAC_DT_PERID(39))>,
 620                                        <&dma0
 621                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 622                                          AT91_XDMAC_DT_PERID(40))>;
 623                                 dma-names = "tx", "rx";
 624                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
 625                                 clock-names = "usart";
 626                                 status = "disabled";
 627                         };
 628
 629                         i2c0: i2c@f8028000 {
 630                                 compatible = "atmel,sama5d2-i2c";
 631                                 reg = <0xf8028000 0x100>;
 632                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 7>;
 633                                 dmas = <&dma0
 634                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 635                                          AT91_XDMAC_DT_PERID(0))>,
 636                                        <&dma0
 637                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 638                                          AT91_XDMAC_DT_PERID(1))>;
 639                                 dma-names = "tx", "rx";
 640                                 #address-cells = <1>;
 641                                 #size-cells = <0>;
 642                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
 643                                 atmel,fifo-size = <16>;
 644                                 status = "disabled";
 645                         };
 646
 647                         pwm0: pwm@f802c000 {
 648                                 compatible = "atmel,sama5d2-pwm";
 649                                 reg = <0xf802c000 0x4000>;
 650                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 7>;
 651                                 #pwm-cells = <3>;
 652                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
 653                         };
 654
 655                         sfr: sfr@f8030000 {
 656                                 compatible = "atmel,sama5d2-sfr", "syscon";
 657                                 reg = <0xf8030000 0x98>;
 658                         };
 659
 660                         flx0: flexcom@f8034000 {
 661                                 compatible = "atmel,sama5d2-flexcom";
 662                                 reg = <0xf8034000 0x200>;
 663                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
 664                                 #address-cells = <1>;
 665                                 #size-cells = <1>;
 666                                 ranges = <0x0 0xf8034000 0x800>;
 667                                 status = "disabled";
 668                         };
 669
 670                         flx1: flexcom@f8038000 {
 671                                 compatible = "atmel,sama5d2-flexcom";
 672                                 reg = <0xf8038000 0x200>;
 673                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
 674                                 #address-cells = <1>;
 675                                 #size-cells = <1>;
 676                                 ranges = <0x0 0xf8038000 0x800>;
 677                                 status = "disabled";
 678                         };
 679
 680                         securam: sram@f8044000 {
 681                                 compatible = "atmel,sama5d2-securam", "mmio-sram";
 682                                 reg = <0xf8044000 0x1420>;
 683                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>;
 684                                 #address-cells = <1>;
 685                                 #size-cells = <1>;
 686                                 ranges = <0 0xf8044000 0x1420>;
 687                         };
 688
 689                         rstc@f8048000 {
 690                                 compatible = "atmel,sama5d3-rstc";
 691                                 reg = <0xf8048000 0x10>;
 692                                 clocks = <&clk32k>;
 693                         };
 694
 695                         shdwc@f8048010 {
 696                                 compatible = "atmel,sama5d2-shdwc";
 697                                 reg = <0xf8048010 0x10>;
 698                                 clocks = <&clk32k>;
 699                                 #address-cells = <1>;
 700                                 #size-cells = <0>;
 701                                 atmel,wakeup-rtc-timer;
 702                         };
 703
 704                         pit: timer@f8048030 {
 705                                 compatible = "atmel,at91sam9260-pit";
 706                                 reg = <0xf8048030 0x10>;
 707                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
 708                                 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
 709                         };
 710
 711                         watchdog@f8048040 {
 712                                 compatible = "atmel,sama5d4-wdt";
 713                                 reg = <0xf8048040 0x10>;
 714                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
 715                                 clocks = <&clk32k>;
 716                                 status = "disabled";
 717                         };
 718
 719                         clk32k: sckc@f8048050 {
 720                                 compatible = "atmel,sama5d4-sckc";
 721                                 reg = <0xf8048050 0x4>;
 722
 723                                 clocks = <&slow_xtal>;
 724                                 #clock-cells = <0>;
 725                         };
 726
 727                         rtc@f80480b0 {
 728                                 compatible = "atmel,at91rm9200-rtc";
 729                                 reg = <0xf80480b0 0x30>;
 730                                 interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
 731                                 clocks = <&clk32k>;
 732                         };
 733
 734                         i2s0: i2s@f8050000 {
 735                                 compatible = "atmel,sama5d2-i2s";
 736                                 reg = <0xf8050000 0x100>;
 737                                 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
 738                                 dmas = <&dma0
 739                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 740                                          AT91_XDMAC_DT_PERID(31))>,
 741                                        <&dma0
 742                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 743                                          AT91_XDMAC_DT_PERID(32))>;
 744                                 dma-names = "tx", "rx";
 745                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_GCK 54>;
 746                                 clock-names = "pclk", "gclk";
 747                                 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S0_MUX>;
 748                                 assigned-clock-parents = <&pmc PMC_TYPE_GCK 54>;
 749                                 status = "disabled";
 750                         };
 751
 752                         can0: can@f8054000 {
 753                                 compatible = "bosch,m_can";
 754                                 reg = <0xf8054000 0x4000>, <0x210000 0x4000>;
 755                                 reg-names = "m_can", "message_ram";
 756                                 interrupts = <56 IRQ_TYPE_LEVEL_HIGH 7>,
 757                                              <64 IRQ_TYPE_LEVEL_HIGH 7>;
 758                                 interrupt-names = "int0", "int1";
 759                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 56>, <&pmc PMC_TYPE_GCK 56>;
 760                                 clock-names = "hclk", "cclk";
 761                                 assigned-clocks = <&pmc PMC_TYPE_GCK 56>;
 762                                 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
 763                                 assigned-clock-rates = <40000000>;
 764                                 bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
 765                                 status = "disabled";
 766                         };
 767
 768                         spi1: spi@fc000000 {
 769                                 compatible = "atmel,at91rm9200-spi";
 770                                 reg = <0xfc000000 0x100>;
 771                                 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
 772                                 dmas = <&dma0
 773                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 774                                          AT91_XDMAC_DT_PERID(8))>,
 775                                        <&dma0
 776                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 777                                          AT91_XDMAC_DT_PERID(9))>;
 778                                 dma-names = "tx", "rx";
 779                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
 780                                 clock-names = "spi_clk";
 781                                 atmel,fifo-size = <16>;
 782                                 #address-cells = <1>;
 783                                 #size-cells = <0>;
 784                                 status = "disabled";
 785                         };
 786
 787                         uart3: serial@fc008000 {
 788                                 compatible = "atmel,at91sam9260-usart";
 789                                 reg = <0xfc008000 0x100>;
 790                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
 791                                 dmas = <&dma1
 792                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 793                                          AT91_XDMAC_DT_PERID(41))>,
 794                                        <&dma1
 795                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 796                                          AT91_XDMAC_DT_PERID(42))>;
 797                                 dma-names = "tx", "rx";
 798                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
 799                                 clock-names = "usart";
 800                                 status = "disabled";
 801                         };
 802
 803                         uart4: serial@fc00c000 {
 804                                 compatible = "atmel,at91sam9260-usart";
 805                                 reg = <0xfc00c000 0x100>;
 806                                 dmas = <&dma0
 807                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 808                                          AT91_XDMAC_DT_PERID(43))>,
 809                                        <&dma0
 810                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 811                                          AT91_XDMAC_DT_PERID(44))>;
 812                                 dma-names = "tx", "rx";
 813                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 7>;
 814                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
 815                                 clock-names = "usart";
 816                                 status = "disabled";
 817                         };
 818
 819                         flx2: flexcom@fc010000 {
 820                                 compatible = "atmel,sama5d2-flexcom";
 821                                 reg = <0xfc010000 0x200>;
 822                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
 823                                 #address-cells = <1>;
 824                                 #size-cells = <1>;
 825                                 ranges = <0x0 0xfc010000 0x800>;
 826                                 status = "disabled";
 827                         };
 828
 829                         flx3: flexcom@fc014000 {
 830                                 compatible = "atmel,sama5d2-flexcom";
 831                                 reg = <0xfc014000 0x200>;
 832                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
 833                                 #address-cells = <1>;
 834                                 #size-cells = <1>;
 835                                 ranges = <0x0 0xfc014000 0x800>;
 836                                 status = "disabled";
 837                         };
 838
 839                         flx4: flexcom@fc018000 {
 840                                 compatible = "atmel,sama5d2-flexcom";
 841                                 reg = <0xfc018000 0x200>;
 842                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
 843                                 #address-cells = <1>;
 844                                 #size-cells = <1>;
 845                                 ranges = <0x0 0xfc018000 0x800>;
 846                                 status = "disabled";
 847                         };
 848
 849                         trng@fc01c000 {
 850                                 compatible = "atmel,at91sam9g45-trng";
 851                                 reg = <0xfc01c000 0x100>;
 852                                 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 0>;
 853                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
 854                         };
 855
 856                         aic: interrupt-controller@fc020000 {
 857                                 #interrupt-cells = <3>;
 858                                 compatible = "atmel,sama5d2-aic";
 859                                 interrupt-controller;
 860                                 reg = <0xfc020000 0x200>;
 861                                 atmel,external-irqs = <49>;
 862                         };
 863
 864                         i2c1: i2c@fc028000 {
 865                                 compatible = "atmel,sama5d2-i2c";
 866                                 reg = <0xfc028000 0x100>;
 867                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 7>;
 868                                 dmas = <&dma0
 869                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 870                                          AT91_XDMAC_DT_PERID(2))>,
 871                                        <&dma0
 872                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 873                                          AT91_XDMAC_DT_PERID(3))>;
 874                                 dma-names = "tx", "rx";
 875                                 #address-cells = <1>;
 876                                 #size-cells = <0>;
 877                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
 878                                 atmel,fifo-size = <16>;
 879                                 status = "disabled";
 880                         };
 881
 882                         adc: adc@fc030000 {
 883                                 compatible = "atmel,sama5d2-adc";
 884                                 reg = <0xfc030000 0x100>;
 885                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>;
 886                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
 887                                 clock-names = "adc_clk";
 888                                 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;
 889                                 dma-names = "rx";
 890                                 atmel,min-sample-rate-hz = <200000>;
 891                                 atmel,max-sample-rate-hz = <20000000>;
 892                                 atmel,startup-time-ms = <4>;
 893                                 atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>;
 894                                 #io-channel-cells = <1>;
 895                                 status = "disabled";
 896                         };
 897
 898                         resistive_touch: resistive-touch {
 899                                 compatible = "resistive-adc-touch";
 900                                 io-channels = <&adc AT91_SAMA5D2_ADC_X_CHANNEL>,
 901                                               <&adc AT91_SAMA5D2_ADC_Y_CHANNEL>,
 902                                               <&adc AT91_SAMA5D2_ADC_P_CHANNEL>;
 903                                 io-channel-names = "x", "y", "pressure";
 904                                 touchscreen-min-pressure = <50000>;
 905                                 status = "disabled";
 906                         };
 907
 908                         pioA: pinctrl@fc038000 {
 909                                 compatible = "atmel,sama5d2-pinctrl";
 910                                 reg = <0xfc038000 0x600>;
 911                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 7>,
 912                                              <68 IRQ_TYPE_LEVEL_HIGH 7>,
 913                                              <69 IRQ_TYPE_LEVEL_HIGH 7>,
 914                                              <70 IRQ_TYPE_LEVEL_HIGH 7>;
 915                                 interrupt-controller;
 916                                 #interrupt-cells = <2>;
 917                                 gpio-controller;
 918                                 #gpio-cells = <2>;
 919                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
 920                         };
 921
 922                         secumod@fc040000 {
 923                                 compatible = "atmel,sama5d2-secumod", "syscon";
 924                                 reg = <0xfc040000 0x100>;
 925                         };
 926
 927                         tdes@fc044000 {
 928                                 compatible = "atmel,at91sam9g46-tdes";
 929                                 reg = <0xfc044000 0x100>;
 930                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
 931                                 dmas = <&dma0
 932                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 933                                          AT91_XDMAC_DT_PERID(28))>,
 934                                        <&dma0
 935                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 936                                          AT91_XDMAC_DT_PERID(29))>;
 937                                 dma-names = "tx", "rx";
 938                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
 939                                 clock-names = "tdes_clk";
 940                                 status = "okay";
 941                         };
 942
 943                         classd: classd@fc048000 {
 944                                 compatible = "atmel,sama5d2-classd";
 945                                 reg = <0xfc048000 0x100>;
 946                                 interrupts = <59 IRQ_TYPE_LEVEL_HIGH 7>;
 947                                 dmas = <&dma0
 948                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 949                                          AT91_XDMAC_DT_PERID(47))>;
 950                                 dma-names = "tx";
 951                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 59>, <&pmc PMC_TYPE_GCK 59>;
 952                                 clock-names = "pclk", "gclk";
 953                                 status = "disabled";
 954                         };
 955
 956                         i2s1: i2s@fc04c000 {
 957                                 compatible = "atmel,sama5d2-i2s";
 958                                 reg = <0xfc04c000 0x100>;
 959                                 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 7>;
 960                                 dmas = <&dma0
 961                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 962                                          AT91_XDMAC_DT_PERID(33))>,
 963                                        <&dma0
 964                                         (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
 965                                          AT91_XDMAC_DT_PERID(34))>;
 966                                 dma-names = "tx", "rx";
 967                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_GCK 55>;
 968                                 clock-names = "pclk", "gclk";
 969                                 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S1_MUX>;
 970                                 assigned-parrents = <&pmc PMC_TYPE_GCK 55>;
 971                                 status = "disabled";
 972                         };
 973
 974                         can1: can@fc050000 {
 975                                 compatible = "bosch,m_can";
 976                                 reg = <0xfc050000 0x4000>, <0x210000 0x4000>;
 977                                 reg-names = "m_can", "message_ram";
 978                                 interrupts = <57 IRQ_TYPE_LEVEL_HIGH 7>,
 979                                              <65 IRQ_TYPE_LEVEL_HIGH 7>;
 980                                 interrupt-names = "int0", "int1";
 981                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>;
 982                                 clock-names = "hclk", "cclk";
 983                                 assigned-clocks = <&pmc PMC_TYPE_GCK 57>;
 984                                 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
 985                                 assigned-clock-rates = <40000000>;
 986                                 bosch,mram-cfg = <0x1100 0 0 64 0 0 32 32>;
 987                                 status = "disabled";
 988                         };
 989
 990                         sfrbu: sfr@fc05c000 {
 991                                 compatible = "atmel,sama5d2-sfrbu", "syscon";
 992                                 reg = <0xfc05c000 0x20>;
 993                         };
 994
 995                         chipid@fc069000 {
 996                                 compatible = "atmel,sama5d2-chipid";
 997                                 reg = <0xfc069000 0x8>;
 998                         };
 999                 };
1000         };
1001 };