src/arm/stm32mp15-pinctrl.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
   4  * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
   5  */
   6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
   7
   8 &pinctrl {
   9         adc1_in6_pins_a: adc1-in6-0 {
  10                 pins {
  11                         pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
  12                 };
  13         };
  14
  15         adc12_ain_pins_a: adc12-ain-0 {
  16                 pins {
  17                         pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
  18                                  <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
  19                                  <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
  20                                  <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
  21                 };
  22         };
  23
  24         adc12_ain_pins_b: adc12-ain-1 {
  25                 pins {
  26                         pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
  27                                  <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */
  28                 };
  29         };
  30
  31         adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
  32                 pins {
  33                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
  34                                  <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
  35                 };
  36         };
  37
  38         cec_pins_a: cec-0 {
  39                 pins {
  40                         pinmux = <STM32_PINMUX('A', 15, AF4)>;
  41                         bias-disable;
  42                         drive-open-drain;
  43                         slew-rate = <0>;
  44                 };
  45         };
  46
  47         cec_sleep_pins_a: cec-sleep-0 {
  48                 pins {
  49                         pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
  50                 };
  51         };
  52
  53         cec_pins_b: cec-1 {
  54                 pins {
  55                         pinmux = <STM32_PINMUX('B', 6, AF5)>;
  56                         bias-disable;
  57                         drive-open-drain;
  58                         slew-rate = <0>;
  59                 };
  60         };
  61
  62         cec_sleep_pins_b: cec-sleep-1 {
  63                 pins {
  64                         pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
  65                 };
  66         };
  67
  68         dac_ch1_pins_a: dac-ch1-0 {
  69                 pins {
  70                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
  71                 };
  72         };
  73
  74         dac_ch2_pins_a: dac-ch2-0 {
  75                 pins {
  76                         pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
  77                 };
  78         };
  79
  80         dcmi_pins_a: dcmi-0 {
  81                 pins {
  82                         pinmux = <STM32_PINMUX('H', 8,  AF13)>,/* DCMI_HSYNC */
  83                                  <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
  84                                  <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
  85                                  <STM32_PINMUX('H', 9,  AF13)>,/* DCMI_D0 */
  86                                  <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
  87                                  <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
  88                                  <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
  89                                  <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
  90                                  <STM32_PINMUX('I', 4,  AF13)>,/* DCMI_D5 */
  91                                  <STM32_PINMUX('B', 8,  AF13)>,/* DCMI_D6 */
  92                                  <STM32_PINMUX('E', 6,  AF13)>,/* DCMI_D7 */
  93                                  <STM32_PINMUX('I', 1,  AF13)>,/* DCMI_D8 */
  94                                  <STM32_PINMUX('H', 7,  AF13)>,/* DCMI_D9 */
  95                                  <STM32_PINMUX('I', 3,  AF13)>,/* DCMI_D10 */
  96                                  <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
  97                         bias-disable;
  98                 };
  99         };
 100
 101         dcmi_sleep_pins_a: dcmi-sleep-0 {
 102                 pins {
 103                         pinmux = <STM32_PINMUX('H', 8,  ANALOG)>,/* DCMI_HSYNC */
 104                                  <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
 105                                  <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
 106                                  <STM32_PINMUX('H', 9,  ANALOG)>,/* DCMI_D0 */
 107                                  <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
 108                                  <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
 109                                  <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
 110                                  <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
 111                                  <STM32_PINMUX('I', 4,  ANALOG)>,/* DCMI_D5 */
 112                                  <STM32_PINMUX('B', 8,  ANALOG)>,/* DCMI_D6 */
 113                                  <STM32_PINMUX('E', 6,  ANALOG)>,/* DCMI_D7 */
 114                                  <STM32_PINMUX('I', 1,  ANALOG)>,/* DCMI_D8 */
 115                                  <STM32_PINMUX('H', 7,  ANALOG)>,/* DCMI_D9 */
 116                                  <STM32_PINMUX('I', 3,  ANALOG)>,/* DCMI_D10 */
 117                                  <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
 118                 };
 119         };
 120
 121         ethernet0_rgmii_pins_a: rgmii-0 {
 122                 pins1 {
 123                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 124                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 125                                  <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
 126                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 127                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 128                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 129                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 130                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 131                         bias-disable;
 132                         drive-push-pull;
 133                         slew-rate = <2>;
 134                 };
 135                 pins2 {
 136                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
 137                         bias-disable;
 138                         drive-push-pull;
 139                         slew-rate = <0>;
 140                 };
 141                 pins3 {
 142                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 143                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 144                                  <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
 145                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
 146                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 147                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 148                         bias-disable;
 149                 };
 150         };
 151
 152         ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
 153                 pins1 {
 154                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 155                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 156                                  <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
 157                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 158                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 159                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 160                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 161                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 162                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 163                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 164                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 165                                  <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
 166                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
 167                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 168                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 169                 };
 170         };
 171
 172         ethernet0_rgmii_pins_b: rgmii-1 {
 173                 pins1 {
 174                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 175                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 176                                  <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
 177                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 178                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 179                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 180                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 181                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 182                         bias-disable;
 183                         drive-push-pull;
 184                         slew-rate = <2>;
 185                 };
 186                 pins2 {
 187                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
 188                         bias-disable;
 189                         drive-push-pull;
 190                         slew-rate = <0>;
 191                 };
 192                 pins3 {
 193                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 194                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 195                                  <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
 196                                  <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
 197                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 198                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 199                         bias-disable;
 200                 };
 201         };
 202
 203         ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
 204                 pins1 {
 205                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 206                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 207                                  <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
 208                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 209                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 210                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 211                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 212                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 213                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 214                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 215                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 216                                  <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
 217                                  <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
 218                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 219                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 220                  };
 221         };
 222
 223         ethernet0_rgmii_pins_c: rgmii-2 {
 224                 pins1 {
 225                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 226                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 227                                  <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
 228                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 229                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 230                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 231                                  <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 232                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 233                         bias-disable;
 234                         drive-push-pull;
 235                         slew-rate = <2>;
 236                 };
 237                 pins2 {
 238                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
 239                         bias-disable;
 240                         drive-push-pull;
 241                         slew-rate = <0>;
 242                 };
 243                 pins3 {
 244                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 245                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 246                                  <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
 247                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
 248                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 249                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 250                         bias-disable;
 251                 };
 252         };
 253
 254         ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
 255                 pins1 {
 256                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 257                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 258                                  <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
 259                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 260                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 261                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 262                                  <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 263                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 264                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 265                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 266                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 267                                  <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
 268                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
 269                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 270                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 271                 };
 272         };
 273
 274         ethernet0_rmii_pins_a: rmii-0 {
 275                 pins1 {
 276                         pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
 277                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
 278                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
 279                                  <STM32_PINMUX('A', 1, AF0)>,   /* ETH1_RMII_REF_CLK */
 280                                  <STM32_PINMUX('A', 2, AF11)>,  /* ETH1_MDIO */
 281                                  <STM32_PINMUX('C', 1, AF11)>;  /* ETH1_MDC */
 282                         bias-disable;
 283                         drive-push-pull;
 284                         slew-rate = <2>;
 285                 };
 286                 pins2 {
 287                         pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
 288                                  <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
 289                                  <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
 290                         bias-disable;
 291                 };
 292         };
 293
 294         ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
 295                 pins1 {
 296                         pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
 297                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
 298                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
 299                                  <STM32_PINMUX('A', 2, ANALOG)>,  /* ETH1_MDIO */
 300                                  <STM32_PINMUX('C', 1, ANALOG)>,  /* ETH1_MDC */
 301                                  <STM32_PINMUX('C', 4, ANALOG)>,  /* ETH1_RMII_RXD0 */
 302                                  <STM32_PINMUX('C', 5, ANALOG)>,  /* ETH1_RMII_RXD1 */
 303                                  <STM32_PINMUX('A', 1, ANALOG)>,  /* ETH1_RMII_REF_CLK */
 304                                  <STM32_PINMUX('A', 7, ANALOG)>;  /* ETH1_RMII_CRS_DV */
 305                 };
 306         };
 307
 308         fmc_pins_a: fmc-0 {
 309                 pins1 {
 310                         pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
 311                                  <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
 312                                  <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
 313                                  <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
 314                                  <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
 315                                  <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
 316                                  <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
 317                                  <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
 318                                  <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
 319                                  <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
 320                                  <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
 321                                  <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
 322                                  <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
 323                         bias-disable;
 324                         drive-push-pull;
 325                         slew-rate = <1>;
 326                 };
 327                 pins2 {
 328                         pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
 329                         bias-pull-up;
 330                 };
 331         };
 332
 333         fmc_sleep_pins_a: fmc-sleep-0 {
 334                 pins {
 335                         pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
 336                                  <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
 337                                  <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
 338                                  <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
 339                                  <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
 340                                  <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
 341                                  <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
 342                                  <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
 343                                  <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
 344                                  <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
 345                                  <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
 346                                  <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
 347                                  <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
 348                                  <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
 349                 };
 350         };
 351
 352         i2c1_pins_a: i2c1-0 {
 353                 pins {
 354                         pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
 355                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 356                         bias-disable;
 357                         drive-open-drain;
 358                         slew-rate = <0>;
 359                 };
 360         };
 361
 362         i2c1_sleep_pins_a: i2c1-sleep-0 {
 363                 pins {
 364                         pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
 365                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 366                 };
 367         };
 368
 369         i2c1_pins_b: i2c1-1 {
 370                 pins {
 371                         pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
 372                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 373                         bias-disable;
 374                         drive-open-drain;
 375                         slew-rate = <0>;
 376                 };
 377         };
 378
 379         i2c1_sleep_pins_b: i2c1-sleep-1 {
 380                 pins {
 381                         pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
 382                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 383                 };
 384         };
 385
 386         i2c2_pins_a: i2c2-0 {
 387                 pins {
 388                         pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
 389                                  <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 390                         bias-disable;
 391                         drive-open-drain;
 392                         slew-rate = <0>;
 393                 };
 394         };
 395
 396         i2c2_sleep_pins_a: i2c2-sleep-0 {
 397                 pins {
 398                         pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
 399                                  <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 400                 };
 401         };
 402
 403         i2c2_pins_b1: i2c2-1 {
 404                 pins {
 405                         pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 406                         bias-disable;
 407                         drive-open-drain;
 408                         slew-rate = <0>;
 409                 };
 410         };
 411
 412         i2c2_sleep_pins_b1: i2c2-sleep-1 {
 413                 pins {
 414                         pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 415                 };
 416         };
 417
 418         i2c2_pins_c: i2c2-2 {
 419                 pins {
 420                         pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
 421                                  <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 422                         bias-disable;
 423                         drive-open-drain;
 424                         slew-rate = <0>;
 425                 };
 426         };
 427
 428         i2c2_pins_sleep_c: i2c2-sleep-2 {
 429                 pins {
 430                         pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
 431                                  <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 432                 };
 433         };
 434
 435         i2c5_pins_a: i2c5-0 {
 436                 pins {
 437                         pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
 438                                  <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
 439                         bias-disable;
 440                         drive-open-drain;
 441                         slew-rate = <0>;
 442                 };
 443         };
 444
 445         i2c5_sleep_pins_a: i2c5-sleep-0 {
 446                 pins {
 447                         pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
 448                                  <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
 449
 450                 };
 451         };
 452
 453         i2c5_pins_b: i2c5-1 {
 454                 pins {
 455                         pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
 456                                  <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
 457                         bias-disable;
 458                         drive-open-drain;
 459                         slew-rate = <0>;
 460                 };
 461         };
 462
 463         i2c5_sleep_pins_b: i2c5-sleep-1 {
 464                 pins {
 465                         pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
 466                                  <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
 467                 };
 468         };
 469
 470         i2s2_pins_a: i2s2-0 {
 471                 pins {
 472                         pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
 473                                  <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
 474                                  <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
 475                         slew-rate = <1>;
 476                         drive-push-pull;
 477                         bias-disable;
 478                 };
 479         };
 480
 481         i2s2_sleep_pins_a: i2s2-sleep-0 {
 482                 pins {
 483                         pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
 484                                  <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
 485                                  <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
 486                 };
 487         };
 488
 489         ltdc_pins_a: ltdc-0 {
 490                 pins {
 491                         pinmux = <STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
 492                                  <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
 493                                  <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
 494                                  <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
 495                                  <STM32_PINMUX('H',  2, AF14)>, /* LCD_R0 */
 496                                  <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
 497                                  <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
 498                                  <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
 499                                  <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
 500                                  <STM32_PINMUX('C',  0, AF14)>, /* LCD_R5 */
 501                                  <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
 502                                  <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
 503                                  <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
 504                                  <STM32_PINMUX('E',  6, AF14)>, /* LCD_G1 */
 505                                  <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
 506                                  <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
 507                                  <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
 508                                  <STM32_PINMUX('I',  0, AF14)>, /* LCD_G5 */
 509                                  <STM32_PINMUX('I',  1, AF14)>, /* LCD_G6 */
 510                                  <STM32_PINMUX('I',  2, AF14)>, /* LCD_G7 */
 511                                  <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
 512                                  <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
 513                                  <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
 514                                  <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
 515                                  <STM32_PINMUX('I',  4, AF14)>, /* LCD_B4 */
 516                                  <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
 517                                  <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
 518                                  <STM32_PINMUX('D',  8, AF14)>; /* LCD_B7 */
 519                         bias-disable;
 520                         drive-push-pull;
 521                         slew-rate = <1>;
 522                 };
 523         };
 524
 525         ltdc_sleep_pins_a: ltdc-sleep-0 {
 526                 pins {
 527                         pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
 528                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
 529                                  <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
 530                                  <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
 531                                  <STM32_PINMUX('H',  2, ANALOG)>, /* LCD_R0 */
 532                                  <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
 533                                  <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
 534                                  <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
 535                                  <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
 536                                  <STM32_PINMUX('C',  0, ANALOG)>, /* LCD_R5 */
 537                                  <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
 538                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
 539                                  <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
 540                                  <STM32_PINMUX('E',  6, ANALOG)>, /* LCD_G1 */
 541                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
 542                                  <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
 543                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
 544                                  <STM32_PINMUX('I',  0, ANALOG)>, /* LCD_G5 */
 545                                  <STM32_PINMUX('I',  1, ANALOG)>, /* LCD_G6 */
 546                                  <STM32_PINMUX('I',  2, ANALOG)>, /* LCD_G7 */
 547                                  <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
 548                                  <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
 549                                  <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
 550                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
 551                                  <STM32_PINMUX('I',  4, ANALOG)>, /* LCD_B4 */
 552                                  <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
 553                                  <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
 554                                  <STM32_PINMUX('D',  8, ANALOG)>; /* LCD_B7 */
 555                 };
 556         };
 557
 558         ltdc_pins_b: ltdc-1 {
 559                 pins {
 560                         pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
 561                                  <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
 562                                  <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
 563                                  <STM32_PINMUX('K',  7, AF14)>, /* LCD_DE */
 564                                  <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
 565                                  <STM32_PINMUX('J',  0, AF14)>, /* LCD_R1 */
 566                                  <STM32_PINMUX('J',  1, AF14)>, /* LCD_R2 */
 567                                  <STM32_PINMUX('J',  2, AF14)>, /* LCD_R3 */
 568                                  <STM32_PINMUX('J',  3, AF14)>, /* LCD_R4 */
 569                                  <STM32_PINMUX('J',  4, AF14)>, /* LCD_R5 */
 570                                  <STM32_PINMUX('J',  5, AF14)>, /* LCD_R6 */
 571                                  <STM32_PINMUX('J',  6, AF14)>, /* LCD_R7 */
 572                                  <STM32_PINMUX('J',  7, AF14)>, /* LCD_G0 */
 573                                  <STM32_PINMUX('J',  8, AF14)>, /* LCD_G1 */
 574                                  <STM32_PINMUX('J',  9, AF14)>, /* LCD_G2 */
 575                                  <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
 576                                  <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
 577                                  <STM32_PINMUX('K',  0, AF14)>, /* LCD_G5 */
 578                                  <STM32_PINMUX('K',  1, AF14)>, /* LCD_G6 */
 579                                  <STM32_PINMUX('K',  2, AF14)>, /* LCD_G7 */
 580                                  <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
 581                                  <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
 582                                  <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
 583                                  <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
 584                                  <STM32_PINMUX('K',  3, AF14)>, /* LCD_B4 */
 585                                  <STM32_PINMUX('K',  4, AF14)>, /* LCD_B5 */
 586                                  <STM32_PINMUX('K',  5, AF14)>, /* LCD_B6 */
 587                                  <STM32_PINMUX('K',  6, AF14)>; /* LCD_B7 */
 588                         bias-disable;
 589                         drive-push-pull;
 590                         slew-rate = <1>;
 591                 };
 592         };
 593
 594         ltdc_sleep_pins_b: ltdc-sleep-1 {
 595                 pins {
 596                         pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
 597                                  <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
 598                                  <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
 599                                  <STM32_PINMUX('K',  7, ANALOG)>, /* LCD_DE */
 600                                  <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
 601                                  <STM32_PINMUX('J',  0, ANALOG)>, /* LCD_R1 */
 602                                  <STM32_PINMUX('J',  1, ANALOG)>, /* LCD_R2 */
 603                                  <STM32_PINMUX('J',  2, ANALOG)>, /* LCD_R3 */
 604                                  <STM32_PINMUX('J',  3, ANALOG)>, /* LCD_R4 */
 605                                  <STM32_PINMUX('J',  4, ANALOG)>, /* LCD_R5 */
 606                                  <STM32_PINMUX('J',  5, ANALOG)>, /* LCD_R6 */
 607                                  <STM32_PINMUX('J',  6, ANALOG)>, /* LCD_R7 */
 608                                  <STM32_PINMUX('J',  7, ANALOG)>, /* LCD_G0 */
 609                                  <STM32_PINMUX('J',  8, ANALOG)>, /* LCD_G1 */
 610                                  <STM32_PINMUX('J',  9, ANALOG)>, /* LCD_G2 */
 611                                  <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
 612                                  <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
 613                                  <STM32_PINMUX('K',  0, ANALOG)>, /* LCD_G5 */
 614                                  <STM32_PINMUX('K',  1, ANALOG)>, /* LCD_G6 */
 615                                  <STM32_PINMUX('K',  2, ANALOG)>, /* LCD_G7 */
 616                                  <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
 617                                  <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
 618                                  <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
 619                                  <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
 620                                  <STM32_PINMUX('K',  3, ANALOG)>, /* LCD_B4 */
 621                                  <STM32_PINMUX('K',  4, ANALOG)>, /* LCD_B5 */
 622                                  <STM32_PINMUX('K',  5, ANALOG)>, /* LCD_B6 */
 623                                  <STM32_PINMUX('K',  6, ANALOG)>; /* LCD_B7 */
 624                 };
 625         };
 626
 627         ltdc_pins_c: ltdc-2 {
 628                 pins1 {
 629                         pinmux = <STM32_PINMUX('B',  1, AF9)>,  /* LTDC_R6 */
 630                                  <STM32_PINMUX('B',  9, AF14)>, /* LTDC_B7 */
 631                                  <STM32_PINMUX('C',  0, AF14)>, /* LTDC_R5 */
 632                                  <STM32_PINMUX('D',  3, AF14)>, /* LTDC_G7 */
 633                                  <STM32_PINMUX('D',  6, AF14)>, /* LTDC_B2 */
 634                                  <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
 635                                  <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
 636                                  <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
 637                                  <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
 638                                  <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
 639                                  <STM32_PINMUX('H',  4, AF9)>,  /* LTDC_G5 */
 640                                  <STM32_PINMUX('H',  8, AF14)>, /* LTDC_R2 */
 641                                  <STM32_PINMUX('H',  9, AF14)>, /* LTDC_R3 */
 642                                  <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
 643                                  <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
 644                                  <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
 645                                  <STM32_PINMUX('I',  1, AF14)>, /* LTDC_G6 */
 646                                  <STM32_PINMUX('I',  5, AF14)>, /* LTDC_B5 */
 647                                  <STM32_PINMUX('I',  6, AF14)>, /* LTDC_B6 */
 648                                  <STM32_PINMUX('I',  9, AF14)>, /* LTDC_VSYNC */
 649                                  <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
 650                         bias-disable;
 651                         drive-push-pull;
 652                         slew-rate = <0>;
 653                 };
 654                 pins2 {
 655                         pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
 656                         bias-disable;
 657                         drive-push-pull;
 658                         slew-rate = <1>;
 659                 };
 660         };
 661
 662         ltdc_sleep_pins_c: ltdc-sleep-2 {
 663                 pins1 {
 664                         pinmux = <STM32_PINMUX('B', 1, ANALOG)>,  /* LTDC_R6 */
 665                                  <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
 666                                  <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
 667                                  <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
 668                                  <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
 669                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
 670                                  <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
 671                                  <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
 672                                  <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
 673                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
 674                                  <STM32_PINMUX('H', 4, ANALOG)>,  /* LTDC_G5 */
 675                                  <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
 676                                  <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
 677                                  <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
 678                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
 679                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
 680                                  <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
 681                                  <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
 682                                  <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
 683                                  <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
 684                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
 685                                  <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
 686                 };
 687         };
 688
 689         ltdc_pins_d: ltdc-3 {
 690                 pins1 {
 691                         pinmux = <STM32_PINMUX('G',  7, AF14)>; /* LCD_CLK */
 692                         bias-disable;
 693                         drive-push-pull;
 694                         slew-rate = <3>;
 695                 };
 696                 pins2 {
 697                         pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
 698                                  <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
 699                                  <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
 700                                  <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
 701                                  <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
 702                                  <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
 703                                  <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
 704                                  <STM32_PINMUX('A',  5, AF14)>, /* LCD_R4 */
 705                                  <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
 706                                  <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
 707                                  <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
 708                                  <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
 709                                  <STM32_PINMUX('B',  0, AF14)>, /* LCD_G1 */
 710                                  <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
 711                                  <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
 712                                  <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
 713                                  <STM32_PINMUX('H',  4,  AF9)>, /* LCD_G5 */
 714                                  <STM32_PINMUX('I', 11,  AF9)>, /* LCD_G6 */
 715                                  <STM32_PINMUX('G',  8, AF14)>, /* LCD_G7 */
 716                                  <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
 717                                  <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
 718                                  <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
 719                                  <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
 720                                  <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
 721                                  <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
 722                                  <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
 723                                  <STM32_PINMUX('I',  7, AF14)>; /* LCD_B7 */
 724                         bias-disable;
 725                         drive-push-pull;
 726                         slew-rate = <2>;
 727                 };
 728         };
 729
 730         ltdc_sleep_pins_d: ltdc-sleep-3 {
 731                 pins {
 732                         pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
 733                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
 734                                  <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
 735                                  <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
 736                                  <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
 737                                  <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
 738                                  <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
 739                                  <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
 740                                  <STM32_PINMUX('A',  5, ANALOG)>, /* LCD_R4 */
 741                                  <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
 742                                  <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
 743                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
 744                                  <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
 745                                  <STM32_PINMUX('B',  0, ANALOG)>, /* LCD_G1 */
 746                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
 747                                  <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
 748                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
 749                                  <STM32_PINMUX('H',  4, ANALOG)>, /* LCD_G5 */
 750                                  <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
 751                                  <STM32_PINMUX('G',  8, ANALOG)>, /* LCD_G7 */
 752                                  <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
 753                                  <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
 754                                  <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
 755                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
 756                                  <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
 757                                  <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
 758                                  <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
 759                                  <STM32_PINMUX('I',  7, ANALOG)>; /* LCD_B7 */
 760                 };
 761         };
 762
 763         m_can1_pins_a: m-can1-0 {
 764                 pins1 {
 765                         pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
 766                         slew-rate = <1>;
 767                         drive-push-pull;
 768                         bias-disable;
 769                 };
 770                 pins2 {
 771                         pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
 772                         bias-disable;
 773                 };
 774         };
 775
 776         m_can1_sleep_pins_a: m_can1-sleep-0 {
 777                 pins {
 778                         pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
 779                                  <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
 780                 };
 781         };
 782
 783         m_can1_pins_b: m-can1-1 {
 784                 pins1 {
 785                         pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
 786                         slew-rate = <1>;
 787                         drive-push-pull;
 788                         bias-disable;
 789                 };
 790                 pins2 {
 791                         pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
 792                         bias-disable;
 793                 };
 794         };
 795
 796         m_can1_sleep_pins_b: m_can1-sleep-1 {
 797                 pins {
 798                         pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
 799                                  <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
 800                 };
 801         };
 802
 803         m_can2_pins_a: m-can2-0 {
 804                 pins1 {
 805                         pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
 806                         slew-rate = <1>;
 807                         drive-push-pull;
 808                         bias-disable;
 809                 };
 810                 pins2 {
 811                         pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
 812                         bias-disable;
 813                 };
 814         };
 815
 816         m_can2_sleep_pins_a: m_can2-sleep-0 {
 817                 pins {
 818                         pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
 819                                  <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */
 820                 };
 821         };
 822
 823         pwm1_pins_a: pwm1-0 {
 824                 pins {
 825                         pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
 826                                  <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
 827                                  <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
 828                         bias-pull-down;
 829                         drive-push-pull;
 830                         slew-rate = <0>;
 831                 };
 832         };
 833
 834         pwm1_sleep_pins_a: pwm1-sleep-0 {
 835                 pins {
 836                         pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
 837                                  <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
 838                                  <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
 839                 };
 840         };
 841
 842         pwm2_pins_a: pwm2-0 {
 843                 pins {
 844                         pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
 845                         bias-pull-down;
 846                         drive-push-pull;
 847                         slew-rate = <0>;
 848                 };
 849         };
 850
 851         pwm2_sleep_pins_a: pwm2-sleep-0 {
 852                 pins {
 853                         pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
 854                 };
 855         };
 856
 857         pwm3_pins_a: pwm3-0 {
 858                 pins {
 859                         pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
 860                         bias-pull-down;
 861                         drive-push-pull;
 862                         slew-rate = <0>;
 863                 };
 864         };
 865
 866         pwm3_sleep_pins_a: pwm3-sleep-0 {
 867                 pins {
 868                         pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
 869                 };
 870         };
 871
 872         pwm3_pins_b: pwm3-1 {
 873                 pins {
 874                         pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
 875                         bias-disable;
 876                         drive-push-pull;
 877                         slew-rate = <0>;
 878                 };
 879         };
 880
 881         pwm3_sleep_pins_b: pwm3-sleep-1 {
 882                 pins {
 883                         pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
 884                 };
 885         };
 886
 887         pwm4_pins_a: pwm4-0 {
 888                 pins {
 889                         pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
 890                                  <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
 891                         bias-pull-down;
 892                         drive-push-pull;
 893                         slew-rate = <0>;
 894                 };
 895         };
 896
 897         pwm4_sleep_pins_a: pwm4-sleep-0 {
 898                 pins {
 899                         pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
 900                                  <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
 901                 };
 902         };
 903
 904         pwm4_pins_b: pwm4-1 {
 905                 pins {
 906                         pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
 907                         bias-pull-down;
 908                         drive-push-pull;
 909                         slew-rate = <0>;
 910                 };
 911         };
 912
 913         pwm4_sleep_pins_b: pwm4-sleep-1 {
 914                 pins {
 915                         pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
 916                 };
 917         };
 918
 919         pwm5_pins_a: pwm5-0 {
 920                 pins {
 921                         pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
 922                         bias-pull-down;
 923                         drive-push-pull;
 924                         slew-rate = <0>;
 925                 };
 926         };
 927
 928         pwm5_sleep_pins_a: pwm5-sleep-0 {
 929                 pins {
 930                         pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
 931                 };
 932         };
 933
 934         pwm5_pins_b: pwm5-1 {
 935                 pins {
 936                         pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
 937                                  <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
 938                                  <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
 939                         bias-disable;
 940                         drive-push-pull;
 941                         slew-rate = <0>;
 942                 };
 943         };
 944
 945         pwm5_sleep_pins_b: pwm5-sleep-1 {
 946                 pins {
 947                         pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
 948                                  <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
 949                                  <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
 950                 };
 951         };
 952
 953         pwm8_pins_a: pwm8-0 {
 954                 pins {
 955                         pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
 956                         bias-pull-down;
 957                         drive-push-pull;
 958                         slew-rate = <0>;
 959                 };
 960         };
 961
 962         pwm8_sleep_pins_a: pwm8-sleep-0 {
 963                 pins {
 964                         pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
 965                 };
 966         };
 967
 968         pwm12_pins_a: pwm12-0 {
 969                 pins {
 970                         pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
 971                         bias-pull-down;
 972                         drive-push-pull;
 973                         slew-rate = <0>;
 974                 };
 975         };
 976
 977         pwm12_sleep_pins_a: pwm12-sleep-0 {
 978                 pins {
 979                         pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
 980                 };
 981         };
 982
 983         qspi_clk_pins_a: qspi-clk-0 {
 984                 pins {
 985                         pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
 986                         bias-disable;
 987                         drive-push-pull;
 988                         slew-rate = <3>;
 989                 };
 990         };
 991
 992         qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
 993                 pins {
 994                         pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
 995                 };
 996         };
 997
 998         qspi_bk1_pins_a: qspi-bk1-0 {
 999                 pins1 {
1000                         pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
1001                                  <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
1002                                  <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
1003                                  <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
1004                         bias-disable;
1005                         drive-push-pull;
1006                         slew-rate = <1>;
1007                 };
1008                 pins2 {
1009                         pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1010                         bias-pull-up;
1011                         drive-push-pull;
1012                         slew-rate = <1>;
1013                 };
1014         };
1015
1016         qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
1017                 pins {
1018                         pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
1019                                  <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
1020                                  <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
1021                                  <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
1022                                  <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
1023                 };
1024         };
1025
1026         qspi_bk2_pins_a: qspi-bk2-0 {
1027                 pins1 {
1028                         pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
1029                                  <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
1030                                  <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
1031                                  <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
1032                         bias-disable;
1033                         drive-push-pull;
1034                         slew-rate = <1>;
1035                 };
1036                 pins2 {
1037                         pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1038                         bias-pull-up;
1039                         drive-push-pull;
1040                         slew-rate = <1>;
1041                 };
1042         };
1043
1044         qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1045                 pins {
1046                         pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
1047                                  <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
1048                                  <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
1049                                  <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
1050                                  <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
1051                 };
1052         };
1053
1054         sai2a_pins_a: sai2a-0 {
1055                 pins {
1056                         pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1057                                  <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1058                                  <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1059                                  <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
1060                         slew-rate = <0>;
1061                         drive-push-pull;
1062                         bias-disable;
1063                 };
1064         };
1065
1066         sai2a_sleep_pins_a: sai2a-sleep-0 {
1067                 pins {
1068                         pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1069                                  <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1070                                  <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1071                                  <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
1072                 };
1073         };
1074
1075
1076         sai2a_pins_b: sai2a-1 {
1077                 pins1 {
1078                         pinmux = <STM32_PINMUX('I', 6, AF10)>,  /* SAI2_SD_A */
1079                                  <STM32_PINMUX('I', 7, AF10)>,  /* SAI2_FS_A */
1080                                  <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */
1081                         slew-rate = <0>;
1082                         drive-push-pull;
1083                         bias-disable;
1084                 };
1085         };
1086
1087         sai2a_sleep_pins_b: sai2a-sleep-1 {
1088                 pins {
1089                         pinmux = <STM32_PINMUX('I', 6, ANALOG)>,  /* SAI2_SD_A */
1090                                  <STM32_PINMUX('I', 7, ANALOG)>,  /* SAI2_FS_A */
1091                                  <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
1092                 };
1093         };
1094
1095         sai2a_pins_c: sai2a-4 {
1096                 pins {
1097                         pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
1098                                  <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */
1099                                  <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */
1100                         slew-rate = <0>;
1101                         drive-push-pull;
1102                         bias-disable;
1103                 };
1104         };
1105
1106         sai2a_sleep_pins_c: sai2a-5 {
1107                 pins {
1108                         pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
1109                                  <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */
1110                                  <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */
1111                 };
1112         };
1113
1114         sai2b_pins_a: sai2b-0 {
1115                 pins1 {
1116                         pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1117                                  <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
1118                                  <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
1119                         slew-rate = <0>;
1120                         drive-push-pull;
1121                         bias-disable;
1122                 };
1123                 pins2 {
1124                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1125                         bias-disable;
1126                 };
1127         };
1128
1129         sai2b_sleep_pins_a: sai2b-sleep-0 {
1130                 pins {
1131                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1132                                  <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
1133                                  <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
1134                                  <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
1135                 };
1136         };
1137
1138         sai2b_pins_b: sai2b-1 {
1139                 pins {
1140                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1141                         bias-disable;
1142                 };
1143         };
1144
1145         sai2b_sleep_pins_b: sai2b-sleep-1 {
1146                 pins {
1147                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1148                 };
1149         };
1150
1151         sai2b_pins_c: sai2a-4 {
1152                 pins1 {
1153                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1154                         bias-disable;
1155                 };
1156         };
1157
1158         sai2b_sleep_pins_c: sai2a-sleep-5 {
1159                 pins {
1160                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1161                 };
1162         };
1163
1164         sai4a_pins_a: sai4a-0 {
1165                 pins {
1166                         pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1167                         slew-rate = <0>;
1168                         drive-push-pull;
1169                         bias-disable;
1170                 };
1171         };
1172
1173         sai4a_sleep_pins_a: sai4a-sleep-0 {
1174                 pins {
1175                         pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1176                 };
1177         };
1178
1179         sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1180                 pins1 {
1181                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1182                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1183                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1184                                  <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
1185                                  <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1186                         slew-rate = <1>;
1187                         drive-push-pull;
1188                         bias-disable;
1189                 };
1190                 pins2 {
1191                         pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1192                         slew-rate = <2>;
1193                         drive-push-pull;
1194                         bias-disable;
1195                 };
1196         };
1197
1198         sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1199                 pins1 {
1200                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1201                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1202                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1203                                  <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1204                         slew-rate = <1>;
1205                         drive-push-pull;
1206                         bias-disable;
1207                 };
1208                 pins2 {
1209                         pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1210                         slew-rate = <2>;
1211                         drive-push-pull;
1212                         bias-disable;
1213                 };
1214                 pins3 {
1215                         pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1216                         slew-rate = <1>;
1217                         drive-open-drain;
1218                         bias-disable;
1219                 };
1220         };
1221
1222         sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1223                 pins {
1224                         pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1225                                  <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
1226                                  <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
1227                                  <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
1228                                  <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
1229                                  <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
1230                 };
1231         };
1232
1233         sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1234                 pins1 {
1235                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1236                                  <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1237                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1238                         slew-rate = <1>;
1239                         drive-push-pull;
1240                         bias-pull-up;
1241                 };
1242                 pins2{
1243                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1244                         bias-pull-up;
1245                 };
1246         };
1247
1248         sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
1249                 pins {
1250                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1251                                  <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
1252                                  <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1253                                  <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1254                 };
1255         };
1256
1257         sdmmc1_dir_pins_b: sdmmc1-dir-1 {
1258                 pins1 {
1259                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1260                                  <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
1261                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1262                         slew-rate = <1>;
1263                         drive-push-pull;
1264                         bias-pull-up;
1265                 };
1266                 pins2{
1267                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1268                         bias-pull-up;
1269                 };
1270         };
1271
1272         sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
1273                 pins {
1274                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1275                                  <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
1276                                  <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1277                                  <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1278                 };
1279         };
1280
1281         sdmmc2_b4_pins_a: sdmmc2-b4-0 {
1282                 pins1 {
1283                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1284                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1285                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1286                                  <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1287                                  <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1288                         slew-rate = <1>;
1289                         drive-push-pull;
1290                         bias-pull-up;
1291                 };
1292                 pins2 {
1293                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1294                         slew-rate = <2>;
1295                         drive-push-pull;
1296                         bias-pull-up;
1297                 };
1298         };
1299
1300         sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
1301                 pins1 {
1302                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1303                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1304                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1305                                  <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1306                         slew-rate = <1>;
1307                         drive-push-pull;
1308                         bias-pull-up;
1309                 };
1310                 pins2 {
1311                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1312                         slew-rate = <2>;
1313                         drive-push-pull;
1314                         bias-pull-up;
1315                 };
1316                 pins3 {
1317                         pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1318                         slew-rate = <1>;
1319                         drive-open-drain;
1320                         bias-pull-up;
1321                 };
1322         };
1323
1324         sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
1325                 pins {
1326                         pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
1327                                  <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
1328                                  <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
1329                                  <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
1330                                  <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
1331                                  <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
1332                 };
1333         };
1334
1335         sdmmc2_b4_pins_b: sdmmc2-b4-1 {
1336                 pins1 {
1337                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1338                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1339                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1340                                  <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1341                                  <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1342                         slew-rate = <1>;
1343                         drive-push-pull;
1344                         bias-disable;
1345                 };
1346                 pins2 {
1347                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1348                         slew-rate = <2>;
1349                         drive-push-pull;
1350                         bias-disable;
1351                 };
1352         };
1353
1354         sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
1355                 pins1 {
1356                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1357                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1358                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1359                                  <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1360                         slew-rate = <1>;
1361                         drive-push-pull;
1362                         bias-disable;
1363                 };
1364                 pins2 {
1365                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1366                         slew-rate = <2>;
1367                         drive-push-pull;
1368                         bias-disable;
1369                 };
1370                 pins3 {
1371                         pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1372                         slew-rate = <1>;
1373                         drive-open-drain;
1374                         bias-disable;
1375                 };
1376         };
1377
1378         sdmmc2_d47_pins_a: sdmmc2-d47-0 {
1379                 pins {
1380                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1381                                  <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1382                                  <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
1383                                  <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
1384                         slew-rate = <1>;
1385                         drive-push-pull;
1386                         bias-pull-up;
1387                 };
1388         };
1389
1390         sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
1391                 pins {
1392                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1393                                  <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1394                                  <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1395                                  <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
1396                 };
1397         };
1398
1399         sdmmc2_d47_pins_b: sdmmc2-d47-1 {
1400                 pins {
1401                         pinmux = <STM32_PINMUX('A', 8, AF9)>,  /* SDMMC2_D4 */
1402                                  <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1403                                  <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1404                                  <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1405                         slew-rate = <1>;
1406                         drive-push-pull;
1407                         bias-disable;
1408                 };
1409         };
1410
1411         sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
1412                 pins {
1413                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1414                                  <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1415                                  <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1416                                  <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1417                 };
1418         };
1419
1420         sdmmc2_d47_pins_c: sdmmc2-d47-2 {
1421                 pins {
1422                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1423                                  <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
1424                                  <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1425                                  <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1426                         slew-rate = <1>;
1427                         drive-push-pull;
1428                         bias-pull-up;
1429                 };
1430         };
1431
1432         sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
1433                 pins {
1434                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1435                                  <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
1436                                  <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1437                                  <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1438                 };
1439         };
1440
1441         sdmmc3_b4_pins_a: sdmmc3-b4-0 {
1442                 pins1 {
1443                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1444                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1445                                  <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1446                                  <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1447                                  <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
1448                         slew-rate = <1>;
1449                         drive-push-pull;
1450                         bias-pull-up;
1451                 };
1452                 pins2 {
1453                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1454                         slew-rate = <2>;
1455                         drive-push-pull;
1456                         bias-pull-up;
1457                 };
1458         };
1459
1460         sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
1461                 pins1 {
1462                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1463                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1464                                  <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1465                                  <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1466                         slew-rate = <1>;
1467                         drive-push-pull;
1468                         bias-pull-up;
1469                 };
1470                 pins2 {
1471                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1472                         slew-rate = <2>;
1473                         drive-push-pull;
1474                         bias-pull-up;
1475                 };
1476                 pins3 {
1477                         pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
1478                         slew-rate = <1>;
1479                         drive-open-drain;
1480                         bias-pull-up;
1481                 };
1482         };
1483
1484         sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
1485                 pins {
1486                         pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1487                                  <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1488                                  <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
1489                                  <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1490                                  <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1491                                  <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
1492                 };
1493         };
1494
1495         sdmmc3_b4_pins_b: sdmmc3-b4-1 {
1496                 pins1 {
1497                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1498                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1499                                  <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1500                                  <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1501                                  <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
1502                         slew-rate = <1>;
1503                         drive-push-pull;
1504                         bias-pull-up;
1505                 };
1506                 pins2 {
1507                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1508                         slew-rate = <2>;
1509                         drive-push-pull;
1510                         bias-pull-up;
1511                 };
1512         };
1513
1514         sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
1515                 pins1 {
1516                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1517                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1518                                  <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1519                                  <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1520                         slew-rate = <1>;
1521                         drive-push-pull;
1522                         bias-pull-up;
1523                 };
1524                 pins2 {
1525                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1526                         slew-rate = <2>;
1527                         drive-push-pull;
1528                         bias-pull-up;
1529                 };
1530                 pins3 {
1531                         pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
1532                         slew-rate = <1>;
1533                         drive-open-drain;
1534                         bias-pull-up;
1535                 };
1536         };
1537
1538         sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
1539                 pins {
1540                         pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1541                                  <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1542                                  <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
1543                                  <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1544                                  <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1545                                  <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
1546                 };
1547         };
1548
1549         spdifrx_pins_a: spdifrx-0 {
1550                 pins {
1551                         pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
1552                         bias-disable;
1553                 };
1554         };
1555
1556         spdifrx_sleep_pins_a: spdifrx-sleep-0 {
1557                 pins {
1558                         pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
1559                 };
1560         };
1561
1562         spi2_pins_a: spi2-0 {
1563                 pins1 {
1564                         pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI1_SCK */
1565                                  <STM32_PINMUX('I', 3, AF5)>; /* SPI1_MOSI */
1566                         bias-disable;
1567                         drive-push-pull;
1568                         slew-rate = <1>;
1569                 };
1570
1571                 pins2 {
1572                         pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI1_MISO */
1573                         bias-disable;
1574                 };
1575         };
1576
1577         usart2_pins_a: usart2-0 {
1578                 pins1 {
1579                         pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
1580                                  <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
1581                         bias-disable;
1582                         drive-push-pull;
1583                         slew-rate = <0>;
1584                 };
1585                 pins2 {
1586                         pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
1587                                  <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
1588                         bias-disable;
1589                 };
1590         };
1591
1592         usart2_sleep_pins_a: usart2-sleep-0 {
1593                 pins {
1594                         pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
1595                                  <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
1596                                  <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
1597                                  <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
1598                 };
1599         };
1600
1601         usart2_pins_b: usart2-1 {
1602                 pins1 {
1603                         pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
1604                                  <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
1605                         bias-disable;
1606                         drive-push-pull;
1607                         slew-rate = <0>;
1608                 };
1609                 pins2 {
1610                         pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
1611                                  <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
1612                         bias-disable;
1613                 };
1614         };
1615
1616         usart2_sleep_pins_b: usart2-sleep-1 {
1617                 pins {
1618                         pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
1619                                  <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
1620                                  <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
1621                                  <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
1622                 };
1623         };
1624
1625         usart3_pins_a: usart3-0 {
1626                 pins1 {
1627                         pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
1628                         bias-disable;
1629                         drive-push-pull;
1630                         slew-rate = <0>;
1631                 };
1632                 pins2 {
1633                         pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
1634                         bias-disable;
1635                 };
1636         };
1637
1638         uart4_pins_a: uart4-0 {
1639                 pins1 {
1640                         pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1641                         bias-disable;
1642                         drive-push-pull;
1643                         slew-rate = <0>;
1644                 };
1645                 pins2 {
1646                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1647                         bias-disable;
1648                 };
1649         };
1650
1651         uart4_pins_b: uart4-1 {
1652                 pins1 {
1653                         pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
1654                         bias-disable;
1655                         drive-push-pull;
1656                         slew-rate = <0>;
1657                 };
1658                 pins2 {
1659                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1660                         bias-disable;
1661                 };
1662         };
1663
1664         uart4_pins_c: uart4-2 {
1665                 pins1 {
1666                         pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1667                         bias-disable;
1668                         drive-push-pull;
1669                         slew-rate = <0>;
1670                 };
1671                 pins2 {
1672                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1673                         bias-disable;
1674                 };
1675         };
1676
1677         uart7_pins_a: uart7-0 {
1678                 pins1 {
1679                         pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
1680                         bias-disable;
1681                         drive-push-pull;
1682                         slew-rate = <0>;
1683                 };
1684                 pins2 {
1685                         pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
1686                                  <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
1687                                  <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
1688                         bias-disable;
1689                 };
1690         };
1691
1692         uart7_pins_b: uart7-1 {
1693                 pins1 {
1694                         pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
1695                         bias-disable;
1696                         drive-push-pull;
1697                         slew-rate = <0>;
1698                 };
1699                 pins2 {
1700                         pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
1701                         bias-disable;
1702                 };
1703         };
1704
1705         uart8_pins_a: uart8-0 {
1706                 pins1 {
1707                         pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
1708                         bias-disable;
1709                         drive-push-pull;
1710                         slew-rate = <0>;
1711                 };
1712                 pins2 {
1713                         pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
1714                         bias-disable;
1715                 };
1716         };
1717
1718         usbotg_hs_pins_a: usbotg-hs-0 {
1719                 pins {
1720                         pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
1721                 };
1722         };
1723
1724         usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
1725                 pins {
1726                         pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
1727                                  <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
1728                 };
1729         };
1730 };
1731
1732 &pinctrl_z {
1733         i2c2_pins_b2: i2c2-0 {
1734                 pins {
1735                         pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
1736                         bias-disable;
1737                         drive-open-drain;
1738                         slew-rate = <0>;
1739                 };
1740         };
1741
1742         i2c2_sleep_pins_b2: i2c2-sleep-0 {
1743                 pins {
1744                         pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
1745                 };
1746         };
1747
1748         i2c4_pins_a: i2c4-0 {
1749                 pins {
1750                         pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
1751                                  <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
1752                         bias-disable;
1753                         drive-open-drain;
1754                         slew-rate = <0>;
1755                 };
1756         };
1757
1758         i2c4_sleep_pins_a: i2c4-sleep-0 {
1759                 pins {
1760                         pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
1761                                  <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
1762                 };
1763         };
1764
1765         spi1_pins_a: spi1-0 {
1766                 pins1 {
1767                         pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
1768                                  <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
1769                         bias-disable;
1770                         drive-push-pull;
1771                         slew-rate = <1>;
1772                 };
1773
1774                 pins2 {
1775                         pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
1776                         bias-disable;
1777                 };
1778         };
1779
1780         spi4_pins_a: spi4-0 {
1781                 pins {
1782                         pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
1783                                  <STM32_PINMUX('E', 6, AF5)>;  /* SPI4_MOSI */
1784                         bias-disable;
1785                         drive-push-pull;
1786                         slew-rate = <1>;
1787                 };
1788                 pins2 {
1789                         pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
1790                         bias-disable;
1791                 };
1792         };
1793 };