]> CyberLeo.Net >> Repos - FreeBSD/FreeBSD.git/blob - src/arm64/renesas/ulcb-kf.dtsi
Update our copies of the Device Tree Source to Linux 4.15
[FreeBSD/FreeBSD.git] / src / arm64 / renesas / ulcb-kf.dtsi
1 /*
2  * Device Tree Source for the Kingfisher (ULCB extension) board
3  *
4  * Copyright (C) 2017 Renesas Electronics Corp.
5  * Copyright (C) 2017 Cogent Embedded, Inc.
6  *
7  * This file is licensed under the terms of the GNU General Public License
8  * version 2.  This program is licensed "as is" without any warranty of any
9  * kind, whether express or implied.
10  */
11
12 / {
13         aliases {
14                 serial1 = &hscif0;
15                 serial2 = &scif1;
16         };
17 };
18
19 &can0 {
20         pinctrl-0 = <&can0_pins>;
21         pinctrl-names = "default";
22         status = "okay";
23 };
24
25 &can1 {
26         pinctrl-0 = <&can1_pins>;
27         pinctrl-names = "default";
28         status = "okay";
29 };
30
31 &ehci0 {
32         status = "okay";
33 };
34
35 &hscif0 {
36         pinctrl-0 = <&hscif0_pins>;
37         pinctrl-names = "default";
38         uart-has-rtscts;
39
40         status = "okay";
41 };
42
43 &hsusb {
44         status = "okay";
45 };
46
47 &i2c2 {
48         gpio_exp_74: gpio@74 {
49                 compatible = "ti,tca9539";
50                 reg = <0x74>;
51                 gpio-controller;
52                 #gpio-cells = <2>;
53                 interrupt-controller;
54                 interrupt-parent = <&gpio6>;
55                 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
56
57                 hub_pwen {
58                         gpio-hog;
59                         gpios = <6 GPIO_ACTIVE_HIGH>;
60                         output-high;
61                         line-name = "HUB pwen";
62                 };
63
64                 hub_rst {
65                         gpio-hog;
66                         gpios = <7 GPIO_ACTIVE_HIGH>;
67                         output-high;
68                         line-name = "HUB rst";
69                 };
70         };
71
72         gpio_exp_75: gpio@75 {
73                 compatible = "ti,tca9539";
74                 reg = <0x75>;
75                 gpio-controller;
76                 #gpio-cells = <2>;
77                 interrupt-controller;
78                 interrupt-parent = <&gpio6>;
79                 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
80         };
81
82         i2cswitch2: i2c-switch@71 {
83                 compatible = "nxp,pca9548";
84                 #address-cells = <1>;
85                 #size-cells = <0>;
86                 reg = <0x71>;
87                 reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
88         };
89 };
90
91 &i2c4 {
92         gpio_exp_76: gpio@76 {
93                 compatible = "ti,tca9539";
94                 reg = <0x76>;
95                 gpio-controller;
96                 #gpio-cells = <2>;
97                 interrupt-controller;
98                 interrupt-parent = <&gpio7>;
99                 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
100         };
101
102         gpio_exp_77: gpio@77 {
103                 compatible = "ti,tca9539";
104                 reg = <0x77>;
105                 gpio-controller;
106                 #gpio-cells = <2>;
107                 interrupt-controller;
108                 interrupt-parent = <&gpio5>;
109                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
110         };
111
112         i2cswitch4: i2c-switch@71 {
113                 compatible = "nxp,pca9548";
114                 #address-cells = <1>;
115                 #size-cells = <0>;
116                 reg = <0x71>;
117                 reset-gpios= <&gpio3 15 GPIO_ACTIVE_LOW>;
118         };
119 };
120
121 &ohci0 {
122         status = "okay";
123 };
124
125 &pcie_bus_clk {
126         clock-frequency = <100000000>;
127 };
128
129 &pciec0 {
130         status = "okay";
131 };
132
133 &pciec1 {
134         status = "okay";
135 };
136
137 &pfc {
138         can0_pins: can0 {
139                 groups = "can0_data_a";
140                 function = "can0";
141         };
142
143         can1_pins: can1 {
144                 groups = "can1_data";
145                 function = "can1";
146         };
147
148         hscif0_pins: hscif0 {
149                 groups = "hscif0_data", "hscif0_ctrl";
150                 function = "hscif0";
151         };
152
153         scif1_pins: scif1 {
154                 groups = "scif1_data_b", "scif1_ctrl";
155                 function = "scif1";
156         };
157 };
158
159 &scif1 {
160         pinctrl-0 = <&scif1_pins>;
161         pinctrl-names = "default";
162         uart-has-rtscts;
163
164         status = "okay";
165 };
166
167 &xhci0 {
168         status = "okay";
169 };